From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-devel@nongnu.org, patches@linaro.org,
"Alex Bennée" <alex.bennee@linaro.org>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Andreas Färber" <afaerber@suse.de>,
qemu-arm@nongnu.org
Subject: Re: [PATCH 06/16] include/qom/cpu.h: Add new get_phys_page_asidx_debug method
Date: Fri, 6 Nov 2015 14:37:58 +0100 [thread overview]
Message-ID: <20151106133758.GE13308@toto> (raw)
In-Reply-To: <1446747358-18214-7-git-send-email-peter.maydell@linaro.org>
On Thu, Nov 05, 2015 at 06:15:48PM +0000, Peter Maydell wrote:
> Add a new optional method get_phys_page_asidx_debug to CPUClass.
> This is like the existing get_phys_page_debug, but also returns
> the address space index to use for the access. This is necessary
> for CPUs which have multiple address spaces.
>
> We provide a wrapper function cpu_get_phys_page_asidx_debug()
> which falls back to the existing get_phys_page_debug(), so we
> don't need to change every target CPU.
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
> include/qom/cpu.h | 34 ++++++++++++++++++++++++++++++++--
> 1 file changed, 32 insertions(+), 2 deletions(-)
>
> diff --git a/include/qom/cpu.h b/include/qom/cpu.h
> index ae17932..10ef5cc 100644
> --- a/include/qom/cpu.h
> +++ b/include/qom/cpu.h
> @@ -98,6 +98,9 @@ struct TranslationBlock;
> * #TranslationBlock.
> * @handle_mmu_fault: Callback for handling an MMU fault.
> * @get_phys_page_debug: Callback for obtaining a physical address.
> + * @get_phys_page_asidx_debug: Callback for obtaining a physical address and the
> + * associated address index. CPUs which have more than one AddressSpace
> + * should implement this instead of get_phys_page_debug.
> * @gdb_read_register: Callback for letting GDB read a register.
> * @gdb_write_register: Callback for letting GDB write a register.
> * @debug_excp_handler: Callback for handling debug exceptions.
> @@ -152,6 +155,7 @@ typedef struct CPUClass {
> int (*handle_mmu_fault)(CPUState *cpu, vaddr address, int rw,
> int mmu_index);
> hwaddr (*get_phys_page_debug)(CPUState *cpu, vaddr addr);
> + hwaddr (*get_phys_page_asidx_debug)(CPUState *cpu, vaddr addr, int *asidx);
> int (*gdb_read_register)(CPUState *cpu, uint8_t *buf, int reg);
> int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg);
> void (*debug_excp_handler)(CPUState *cpu);
> @@ -445,6 +449,32 @@ void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
>
> #ifndef CONFIG_USER_ONLY
> /**
> + * cpu_get_phys_page_asidx_debug:
> + * @cpu: The CPU to obtain the physical page address for.
> + * @addr: The virtual address.
> + * @asidx: Updated on return with the address space index for this access.
> + *
> + * Obtains the physical page corresponding to a virtual one, together
> + * with the corresponding address space index indicating which AddressSpace
> + * to look the physical address up in.
> + * Use it only for debugging because no protection checks are done.
> + *
> + * Returns: Corresponding physical page address or -1 if no page found.
> + */
> +static inline hwaddr cpu_get_phys_page_asidx_debug(CPUState *cpu, vaddr addr,
> + int *asidx)
> +{
> + CPUClass *cc = CPU_GET_CLASS(cpu);
> +
> + if (cc->get_phys_page_asidx_debug) {
> + return cc->get_phys_page_asidx_debug(cpu, addr, asidx);
> + }
> + /* Fallback for CPUs which don't have multiple address spaces */
> + *asidx = 0;
> + return cc->get_phys_page_debug(cpu, addr);
> +}
> +
> +/**
> * cpu_get_phys_page_debug:
> * @cpu: The CPU to obtain the physical page address for.
> * @addr: The virtual address.
> @@ -456,9 +486,9 @@ void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
> */
> static inline hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr)
> {
> - CPUClass *cc = CPU_GET_CLASS(cpu);
> + int asidx;
>
> - return cc->get_phys_page_debug(cpu, addr);
> + return cpu_get_phys_page_asidx_debug(cpu, addr, &asidx);
> }
> #endif
>
> --
> 1.9.1
>
WARNING: multiple messages have this Message-ID (diff)
From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: patches@linaro.org, qemu-devel@nongnu.org, qemu-arm@nongnu.org,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Alex Bennée" <alex.bennee@linaro.org>,
"Andreas Färber" <afaerber@suse.de>
Subject: Re: [Qemu-devel] [PATCH 06/16] include/qom/cpu.h: Add new get_phys_page_asidx_debug method
Date: Fri, 6 Nov 2015 14:37:58 +0100 [thread overview]
Message-ID: <20151106133758.GE13308@toto> (raw)
In-Reply-To: <1446747358-18214-7-git-send-email-peter.maydell@linaro.org>
On Thu, Nov 05, 2015 at 06:15:48PM +0000, Peter Maydell wrote:
> Add a new optional method get_phys_page_asidx_debug to CPUClass.
> This is like the existing get_phys_page_debug, but also returns
> the address space index to use for the access. This is necessary
> for CPUs which have multiple address spaces.
>
> We provide a wrapper function cpu_get_phys_page_asidx_debug()
> which falls back to the existing get_phys_page_debug(), so we
> don't need to change every target CPU.
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
> include/qom/cpu.h | 34 ++++++++++++++++++++++++++++++++--
> 1 file changed, 32 insertions(+), 2 deletions(-)
>
> diff --git a/include/qom/cpu.h b/include/qom/cpu.h
> index ae17932..10ef5cc 100644
> --- a/include/qom/cpu.h
> +++ b/include/qom/cpu.h
> @@ -98,6 +98,9 @@ struct TranslationBlock;
> * #TranslationBlock.
> * @handle_mmu_fault: Callback for handling an MMU fault.
> * @get_phys_page_debug: Callback for obtaining a physical address.
> + * @get_phys_page_asidx_debug: Callback for obtaining a physical address and the
> + * associated address index. CPUs which have more than one AddressSpace
> + * should implement this instead of get_phys_page_debug.
> * @gdb_read_register: Callback for letting GDB read a register.
> * @gdb_write_register: Callback for letting GDB write a register.
> * @debug_excp_handler: Callback for handling debug exceptions.
> @@ -152,6 +155,7 @@ typedef struct CPUClass {
> int (*handle_mmu_fault)(CPUState *cpu, vaddr address, int rw,
> int mmu_index);
> hwaddr (*get_phys_page_debug)(CPUState *cpu, vaddr addr);
> + hwaddr (*get_phys_page_asidx_debug)(CPUState *cpu, vaddr addr, int *asidx);
> int (*gdb_read_register)(CPUState *cpu, uint8_t *buf, int reg);
> int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg);
> void (*debug_excp_handler)(CPUState *cpu);
> @@ -445,6 +449,32 @@ void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
>
> #ifndef CONFIG_USER_ONLY
> /**
> + * cpu_get_phys_page_asidx_debug:
> + * @cpu: The CPU to obtain the physical page address for.
> + * @addr: The virtual address.
> + * @asidx: Updated on return with the address space index for this access.
> + *
> + * Obtains the physical page corresponding to a virtual one, together
> + * with the corresponding address space index indicating which AddressSpace
> + * to look the physical address up in.
> + * Use it only for debugging because no protection checks are done.
> + *
> + * Returns: Corresponding physical page address or -1 if no page found.
> + */
> +static inline hwaddr cpu_get_phys_page_asidx_debug(CPUState *cpu, vaddr addr,
> + int *asidx)
> +{
> + CPUClass *cc = CPU_GET_CLASS(cpu);
> +
> + if (cc->get_phys_page_asidx_debug) {
> + return cc->get_phys_page_asidx_debug(cpu, addr, asidx);
> + }
> + /* Fallback for CPUs which don't have multiple address spaces */
> + *asidx = 0;
> + return cc->get_phys_page_debug(cpu, addr);
> +}
> +
> +/**
> * cpu_get_phys_page_debug:
> * @cpu: The CPU to obtain the physical page address for.
> * @addr: The virtual address.
> @@ -456,9 +486,9 @@ void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
> */
> static inline hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr)
> {
> - CPUClass *cc = CPU_GET_CLASS(cpu);
> + int asidx;
>
> - return cc->get_phys_page_debug(cpu, addr);
> + return cpu_get_phys_page_asidx_debug(cpu, addr, &asidx);
> }
> #endif
>
> --
> 1.9.1
>
next prev parent reply other threads:[~2015-11-06 13:38 UTC|newest]
Thread overview: 116+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-05 18:15 [PATCH 00/16] Add support for multiple address spaces per CPU and use it for ARM TrustZone Peter Maydell
2015-11-05 18:15 ` [Qemu-devel] " Peter Maydell
2015-11-05 18:15 ` [PATCH 01/16] exec.c: Don't set cpu->as until cpu_address_space_init Peter Maydell
2015-11-05 18:15 ` [Qemu-devel] " Peter Maydell
2015-11-06 13:04 ` Edgar E. Iglesias
2015-11-06 13:04 ` [Qemu-devel] " Edgar E. Iglesias
2015-11-05 18:15 ` [PATCH 02/16] exec.c: Allow target CPUs to define multiple AddressSpaces Peter Maydell
2015-11-05 18:15 ` [Qemu-devel] " Peter Maydell
2015-11-06 13:21 ` Edgar E. Iglesias
2015-11-06 13:21 ` [Qemu-devel] " Edgar E. Iglesias
2015-11-06 13:34 ` Peter Maydell
2015-11-06 13:34 ` [Qemu-devel] " Peter Maydell
2015-11-06 13:49 ` Edgar E. Iglesias
2015-11-06 13:49 ` [Qemu-devel] " Edgar E. Iglesias
2015-11-09 10:32 ` Paolo Bonzini
2015-11-09 10:32 ` [Qemu-devel] " Paolo Bonzini
2015-11-09 10:30 ` Paolo Bonzini
2015-11-09 10:30 ` [Qemu-devel] " Paolo Bonzini
2015-11-05 18:15 ` [PATCH 03/16] tlb_set_page_with_attrs: Take argument specifying AddressSpace to use Peter Maydell
2015-11-05 18:15 ` [Qemu-devel] " Peter Maydell
2015-11-06 13:27 ` Edgar E. Iglesias
2015-11-06 13:27 ` [Qemu-devel] " Edgar E. Iglesias
2015-11-06 13:41 ` Peter Maydell
2015-11-06 13:41 ` [Qemu-devel] " Peter Maydell
2015-11-06 13:49 ` Edgar E. Iglesias
2015-11-06 13:49 ` [Qemu-devel] " Edgar E. Iglesias
2015-11-06 13:52 ` Edgar E. Iglesias
2015-11-06 13:52 ` [Qemu-devel] " Edgar E. Iglesias
2015-11-09 10:44 ` Paolo Bonzini
2015-11-09 10:44 ` [Qemu-devel] " Paolo Bonzini
2015-11-09 10:49 ` Peter Maydell
2015-11-09 10:49 ` [Qemu-devel] " Peter Maydell
2015-11-10 16:13 ` Peter Maydell
2015-11-10 16:13 ` [Qemu-devel] " Peter Maydell
2015-11-05 18:15 ` [PATCH 04/16] exec.c: Add address space index to CPUIOTLBEntry Peter Maydell
2015-11-05 18:15 ` [Qemu-devel] " Peter Maydell
2015-11-06 13:34 ` Edgar E. Iglesias
2015-11-06 13:34 ` [Qemu-devel] " Edgar E. Iglesias
2015-11-06 13:45 ` Peter Maydell
2015-11-06 13:45 ` [Qemu-devel] " Peter Maydell
2015-11-06 14:13 ` Edgar E. Iglesias
2015-11-06 14:13 ` [Qemu-devel] " Edgar E. Iglesias
2015-11-05 18:15 ` [PATCH 05/16] exec.c: Add cpu_get_address_space() Peter Maydell
2015-11-05 18:15 ` [Qemu-devel] " Peter Maydell
2015-11-05 18:15 ` [PATCH 06/16] include/qom/cpu.h: Add new get_phys_page_asidx_debug method Peter Maydell
2015-11-05 18:15 ` [Qemu-devel] " Peter Maydell
2015-11-06 13:37 ` Edgar E. Iglesias [this message]
2015-11-06 13:37 ` Edgar E. Iglesias
2015-11-05 18:15 ` [PATCH 07/16] exec.c: Use cpu_get_phys_page_asidx_debug Peter Maydell
2015-11-05 18:15 ` [Qemu-devel] " Peter Maydell
2015-11-06 13:38 ` Edgar E. Iglesias
2015-11-06 13:38 ` [Qemu-devel] " Edgar E. Iglesias
2015-11-05 18:15 ` [PATCH 08/16] exec.c: Have one io_mem_watch per AddressSpace Peter Maydell
2015-11-05 18:15 ` [Qemu-devel] " Peter Maydell
2015-11-06 13:45 ` Edgar E. Iglesias
2015-11-06 13:45 ` [Qemu-devel] " Edgar E. Iglesias
2015-11-09 10:49 ` Paolo Bonzini
2015-11-09 10:49 ` [Qemu-devel] " Paolo Bonzini
2015-11-09 10:54 ` Peter Maydell
2015-11-09 10:54 ` [Qemu-devel] " Peter Maydell
2015-11-09 11:00 ` Paolo Bonzini
2015-11-09 11:00 ` [Qemu-devel] " Paolo Bonzini
2015-11-05 18:15 ` [PATCH 09/16] target-arm: Support multiple address spaces in page table walks Peter Maydell
2015-11-05 18:15 ` [Qemu-devel] " Peter Maydell
2015-11-06 14:22 ` Edgar E. Iglesias
2015-11-06 14:22 ` [Qemu-devel] " Edgar E. Iglesias
2015-11-09 10:51 ` Paolo Bonzini
2015-11-09 10:51 ` [Qemu-devel] " Paolo Bonzini
2015-11-09 10:58 ` Peter Maydell
2015-11-09 10:58 ` [Qemu-devel] " Peter Maydell
2015-11-09 11:03 ` Paolo Bonzini
2015-11-09 11:03 ` [Qemu-devel] " Paolo Bonzini
2015-11-09 11:09 ` Peter Maydell
2015-11-09 11:09 ` [Qemu-devel] " Peter Maydell
2015-11-09 11:19 ` Paolo Bonzini
2015-11-09 11:19 ` [Qemu-devel] " Paolo Bonzini
2015-11-09 11:22 ` Peter Maydell
2015-11-09 11:22 ` [Qemu-devel] " Peter Maydell
2015-11-13 18:51 ` Peter Maydell
2015-11-13 18:51 ` [Qemu-devel] " Peter Maydell
2015-11-05 18:15 ` [PATCH 10/16] target-arm: Implement cpu_get_phys_page_asidx_debug Peter Maydell
2015-11-05 18:15 ` [Qemu-devel] " Peter Maydell
2015-11-06 14:23 ` Edgar E. Iglesias
2015-11-06 14:23 ` [Qemu-devel] " Edgar E. Iglesias
2015-11-05 18:15 ` [PATCH 11/16] memory: Add address_space_init_shareable() Peter Maydell
2015-11-05 18:15 ` [Qemu-devel] " Peter Maydell
2015-11-06 14:29 ` Edgar E. Iglesias
2015-11-06 14:29 ` [Qemu-devel] " Edgar E. Iglesias
2015-11-06 14:49 ` Peter Maydell
2015-11-06 14:49 ` [Qemu-devel] " Peter Maydell
2015-11-09 10:55 ` Paolo Bonzini
2015-11-09 10:55 ` [Qemu-devel] " Paolo Bonzini
2015-11-09 10:59 ` Peter Maydell
2015-11-09 10:59 ` [Qemu-devel] " Peter Maydell
2015-11-09 11:02 ` Paolo Bonzini
2015-11-09 11:02 ` [Qemu-devel] " Paolo Bonzini
2015-11-05 18:15 ` [PATCH 12/16] qom/cpu: Add MemoryRegion property Peter Maydell
2015-11-05 18:15 ` [Qemu-devel] " Peter Maydell
2015-11-06 14:31 ` Edgar E. Iglesias
2015-11-06 14:31 ` [Qemu-devel] " Edgar E. Iglesias
2015-11-09 10:56 ` Paolo Bonzini
2015-11-09 10:56 ` [Qemu-devel] " Paolo Bonzini
2015-11-05 18:15 ` [PATCH 13/16] target-arm: Add QOM property for Secure memory region Peter Maydell
2015-11-05 18:15 ` [Qemu-devel] " Peter Maydell
2015-11-06 14:33 ` Edgar E. Iglesias
2015-11-06 14:33 ` [Qemu-devel] " Edgar E. Iglesias
2015-11-05 18:15 ` [PATCH 14/16] hw/arm/virt: Wire up memory region to CPUs explicitly Peter Maydell
2015-11-05 18:15 ` [Qemu-devel] " Peter Maydell
2015-11-06 14:45 ` Edgar E. Iglesias
2015-11-06 14:45 ` [Qemu-devel] " Edgar E. Iglesias
2015-11-06 14:51 ` Peter Maydell
2015-11-06 14:51 ` [Qemu-devel] " Peter Maydell
2015-11-05 18:15 ` [PATCH 15/16] [RFC] hw/arm/virt: add secure memory region and UART Peter Maydell
2015-11-05 18:15 ` [Qemu-devel] " Peter Maydell
2015-11-05 18:15 ` [PATCH 16/16] HACK: rearrange the virt memory map to suit OP-TEE Peter Maydell
2015-11-05 18:15 ` [Qemu-devel] " Peter Maydell
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