From: Wolfram Sang <wsa@the-dreams.de>
To: Alexander Sverdlin <alexander.sverdlin@nokia.com>
Cc: Sekhar Nori <nsekhar@ti.com>,
Kevin Hilman <khilman@deeprootsystems.com>,
linux-i2c@vger.kernel.org, Murali Karicheri <m-karicheri2@ti.com>,
Santosh Shilimkar <ssantosh@kernel.org>
Subject: Re: [PATCH v2] i2c: davinci: Increase module clock frequency
Date: Mon, 30 Nov 2015 15:56:04 +0100 [thread overview]
Message-ID: <20151130145604.GK1513@katana> (raw)
In-Reply-To: <565C6254.6080602@nokia.com>
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On Mon, Nov 30, 2015 at 03:51:00PM +0100, Alexander Sverdlin wrote:
> I2C controller used in Keystone SoC has an undocumented peculiarity which
> results in SDA-SCL margins being dependent on module clock. Driving high
> capacity bus near its limits can result in STOP condition sometimes being
> understood as REPEATED-START by slaves (or NACK instead of ACK, etc...).
> Driving the module with higher clocks increases the margin between SDA and SCL
> transitions, making the operations with higher bus rates more robust. Therefore,
> target the module clock to 12MHz instead of 7MHz, still staying within
> the specification limits.
>
> Before the change STOP timing looked like this on 400kHz:
>
Applied to for-current, thanks!
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next prev parent reply other threads:[~2015-11-30 14:56 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-19 12:21 [PATCH] i2c: davinci: Increase module clock frequency Alexander Sverdlin
2015-11-20 0:22 ` santosh shilimkar
2015-11-30 13:55 ` Wolfram Sang
2015-11-30 14:00 ` Alexander Sverdlin
2015-11-30 14:10 ` Wolfram Sang
2015-11-30 14:51 ` [PATCH v2] " Alexander Sverdlin
2015-11-30 14:56 ` Wolfram Sang [this message]
2015-11-30 15:02 ` Wolfram Sang
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