From: Borislav Petkov <bp@suse.de>
To: Will Deacon <will.deacon@arm.com>
Cc: Fu Wei <fu.wei@linaro.org>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Hanjun Guo <hanjun.guo@linaro.org>,
Tomasz Nowicki <tomasz.nowicki@linaro.org>,
Tomasz Nowicki <tn@semihalf.com>,
Rafael Wysocki <rjw@rjwysocki.net>, Len Brown <lenb@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
LKML <linux-kernel@vger.kernel.org>,
linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org,
Linaro ACPI Mailman List <linaro-acpi@lists.linaro.org>,
G Gregory <graeme.gregory@linaro.org>,
Al Stone <al.stone@linaro.org>,
Mark Rutland <mark.rutland@arm.com>,
Marc Zyngier <Marc.Zyngier@arm.com>,
rruigrok@codeaurora.org, "Abdulhamid,
Harb" <harba@qti.qualcomm.com>, Jon Masters <jcm@redhat.com>,
Mark Salter <msalter@redhat.com>,
Grant Likely <grant.likely@linaro.org>,
rrichter@cavium.com, jarkko.nikula@linux.intel.com,
Jonathan Zhang <jon.zhixiong.zhang@gmail.com>M
Subject: Re: [PATCH v4] acpi, apei, arm64: APEI initial support for aarch64.
Date: Mon, 14 Dec 2015 12:20:04 +0100 [thread overview]
Message-ID: <20151214112004.GB11630@pd.tnic> (raw)
In-Reply-To: <20151210110135.GC21134@arm.com>
On Thu, Dec 10, 2015 at 11:01:35AM +0000, Will Deacon wrote:
> [adding Boris, as he might know how this works]
Gee, thanks Will, now you're making me look at this too :-)
> It's not about flushing one page, flush_tlb_kernel_range (which is called
> by unmap_kernel_range) already takes care of that. The problem is that
> the unmap is called from irq/nmi context, so the IPIs required for
> broadcasting the TLB maintenance on x86 cannot be safely executed.
Hmm, if you're talking about ghes_iounmap_nmi() and ghes_iounmap_irq()
which are the two callers of unmap_kernel_range_noflush(), that last one
is calling vunmap_page_range() which is fiddling with the page table.
And I don't see TLB flushing IPIs there.
If you mean arch_apei_flush_tlb_one(), that's INVLPG on x86 so also no
IPI.
What am I missing?
> Ideally, I think the ghes code would just use unmap_kernel_range unless
> the architecture specifically says that doesn't work in irq context. In
> that case, we don't need to implement the arch_apei_flush_tlb_one callback
> on arm64.
Well, what bothers me with using
unmap_kernel_range()/vunmap_page_range() is that if a GHES IRQ/NMI
happens while something is executing those, the NMI will interrupt
whatever's happening and it will possibly corrupt the pagetable, IMHO.
Michal, Vlasta, can you please take a look?
More specifically, those ghes_iounmap_nmi/ghes_iounmap_irq calls to
unmap_kernel_range_noflush() happening in NMI/IRQ context.
> One thing I don't fully grok about the code: since the page is mapped
> using ioremap_page_range, doesn't that allow other CPUs to speculatively
> fill their TLB with entries corresponding to the page mapped by the IRQ
> handler on another core? If the core with the speculative entries then
> takes an APEI exception, what guarantees do we have that it's looking at
> the right page? I think, for x86, we need a local invalidation on map,
> too.
You're looking at ghes_copy_tofrom_phys(), right? That's grabbing
spinlocks in IRQ/NMI context and doing the iounmap a bit later, below
on the same core. I mean, I don't see us landing on another core in
between, we're non-preemptible...
Or do you mean something else?
--
Regards/Gruss,
Boris.
SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard, Graham Norton, HRB 21284 (AG Nürnberg)
--
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WARNING: multiple messages have this Message-ID (diff)
From: bp@suse.de (Borislav Petkov)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4] acpi, apei, arm64: APEI initial support for aarch64.
Date: Mon, 14 Dec 2015 12:20:04 +0100 [thread overview]
Message-ID: <20151214112004.GB11630@pd.tnic> (raw)
In-Reply-To: <20151210110135.GC21134@arm.com>
On Thu, Dec 10, 2015 at 11:01:35AM +0000, Will Deacon wrote:
> [adding Boris, as he might know how this works]
Gee, thanks Will, now you're making me look at this too :-)
> It's not about flushing one page, flush_tlb_kernel_range (which is called
> by unmap_kernel_range) already takes care of that. The problem is that
> the unmap is called from irq/nmi context, so the IPIs required for
> broadcasting the TLB maintenance on x86 cannot be safely executed.
Hmm, if you're talking about ghes_iounmap_nmi() and ghes_iounmap_irq()
which are the two callers of unmap_kernel_range_noflush(), that last one
is calling vunmap_page_range() which is fiddling with the page table.
And I don't see TLB flushing IPIs there.
If you mean arch_apei_flush_tlb_one(), that's INVLPG on x86 so also no
IPI.
What am I missing?
> Ideally, I think the ghes code would just use unmap_kernel_range unless
> the architecture specifically says that doesn't work in irq context. In
> that case, we don't need to implement the arch_apei_flush_tlb_one callback
> on arm64.
Well, what bothers me with using
unmap_kernel_range()/vunmap_page_range() is that if a GHES IRQ/NMI
happens while something is executing those, the NMI will interrupt
whatever's happening and it will possibly corrupt the pagetable, IMHO.
Michal, Vlasta, can you please take a look?
More specifically, those ghes_iounmap_nmi/ghes_iounmap_irq calls to
unmap_kernel_range_noflush() happening in NMI/IRQ context.
> One thing I don't fully grok about the code: since the page is mapped
> using ioremap_page_range, doesn't that allow other CPUs to speculatively
> fill their TLB with entries corresponding to the page mapped by the IRQ
> handler on another core? If the core with the speculative entries then
> takes an APEI exception, what guarantees do we have that it's looking at
> the right page? I think, for x86, we need a local invalidation on map,
> too.
You're looking at ghes_copy_tofrom_phys(), right? That's grabbing
spinlocks in IRQ/NMI context and doing the iounmap a bit later, below
on the same core. I mean, I don't see us landing on another core in
between, we're non-preemptible...
Or do you mean something else?
--
Regards/Gruss,
Boris.
SUSE Linux GmbH, GF: Felix Imend?rffer, Jane Smithard, Graham Norton, HRB 21284 (AG N?rnberg)
--
WARNING: multiple messages have this Message-ID (diff)
From: Borislav Petkov <bp@suse.de>
To: Will Deacon <will.deacon@arm.com>
Cc: Fu Wei <fu.wei@linaro.org>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Hanjun Guo <hanjun.guo@linaro.org>,
Tomasz Nowicki <tomasz.nowicki@linaro.org>,
Tomasz Nowicki <tn@semihalf.com>,
Rafael Wysocki <rjw@rjwysocki.net>, Len Brown <lenb@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
LKML <linux-kernel@vger.kernel.org>,
linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org,
Linaro ACPI Mailman List <linaro-acpi@lists.linaro.org>,
G Gregory <graeme.gregory@linaro.org>,
Al Stone <al.stone@linaro.org>,
Mark Rutland <mark.rutland@arm.com>,
Marc Zyngier <Marc.Zyngier@arm.com>,
rruigrok@codeaurora.org, "Abdulhamid,
Harb" <harba@qti.qualcomm.com>, Jon Masters <jcm@redhat.com>,
Mark Salter <msalter@redhat.com>,
Grant Likely <grant.likely@linaro.org>,
rrichter@cavium.com, jarkko.nikula@linux.intel.com,
Jonathan Zhang <jon.zhixiong.zhang@gmail.com>,
Michal Hocko <mhocko@suse.cz>, Vlastimil Babka <vbabka@suse.cz>
Subject: Re: [PATCH v4] acpi, apei, arm64: APEI initial support for aarch64.
Date: Mon, 14 Dec 2015 12:20:04 +0100 [thread overview]
Message-ID: <20151214112004.GB11630@pd.tnic> (raw)
In-Reply-To: <20151210110135.GC21134@arm.com>
On Thu, Dec 10, 2015 at 11:01:35AM +0000, Will Deacon wrote:
> [adding Boris, as he might know how this works]
Gee, thanks Will, now you're making me look at this too :-)
> It's not about flushing one page, flush_tlb_kernel_range (which is called
> by unmap_kernel_range) already takes care of that. The problem is that
> the unmap is called from irq/nmi context, so the IPIs required for
> broadcasting the TLB maintenance on x86 cannot be safely executed.
Hmm, if you're talking about ghes_iounmap_nmi() and ghes_iounmap_irq()
which are the two callers of unmap_kernel_range_noflush(), that last one
is calling vunmap_page_range() which is fiddling with the page table.
And I don't see TLB flushing IPIs there.
If you mean arch_apei_flush_tlb_one(), that's INVLPG on x86 so also no
IPI.
What am I missing?
> Ideally, I think the ghes code would just use unmap_kernel_range unless
> the architecture specifically says that doesn't work in irq context. In
> that case, we don't need to implement the arch_apei_flush_tlb_one callback
> on arm64.
Well, what bothers me with using
unmap_kernel_range()/vunmap_page_range() is that if a GHES IRQ/NMI
happens while something is executing those, the NMI will interrupt
whatever's happening and it will possibly corrupt the pagetable, IMHO.
Michal, Vlasta, can you please take a look?
More specifically, those ghes_iounmap_nmi/ghes_iounmap_irq calls to
unmap_kernel_range_noflush() happening in NMI/IRQ context.
> One thing I don't fully grok about the code: since the page is mapped
> using ioremap_page_range, doesn't that allow other CPUs to speculatively
> fill their TLB with entries corresponding to the page mapped by the IRQ
> handler on another core? If the core with the speculative entries then
> takes an APEI exception, what guarantees do we have that it's looking at
> the right page? I think, for x86, we need a local invalidation on map,
> too.
You're looking at ghes_copy_tofrom_phys(), right? That's grabbing
spinlocks in IRQ/NMI context and doing the iounmap a bit later, below
on the same core. I mean, I don't see us landing on another core in
between, we're non-preemptible...
Or do you mean something else?
--
Regards/Gruss,
Boris.
SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard, Graham Norton, HRB 21284 (AG Nürnberg)
--
next prev parent reply other threads:[~2015-12-14 11:20 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-08 7:03 [PATCH v4] acpi, apei, arm64: APEI initial support for aarch64 fu.wei
2015-12-08 7:03 ` fu.wei at linaro.org
2015-12-08 11:26 ` Hanjun Guo
2015-12-08 11:26 ` Hanjun Guo
2015-12-08 12:45 ` Fu Wei
2015-12-08 12:45 ` Fu Wei
2015-12-08 12:34 ` Lorenzo Pieralisi
2015-12-08 12:34 ` Lorenzo Pieralisi
2015-12-08 12:52 ` Hanjun Guo
2015-12-08 12:52 ` Hanjun Guo
2015-12-08 13:08 ` Fu Wei
2015-12-08 13:08 ` Fu Wei
2015-12-08 14:07 ` Lorenzo Pieralisi
2015-12-08 14:07 ` Lorenzo Pieralisi
2015-12-09 3:25 ` Fu Wei
2015-12-09 3:25 ` Fu Wei
2015-12-10 2:02 ` Fu Wei
2015-12-10 2:02 ` Fu Wei
2015-12-10 11:01 ` Will Deacon
2015-12-10 11:01 ` Will Deacon
2015-12-14 11:20 ` Borislav Petkov [this message]
2015-12-14 11:20 ` Borislav Petkov
2015-12-14 11:20 ` Borislav Petkov
2015-12-14 11:46 ` Will Deacon
2015-12-14 11:46 ` Will Deacon
2015-12-14 11:46 ` Will Deacon
2015-12-14 12:39 ` Borislav Petkov
2015-12-14 12:39 ` Borislav Petkov
2015-12-14 12:39 ` Borislav Petkov
2015-12-08 15:53 ` Suzuki K. Poulose
2015-12-08 15:53 ` Suzuki K. Poulose
2015-12-09 3:00 ` Fu Wei
2015-12-09 3:00 ` Fu Wei
2015-12-09 3:00 ` Fu Wei
2015-12-14 10:46 ` Borislav Petkov
2015-12-14 10:46 ` Borislav Petkov
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