From: Brian Norris <computersforpeace@gmail.com>
To: Jiancheng Xue <xuejiancheng@huawei.com>
Cc: robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com,
ijc+devicetree@hellion.org.uk, galak@codeaurora.org,
dwmw2@infradead.org, zajec5@gmail.com,
boris.brezillon@free-electrons.com, jteki@openedev.com,
ezequiel@vanguardiasur.com.ar, juhosg@openwrt.org,
shijie.huang@intel.com, mika.westerberg@linux.intel.com,
furquan@google.com, han.xu@freescale.com,
fabio.estevam@freescale.com, manabian@gmail.com,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-mtd@lists.infradead.org, yanhaifeng@hisilicon.com,
yanghongwei@hisilicon.com, suwenping@hisilicon.com,
raojun@hisilicon.com, ml.yang@hisilicon.com,
gaofei@hisilicon.com, zhangzhenxing@hisilicon.com,
xuejiancheng@hisilicon.com, Binquan Peng <pengbinquan@huawei.com>
Subject: Re: [RESEND PATCH v7] mtd: spi-nor: add hisilicon spi-nor flash controller driver
Date: Wed, 9 Mar 2016 10:50:24 -0800 [thread overview]
Message-ID: <20160309185024.GN55664@google.com> (raw)
In-Reply-To: <56DE9A79.30704@huawei.com>
On Tue, Mar 08, 2016 at 05:25:13PM +0800, Jiancheng Xue wrote:
> On 2016/3/8 6:52, Brian Norris wrote:
> [...]
> >> +static void hisi_spi_nor_dma_transfer(struct spi_nor *nor, u32 start_off,
> >> + u32 dma_buf, u32 len, u8 op_type)
> >
> > Does this controller support 64-bit addresses? What if you see LPAE, or
> > an ARM64 CPU? It'd be nice if you don't truncate potentially 64-bit
> > dma_buf down to u32.
> >
> > Brian
> >
> No, this controller just supports 32-bit addresses. So I think I have to truncate 64-bit dma_buf. :(
Then you should handle this proactively. Either some kind of WARN_ON and
error condition, or I think dma_set_mask_and_coherent(dev,
DMA_BIT_MASK(32)) should be able to ensure you get addresses in the
appropriate range?
Brian
WARNING: multiple messages have this Message-ID (diff)
From: Brian Norris <computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Jiancheng Xue <xuejiancheng-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
Cc: robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
pawel.moll-5wv7dgnIgG8@public.gmane.org,
mark.rutland-5wv7dgnIgG8@public.gmane.org,
ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org,
galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org,
zajec5-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org,
jteki-oRp2ZoJdM/RWk0Htik3J/w@public.gmane.org,
ezequiel-30ULvvUtt6G51wMPkGsGjgyUoB5FGQPZ@public.gmane.org,
juhosg-p3rKhJxN3npAfugRpC6u6w@public.gmane.org,
shijie.huang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org,
mika.westerberg-VuQAYsv1563Yd54FQh9/CA@public.gmane.org,
furquan-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org,
han.xu-KZfg59tc24xl57MIdRCFDg@public.gmane.org,
fabio.estevam-KZfg59tc24xl57MIdRCFDg@public.gmane.org,
manabian-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
yanhaifeng-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
yanghongwei-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
suwenping-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
raojun-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
ml.yang-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
gaofei-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
zhangzhenxing-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
xuejiancheng-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
Binquan Peng
<pengbinquan-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
Subject: Re: [RESEND PATCH v7] mtd: spi-nor: add hisilicon spi-nor flash controller driver
Date: Wed, 9 Mar 2016 10:50:24 -0800 [thread overview]
Message-ID: <20160309185024.GN55664@google.com> (raw)
In-Reply-To: <56DE9A79.30704-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
On Tue, Mar 08, 2016 at 05:25:13PM +0800, Jiancheng Xue wrote:
> On 2016/3/8 6:52, Brian Norris wrote:
> [...]
> >> +static void hisi_spi_nor_dma_transfer(struct spi_nor *nor, u32 start_off,
> >> + u32 dma_buf, u32 len, u8 op_type)
> >
> > Does this controller support 64-bit addresses? What if you see LPAE, or
> > an ARM64 CPU? It'd be nice if you don't truncate potentially 64-bit
> > dma_buf down to u32.
> >
> > Brian
> >
> No, this controller just supports 32-bit addresses. So I think I have to truncate 64-bit dma_buf. :(
Then you should handle this proactively. Either some kind of WARN_ON and
error condition, or I think dma_set_mask_and_coherent(dev,
DMA_BIT_MASK(32)) should be able to ensure you get addresses in the
appropriate range?
Brian
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
next prev parent reply other threads:[~2016-03-09 18:50 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-26 8:11 [RESEND PATCH v7] mtd: spi-nor: add hisilicon spi-nor flash controller driver Jiancheng Xue
2016-02-26 8:11 ` Jiancheng Xue
2016-03-05 0:35 ` Ezequiel Garcia
2016-03-05 0:35 ` Ezequiel Garcia
2016-03-07 22:52 ` Brian Norris
2016-03-07 22:52 ` Brian Norris
2016-03-08 9:25 ` Jiancheng Xue
2016-03-08 9:25 ` Jiancheng Xue
2016-03-08 9:46 ` Boris Brezillon
2016-03-08 9:46 ` Boris Brezillon
2016-03-09 3:35 ` Jiancheng Xue
2016-03-09 3:35 ` Jiancheng Xue
2016-03-09 18:50 ` Brian Norris [this message]
2016-03-09 18:50 ` Brian Norris
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20160309185024.GN55664@google.com \
--to=computersforpeace@gmail.com \
--cc=boris.brezillon@free-electrons.com \
--cc=devicetree@vger.kernel.org \
--cc=dwmw2@infradead.org \
--cc=ezequiel@vanguardiasur.com.ar \
--cc=fabio.estevam@freescale.com \
--cc=furquan@google.com \
--cc=galak@codeaurora.org \
--cc=gaofei@hisilicon.com \
--cc=han.xu@freescale.com \
--cc=ijc+devicetree@hellion.org.uk \
--cc=jteki@openedev.com \
--cc=juhosg@openwrt.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mtd@lists.infradead.org \
--cc=manabian@gmail.com \
--cc=mark.rutland@arm.com \
--cc=mika.westerberg@linux.intel.com \
--cc=ml.yang@hisilicon.com \
--cc=pawel.moll@arm.com \
--cc=pengbinquan@huawei.com \
--cc=raojun@hisilicon.com \
--cc=robh+dt@kernel.org \
--cc=shijie.huang@intel.com \
--cc=suwenping@hisilicon.com \
--cc=xuejiancheng@hisilicon.com \
--cc=xuejiancheng@huawei.com \
--cc=yanghongwei@hisilicon.com \
--cc=yanhaifeng@hisilicon.com \
--cc=zajec5@gmail.com \
--cc=zhangzhenxing@hisilicon.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.