* [PATCH 0/4] Add support for Engicam IMX6UL module
@ 2016-02-20 10:20 ` Michael Trimarchi
0 siblings, 0 replies; 44+ messages in thread
From: Michael Trimarchi @ 2016-02-20 10:20 UTC (permalink / raw)
To: shawnguo-DgEjT+Ai2ygdnm+yROfE0A, kernel-bIcnvbaLZ9MEGnE8C9+IrQ
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA,
fabio.estevam-KZfg59tc24xl57MIdRCFDg,
computersforpeace-Re5JQEeQqe8AvxtiuMwx3w,
michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/
Thi patch series add the support for Engicam IMXUL product
https://community.freescale.com/docs/DOC-328428
Based on Freescale™ i.MX 6UltraLite processor, a high performance,
ultra-efficient processor family featuring an advanced implementation
of a single ARM™ Cortex™-A7 core, which operates at speeds up to 528 MHz.
The new ENGICAM GEA M6UL module is suitable for cost effective HMI
applications requiring high performance CPU.
Michael Trimarchi (4):
ARM: dts: imx6ul: Add flexcan1 and flexcan2 support
ARM: dts: imx6ul: Add LCDIF support
ARM: dts: imx6ul: Add GPMI nand controller support
ARM: dts: imx6ul-geam: Add Engicam IMX6UL GEA M6UL initial support
arch/arm/boot/dts/Makefile | 3 +-
arch/arm/boot/dts/imx6ul-geam-kit.dts | 102 +++++++++
arch/arm/boot/dts/imx6ul-geam.dtsi | 371 +++++++++++++++++++++++++++++++++
arch/arm/boot/dts/imx6ul.dtsi | 68 ++++++
drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 10 +
drivers/mtd/nand/gpmi-nand/gpmi-nand.h | 6 +-
6 files changed, 557 insertions(+), 3 deletions(-)
create mode 100644 arch/arm/boot/dts/imx6ul-geam-kit.dts
create mode 100644 arch/arm/boot/dts/imx6ul-geam.dtsi
--
2.7.0
--
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^ permalink raw reply [flat|nested] 44+ messages in thread
* [PATCH 1/4] ARM: dts: imx6ul: Add flexcan1 and flexcan2 support
@ 2016-02-20 10:20 ` Michael Trimarchi
0 siblings, 0 replies; 44+ messages in thread
From: Michael Trimarchi @ 2016-02-20 10:20 UTC (permalink / raw)
To: linux-arm-kernel
Add support for FLEXCAN1 and FLEXCAN2.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
---
arch/arm/boot/dts/imx6ul.dtsi | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index 99b6465..cd32d1d 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -14,6 +14,8 @@
/ {
aliases {
+ can0 = &flexcan1;
+ can1 = &flexcan2;
ethernet0 = &fec1;
ethernet1 = &fec2;
gpio0 = &gpio1;
@@ -234,6 +236,28 @@
clock-names = "ipg", "per";
status = "disabled";
};
+
+ flexcan1: can at 02090000 {
+ compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan";
+ reg = <0x02090000 0x4000>;
+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX6UL_CLK_CAN1_IPG>,
+ <&clks IMX6UL_CLK_CAN1_SERIAL>;
+ clock-names = "ipg", "per";
+ stop-mode = <&gpr 0x10 1 0x10 17>;
+ status = "disabled";
+ };
+
+ flexcan2: can at 02094000 {
+ compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan";
+ reg = <0x02094000 0x4000>;
+ interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX6UL_CLK_CAN2_IPG>,
+ <&clks IMX6UL_CLK_CAN2_SERIAL>;
+ clock-names = "ipg", "per";
+ stop-mode = <&gpr 0x10 2 0x10 18>;
+ status = "disabled";
+ };
};
gpt1: gpt at 02098000 {
--
2.7.0
^ permalink raw reply related [flat|nested] 44+ messages in thread* [PATCH 1/4] ARM: dts: imx6ul: Add flexcan1 and flexcan2 support
@ 2016-02-20 10:20 ` Michael Trimarchi
0 siblings, 0 replies; 44+ messages in thread
From: Michael Trimarchi @ 2016-02-20 10:20 UTC (permalink / raw)
To: shawnguo-DgEjT+Ai2ygdnm+yROfE0A, kernel-bIcnvbaLZ9MEGnE8C9+IrQ
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA,
fabio.estevam-KZfg59tc24xl57MIdRCFDg,
computersforpeace-Re5JQEeQqe8AvxtiuMwx3w,
michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/
Add support for FLEXCAN1 and FLEXCAN2.
Signed-off-by: Michael Trimarchi <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
---
arch/arm/boot/dts/imx6ul.dtsi | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index 99b6465..cd32d1d 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -14,6 +14,8 @@
/ {
aliases {
+ can0 = &flexcan1;
+ can1 = &flexcan2;
ethernet0 = &fec1;
ethernet1 = &fec2;
gpio0 = &gpio1;
@@ -234,6 +236,28 @@
clock-names = "ipg", "per";
status = "disabled";
};
+
+ flexcan1: can@02090000 {
+ compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan";
+ reg = <0x02090000 0x4000>;
+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX6UL_CLK_CAN1_IPG>,
+ <&clks IMX6UL_CLK_CAN1_SERIAL>;
+ clock-names = "ipg", "per";
+ stop-mode = <&gpr 0x10 1 0x10 17>;
+ status = "disabled";
+ };
+
+ flexcan2: can@02094000 {
+ compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan";
+ reg = <0x02094000 0x4000>;
+ interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX6UL_CLK_CAN2_IPG>,
+ <&clks IMX6UL_CLK_CAN2_SERIAL>;
+ clock-names = "ipg", "per";
+ stop-mode = <&gpr 0x10 2 0x10 18>;
+ status = "disabled";
+ };
};
gpt1: gpt@02098000 {
--
2.7.0
--
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^ permalink raw reply related [flat|nested] 44+ messages in thread* [PATCH 1/4] ARM: dts: imx6ul: Add flexcan1 and flexcan2 support
@ 2016-02-20 14:02 ` Fabio Estevam
0 siblings, 0 replies; 44+ messages in thread
From: Fabio Estevam @ 2016-02-20 14:02 UTC (permalink / raw)
To: linux-arm-kernel
On Sat, Feb 20, 2016 at 8:20 AM, Michael Trimarchi
<michael@amarulasolutions.com> wrote:
> +
> + flexcan1: can at 02090000 {
> + compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan";
> + reg = <0x02090000 0x4000>;
> + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clks IMX6UL_CLK_CAN1_IPG>,
> + <&clks IMX6UL_CLK_CAN1_SERIAL>;
> + clock-names = "ipg", "per";
> + stop-mode = <&gpr 0x10 1 0x10 17>;
This 'stop-mode' property is not handled in mainline, only in NXP
kernel, so I suggest to drop this.
^ permalink raw reply [flat|nested] 44+ messages in thread* Re: [PATCH 1/4] ARM: dts: imx6ul: Add flexcan1 and flexcan2 support
@ 2016-02-20 14:02 ` Fabio Estevam
0 siblings, 0 replies; 44+ messages in thread
From: Fabio Estevam @ 2016-02-20 14:02 UTC (permalink / raw)
To: Michael Trimarchi
Cc: Shawn Guo, Sascha Hauer, Fabio Estevam,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Brian Norris,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
On Sat, Feb 20, 2016 at 8:20 AM, Michael Trimarchi
<michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org> wrote:
> +
> + flexcan1: can@02090000 {
> + compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan";
> + reg = <0x02090000 0x4000>;
> + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clks IMX6UL_CLK_CAN1_IPG>,
> + <&clks IMX6UL_CLK_CAN1_SERIAL>;
> + clock-names = "ipg", "per";
> + stop-mode = <&gpr 0x10 1 0x10 17>;
This 'stop-mode' property is not handled in mainline, only in NXP
kernel, so I suggest to drop this.
--
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^ permalink raw reply [flat|nested] 44+ messages in thread* [PATCH 1/4] ARM: dts: imx6ul: Add flexcan1 and flexcan2 support
@ 2016-02-20 17:18 ` Michael Trimarchi
0 siblings, 0 replies; 44+ messages in thread
From: Michael Trimarchi @ 2016-02-20 17:18 UTC (permalink / raw)
To: linux-arm-kernel
Hi Fabio
On Sat, Feb 20, 2016 at 12:02:51PM -0200, Fabio Estevam wrote:
> On Sat, Feb 20, 2016 at 8:20 AM, Michael Trimarchi
> <michael@amarulasolutions.com> wrote:
>
> > +
> > + flexcan1: can at 02090000 {
> > + compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan";
> > + reg = <0x02090000 0x4000>;
> > + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&clks IMX6UL_CLK_CAN1_IPG>,
> > + <&clks IMX6UL_CLK_CAN1_SERIAL>;
> > + clock-names = "ipg", "per";
> > + stop-mode = <&gpr 0x10 1 0x10 17>;
>
> This 'stop-mode' property is not handled in mainline, only in NXP
> kernel, so I suggest to drop this.
ok. Can you point me out to a driver in freescale source that use it?
Michael
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
^ permalink raw reply [flat|nested] 44+ messages in thread* Re: [PATCH 1/4] ARM: dts: imx6ul: Add flexcan1 and flexcan2 support
@ 2016-02-20 17:18 ` Michael Trimarchi
0 siblings, 0 replies; 44+ messages in thread
From: Michael Trimarchi @ 2016-02-20 17:18 UTC (permalink / raw)
To: Fabio Estevam
Cc: Shawn Guo, Sascha Hauer, Fabio Estevam,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Brian Norris,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Hi Fabio
On Sat, Feb 20, 2016 at 12:02:51PM -0200, Fabio Estevam wrote:
> On Sat, Feb 20, 2016 at 8:20 AM, Michael Trimarchi
> <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org> wrote:
>
> > +
> > + flexcan1: can@02090000 {
> > + compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan";
> > + reg = <0x02090000 0x4000>;
> > + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&clks IMX6UL_CLK_CAN1_IPG>,
> > + <&clks IMX6UL_CLK_CAN1_SERIAL>;
> > + clock-names = "ipg", "per";
> > + stop-mode = <&gpr 0x10 1 0x10 17>;
>
> This 'stop-mode' property is not handled in mainline, only in NXP
> kernel, so I suggest to drop this.
ok. Can you point me out to a driver in freescale source that use it?
Michael
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
--
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^ permalink raw reply [flat|nested] 44+ messages in thread* [PATCH 1/4] ARM: dts: imx6ul: Add flexcan1 and flexcan2 support
2016-02-20 17:18 ` Michael Trimarchi
@ 2016-02-20 17:29 ` Fabio Estevam
-1 siblings, 0 replies; 44+ messages in thread
From: Fabio Estevam @ 2016-02-20 17:29 UTC (permalink / raw)
To: linux-arm-kernel
On Sat, Feb 20, 2016 at 3:18 PM, Michael Trimarchi
<michael@amarulasolutions.com> wrote:
> ok. Can you point me out to a driver in freescale source that use it?
http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/drivers/net/can/flexcan.c?h=imx_3.14.52_1.1.0_ga#n1146
^ permalink raw reply [flat|nested] 44+ messages in thread
* Re: [PATCH 1/4] ARM: dts: imx6ul: Add flexcan1 and flexcan2 support
@ 2016-02-20 17:29 ` Fabio Estevam
0 siblings, 0 replies; 44+ messages in thread
From: Fabio Estevam @ 2016-02-20 17:29 UTC (permalink / raw)
To: Michael Trimarchi
Cc: Shawn Guo, Sascha Hauer, Fabio Estevam,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Brian Norris,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
On Sat, Feb 20, 2016 at 3:18 PM, Michael Trimarchi
<michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org> wrote:
> ok. Can you point me out to a driver in freescale source that use it?
http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/drivers/net/can/flexcan.c?h=imx_3.14.52_1.1.0_ga#n1146
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^ permalink raw reply [flat|nested] 44+ messages in thread
* [PATCH V2 1/4] ARM: dts: imx6ul: Add flexcan1 and flexcan2 support
2016-02-20 17:29 ` Fabio Estevam
@ 2016-02-21 11:18 ` Michael Trimarchi
-1 siblings, 0 replies; 44+ messages in thread
From: Michael Trimarchi @ 2016-02-21 11:18 UTC (permalink / raw)
To: linux-arm-kernel
Add support for FLEXCAN1 and FLEXCAN2.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
---
Changes in V2:
- remove stop-mode property because is not handle in
mainline
arch/arm/boot/dts/imx6ul.dtsi | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index 99b6465..f7b852e 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -14,6 +14,8 @@
/ {
aliases {
+ can0 = &flexcan1;
+ can1 = &flexcan2;
ethernet0 = &fec1;
ethernet1 = &fec2;
gpio0 = &gpio1;
@@ -234,6 +236,26 @@
clock-names = "ipg", "per";
status = "disabled";
};
+
+ flexcan1: can at 02090000 {
+ compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan";
+ reg = <0x02090000 0x4000>;
+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX6UL_CLK_CAN1_IPG>,
+ <&clks IMX6UL_CLK_CAN1_SERIAL>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
+
+ flexcan2: can at 02094000 {
+ compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan";
+ reg = <0x02094000 0x4000>;
+ interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX6UL_CLK_CAN2_IPG>,
+ <&clks IMX6UL_CLK_CAN2_SERIAL>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
};
gpt1: gpt at 02098000 {
--
2.7.0
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
^ permalink raw reply related [flat|nested] 44+ messages in thread* [PATCH V2 1/4] ARM: dts: imx6ul: Add flexcan1 and flexcan2 support
@ 2016-02-21 11:18 ` Michael Trimarchi
0 siblings, 0 replies; 44+ messages in thread
From: Michael Trimarchi @ 2016-02-21 11:18 UTC (permalink / raw)
To: Fabio Estevam
Cc: Fabio Estevam, devicetree@vger.kernel.org, Sascha Hauer,
Brian Norris, Shawn Guo, linux-arm-kernel@lists.infradead.org
Add support for FLEXCAN1 and FLEXCAN2.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
---
Changes in V2:
- remove stop-mode property because is not handle in
mainline
arch/arm/boot/dts/imx6ul.dtsi | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index 99b6465..f7b852e 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -14,6 +14,8 @@
/ {
aliases {
+ can0 = &flexcan1;
+ can1 = &flexcan2;
ethernet0 = &fec1;
ethernet1 = &fec2;
gpio0 = &gpio1;
@@ -234,6 +236,26 @@
clock-names = "ipg", "per";
status = "disabled";
};
+
+ flexcan1: can@02090000 {
+ compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan";
+ reg = <0x02090000 0x4000>;
+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX6UL_CLK_CAN1_IPG>,
+ <&clks IMX6UL_CLK_CAN1_SERIAL>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
+
+ flexcan2: can@02094000 {
+ compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan";
+ reg = <0x02094000 0x4000>;
+ interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX6UL_CLK_CAN2_IPG>,
+ <&clks IMX6UL_CLK_CAN2_SERIAL>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
};
gpt1: gpt@02098000 {
--
2.7.0
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
^ permalink raw reply related [flat|nested] 44+ messages in thread
* [PATCH 2/4] ARM: dts: imx6ul: Add LCDIF support
@ 2016-02-20 10:20 ` Michael Trimarchi
0 siblings, 0 replies; 44+ messages in thread
From: Michael Trimarchi @ 2016-02-20 10:20 UTC (permalink / raw)
To: linux-arm-kernel
Add support for LCDIF.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
---
arch/arm/boot/dts/imx6ul.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index cd32d1d..f369fa4 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -696,6 +696,17 @@
reg = <0x021b0000 0x4000>;
};
+ lcdif: lcdif at 021c8000 {
+ compatible = "fsl,imx6ul-lcdif", "fsl,imx28-lcdif";
+ reg = <0x021c8000 0x4000>;
+ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX6UL_CLK_LCDIF_PIX>,
+ <&clks IMX6UL_CLK_LCDIF_APB>,
+ <&clks IMX6UL_CLK_DUMMY>;
+ clock-names = "pix", "axi", "disp_axi";
+ status = "disabled";
+ };
+
qspi: qspi at 021e0000 {
#address-cells = <1>;
#size-cells = <0>;
--
2.7.0
^ permalink raw reply related [flat|nested] 44+ messages in thread* [PATCH 2/4] ARM: dts: imx6ul: Add LCDIF support
@ 2016-02-20 10:20 ` Michael Trimarchi
0 siblings, 0 replies; 44+ messages in thread
From: Michael Trimarchi @ 2016-02-20 10:20 UTC (permalink / raw)
To: shawnguo-DgEjT+Ai2ygdnm+yROfE0A, kernel-bIcnvbaLZ9MEGnE8C9+IrQ
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA,
fabio.estevam-KZfg59tc24xl57MIdRCFDg,
computersforpeace-Re5JQEeQqe8AvxtiuMwx3w,
michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/
Add support for LCDIF.
Signed-off-by: Michael Trimarchi <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
---
arch/arm/boot/dts/imx6ul.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index cd32d1d..f369fa4 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -696,6 +696,17 @@
reg = <0x021b0000 0x4000>;
};
+ lcdif: lcdif@021c8000 {
+ compatible = "fsl,imx6ul-lcdif", "fsl,imx28-lcdif";
+ reg = <0x021c8000 0x4000>;
+ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX6UL_CLK_LCDIF_PIX>,
+ <&clks IMX6UL_CLK_LCDIF_APB>,
+ <&clks IMX6UL_CLK_DUMMY>;
+ clock-names = "pix", "axi", "disp_axi";
+ status = "disabled";
+ };
+
qspi: qspi@021e0000 {
#address-cells = <1>;
#size-cells = <0>;
--
2.7.0
--
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^ permalink raw reply related [flat|nested] 44+ messages in thread
* [PATCH 3/4] ARM: dts: imx6ul: Add GPMI nand controller support
@ 2016-02-20 10:20 ` Michael Trimarchi
0 siblings, 0 replies; 44+ messages in thread
From: Michael Trimarchi @ 2016-02-20 10:20 UTC (permalink / raw)
To: linux-arm-kernel
Add support for GPMI nand controller.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
---
arch/arm/boot/dts/imx6ul.dtsi | 33 +++++++++++++++++++++++++++++++++
drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 10 ++++++++++
drivers/mtd/nand/gpmi-nand/gpmi-nand.h | 6 ++++--
3 files changed, 47 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index f369fa4..42b0a29 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -142,6 +142,39 @@
reg = <0x00900000 0x20000>;
};
+ dma_apbh: dma-apbh at 01804000 {
+ compatible = "fsl,imx6ul-dma-apbh", "fsl,imx28-dma-apbh";
+ reg = <0x01804000 0x2000>;
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
+ #dma-cells = <1>;
+ dma-channels = <4>;
+ clocks = <&clks IMX6UL_CLK_APBHDMA>;
+ };
+
+ gpmi: gpmi-nand at 01806000 {
+ compatible = "fsl,imx6ul-gpmi-nand";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x01806000 0x2000>, <0x01808000 0x4000>;
+ reg-names = "gpmi-nand", "bch";
+ interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "bch";
+ clocks = <&clks IMX6UL_CLK_GPMI_IO>,
+ <&clks IMX6UL_CLK_GPMI_APB>,
+ <&clks IMX6UL_CLK_GPMI_BCH>,
+ <&clks IMX6UL_CLK_GPMI_BCH_APB>,
+ <&clks IMX6UL_CLK_PER_BCH>;
+ clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch",
+ "gpmi_bch_apb", "per1_bch";
+ dmas = <&dma_apbh 0>;
+ dma-names = "rx-tx";
+ status = "disabled";
+ };
+
aips1: aips-bus at 02000000 {
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
index 235ddcb..b7528a1 100644
--- a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
+++ b/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
@@ -77,6 +77,12 @@ static const struct gpmi_devdata gpmi_devdata_imx6sx = {
.max_chain_delay = 12,
};
+static const struct gpmi_devdata gpmi_devdata_imx6ul = {
+ .type = IS_MX6UL,
+ .bch_max_ecc_strength = 40,
+ .max_chain_delay = 12,
+};
+
static irqreturn_t bch_irq(int irq, void *cookie)
{
struct gpmi_nand_data *this = cookie;
@@ -1975,7 +1981,11 @@ static const struct of_device_id gpmi_nand_id_table[] = {
}, {
.compatible = "fsl,imx6sx-gpmi-nand",
.data = &gpmi_devdata_imx6sx,
+ }, {
+ .compatible = "fsl,imx6ul-gpmi-nand",
+ .data = &gpmi_devdata_imx6ul,
}, {}
+
};
MODULE_DEVICE_TABLE(of, gpmi_nand_id_table);
diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-nand.h b/drivers/mtd/nand/gpmi-nand/gpmi-nand.h
index 4e49a1f..c5fa52a 100644
--- a/drivers/mtd/nand/gpmi-nand/gpmi-nand.h
+++ b/drivers/mtd/nand/gpmi-nand/gpmi-nand.h
@@ -123,7 +123,8 @@ enum gpmi_type {
IS_MX23,
IS_MX28,
IS_MX6Q,
- IS_MX6SX
+ IS_MX6SX,
+ IS_MX6UL,
};
struct gpmi_devdata {
@@ -305,6 +306,7 @@ void gpmi_copy_bits(u8 *dst, size_t dst_bit_off,
#define GPMI_IS_MX28(x) ((x)->devdata->type == IS_MX28)
#define GPMI_IS_MX6Q(x) ((x)->devdata->type == IS_MX6Q)
#define GPMI_IS_MX6SX(x) ((x)->devdata->type == IS_MX6SX)
+#define GPMI_IS_MX6UL(x) ((x)->devdata->type == IS_MX6UL)
-#define GPMI_IS_MX6(x) (GPMI_IS_MX6Q(x) || GPMI_IS_MX6SX(x))
+#define GPMI_IS_MX6(x) (GPMI_IS_MX6Q(x) || GPMI_IS_MX6SX(x) || GPMI_IS_MX6UL(x))
#endif
--
2.7.0
^ permalink raw reply related [flat|nested] 44+ messages in thread* [PATCH 3/4] ARM: dts: imx6ul: Add GPMI nand controller support
@ 2016-02-20 10:20 ` Michael Trimarchi
0 siblings, 0 replies; 44+ messages in thread
From: Michael Trimarchi @ 2016-02-20 10:20 UTC (permalink / raw)
To: shawnguo-DgEjT+Ai2ygdnm+yROfE0A, kernel-bIcnvbaLZ9MEGnE8C9+IrQ
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA,
fabio.estevam-KZfg59tc24xl57MIdRCFDg,
computersforpeace-Re5JQEeQqe8AvxtiuMwx3w,
michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/
Add support for GPMI nand controller.
Signed-off-by: Michael Trimarchi <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
---
arch/arm/boot/dts/imx6ul.dtsi | 33 +++++++++++++++++++++++++++++++++
drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 10 ++++++++++
drivers/mtd/nand/gpmi-nand/gpmi-nand.h | 6 ++++--
3 files changed, 47 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index f369fa4..42b0a29 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -142,6 +142,39 @@
reg = <0x00900000 0x20000>;
};
+ dma_apbh: dma-apbh@01804000 {
+ compatible = "fsl,imx6ul-dma-apbh", "fsl,imx28-dma-apbh";
+ reg = <0x01804000 0x2000>;
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
+ #dma-cells = <1>;
+ dma-channels = <4>;
+ clocks = <&clks IMX6UL_CLK_APBHDMA>;
+ };
+
+ gpmi: gpmi-nand@01806000 {
+ compatible = "fsl,imx6ul-gpmi-nand";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x01806000 0x2000>, <0x01808000 0x4000>;
+ reg-names = "gpmi-nand", "bch";
+ interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "bch";
+ clocks = <&clks IMX6UL_CLK_GPMI_IO>,
+ <&clks IMX6UL_CLK_GPMI_APB>,
+ <&clks IMX6UL_CLK_GPMI_BCH>,
+ <&clks IMX6UL_CLK_GPMI_BCH_APB>,
+ <&clks IMX6UL_CLK_PER_BCH>;
+ clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch",
+ "gpmi_bch_apb", "per1_bch";
+ dmas = <&dma_apbh 0>;
+ dma-names = "rx-tx";
+ status = "disabled";
+ };
+
aips1: aips-bus@02000000 {
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
index 235ddcb..b7528a1 100644
--- a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
+++ b/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
@@ -77,6 +77,12 @@ static const struct gpmi_devdata gpmi_devdata_imx6sx = {
.max_chain_delay = 12,
};
+static const struct gpmi_devdata gpmi_devdata_imx6ul = {
+ .type = IS_MX6UL,
+ .bch_max_ecc_strength = 40,
+ .max_chain_delay = 12,
+};
+
static irqreturn_t bch_irq(int irq, void *cookie)
{
struct gpmi_nand_data *this = cookie;
@@ -1975,7 +1981,11 @@ static const struct of_device_id gpmi_nand_id_table[] = {
}, {
.compatible = "fsl,imx6sx-gpmi-nand",
.data = &gpmi_devdata_imx6sx,
+ }, {
+ .compatible = "fsl,imx6ul-gpmi-nand",
+ .data = &gpmi_devdata_imx6ul,
}, {}
+
};
MODULE_DEVICE_TABLE(of, gpmi_nand_id_table);
diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-nand.h b/drivers/mtd/nand/gpmi-nand/gpmi-nand.h
index 4e49a1f..c5fa52a 100644
--- a/drivers/mtd/nand/gpmi-nand/gpmi-nand.h
+++ b/drivers/mtd/nand/gpmi-nand/gpmi-nand.h
@@ -123,7 +123,8 @@ enum gpmi_type {
IS_MX23,
IS_MX28,
IS_MX6Q,
- IS_MX6SX
+ IS_MX6SX,
+ IS_MX6UL,
};
struct gpmi_devdata {
@@ -305,6 +306,7 @@ void gpmi_copy_bits(u8 *dst, size_t dst_bit_off,
#define GPMI_IS_MX28(x) ((x)->devdata->type == IS_MX28)
#define GPMI_IS_MX6Q(x) ((x)->devdata->type == IS_MX6Q)
#define GPMI_IS_MX6SX(x) ((x)->devdata->type == IS_MX6SX)
+#define GPMI_IS_MX6UL(x) ((x)->devdata->type == IS_MX6UL)
-#define GPMI_IS_MX6(x) (GPMI_IS_MX6Q(x) || GPMI_IS_MX6SX(x))
+#define GPMI_IS_MX6(x) (GPMI_IS_MX6Q(x) || GPMI_IS_MX6SX(x) || GPMI_IS_MX6UL(x))
#endif
--
2.7.0
--
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^ permalink raw reply related [flat|nested] 44+ messages in thread* [PATCH 3/4] ARM: dts: imx6ul: Add GPMI nand controller support
@ 2016-02-20 11:57 ` Fabio Estevam
0 siblings, 0 replies; 44+ messages in thread
From: Fabio Estevam @ 2016-02-20 11:57 UTC (permalink / raw)
To: linux-arm-kernel
Hi Michael,
On Sat, Feb 20, 2016 at 8:20 AM, Michael Trimarchi
<michael@amarulasolutions.com> wrote:
> Add support for GPMI nand controller.
>
> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> ---
> arch/arm/boot/dts/imx6ul.dtsi | 33 +++++++++++++++++++++++++++++++++
> drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 10 ++++++++++
> drivers/mtd/nand/gpmi-nand/gpmi-nand.h | 6 ++++--
It would be better to split the dts and mtd parts in two patches.
^ permalink raw reply [flat|nested] 44+ messages in thread
* Re: [PATCH 3/4] ARM: dts: imx6ul: Add GPMI nand controller support
@ 2016-02-20 11:57 ` Fabio Estevam
0 siblings, 0 replies; 44+ messages in thread
From: Fabio Estevam @ 2016-02-20 11:57 UTC (permalink / raw)
To: Michael Trimarchi
Cc: Shawn Guo, Sascha Hauer, Fabio Estevam,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Brian Norris,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Hi Michael,
On Sat, Feb 20, 2016 at 8:20 AM, Michael Trimarchi
<michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org> wrote:
> Add support for GPMI nand controller.
>
> Signed-off-by: Michael Trimarchi <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
> ---
> arch/arm/boot/dts/imx6ul.dtsi | 33 +++++++++++++++++++++++++++++++++
> drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 10 ++++++++++
> drivers/mtd/nand/gpmi-nand/gpmi-nand.h | 6 ++++--
It would be better to split the dts and mtd parts in two patches.
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
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^ permalink raw reply [flat|nested] 44+ messages in thread
* [PATCH 3/4] ARM: dts: imx6ul: Add GPMI nand controller support
@ 2016-02-20 17:21 ` Michael Trimarchi
0 siblings, 0 replies; 44+ messages in thread
From: Michael Trimarchi @ 2016-02-20 17:21 UTC (permalink / raw)
To: linux-arm-kernel
Hi
On Sat, Feb 20, 2016 at 09:57:27AM -0200, Fabio Estevam wrote:
> Hi Michael,
>
> On Sat, Feb 20, 2016 at 8:20 AM, Michael Trimarchi
> <michael@amarulasolutions.com> wrote:
> > Add support for GPMI nand controller.
> >
> > Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> > ---
> > arch/arm/boot/dts/imx6ul.dtsi | 33 +++++++++++++++++++++++++++++++++
> > drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 10 ++++++++++
> > drivers/mtd/nand/gpmi-nand/gpmi-nand.h | 6 ++++--
>
> It would be better to split the dts and mtd parts in two patches.
I'm thinking even to drop the IS_TYPE for the IMX6QUL. Does it make sense
to have or let compatible to the one that is already defined?
Michael
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
^ permalink raw reply [flat|nested] 44+ messages in thread
* Re: [PATCH 3/4] ARM: dts: imx6ul: Add GPMI nand controller support
@ 2016-02-20 17:21 ` Michael Trimarchi
0 siblings, 0 replies; 44+ messages in thread
From: Michael Trimarchi @ 2016-02-20 17:21 UTC (permalink / raw)
To: Fabio Estevam
Cc: Shawn Guo, Sascha Hauer, Fabio Estevam,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Brian Norris,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Hi
On Sat, Feb 20, 2016 at 09:57:27AM -0200, Fabio Estevam wrote:
> Hi Michael,
>
> On Sat, Feb 20, 2016 at 8:20 AM, Michael Trimarchi
> <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org> wrote:
> > Add support for GPMI nand controller.
> >
> > Signed-off-by: Michael Trimarchi <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
> > ---
> > arch/arm/boot/dts/imx6ul.dtsi | 33 +++++++++++++++++++++++++++++++++
> > drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 10 ++++++++++
> > drivers/mtd/nand/gpmi-nand/gpmi-nand.h | 6 ++++--
>
> It would be better to split the dts and mtd parts in two patches.
I'm thinking even to drop the IS_TYPE for the IMX6QUL. Does it make sense
to have or let compatible to the one that is already defined?
Michael
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
--
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^ permalink raw reply [flat|nested] 44+ messages in thread
* [PATCH V2 3/4] ARM: dts: imx6ul: Add GPMI nand controller support
2016-02-20 17:21 ` Michael Trimarchi
@ 2016-02-21 11:29 ` Michael Trimarchi
-1 siblings, 0 replies; 44+ messages in thread
From: Michael Trimarchi @ 2016-02-21 11:29 UTC (permalink / raw)
To: linux-arm-kernel
Add support for GPMI nand controller.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
---
Changes V2:
- drop special IMXUL type because seems that is compatible
with IMX6Q
arch/arm/boot/dts/imx6ul.dtsi | 33 +++++++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index f4daf97..1a486ac 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -142,6 +142,39 @@
reg = <0x00900000 0x20000>;
};
+ dma_apbh: dma-apbh at 01804000 {
+ compatible = "fsl,imx6ul-dma-apbh", "fsl,imx28-dma-apbh";
+ reg = <0x01804000 0x2000>;
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
+ #dma-cells = <1>;
+ dma-channels = <4>;
+ clocks = <&clks IMX6UL_CLK_APBHDMA>;
+ };
+
+ gpmi: gpmi-nand at 01806000 {
+ compatible = "fsl,imx6q-gpmi-nand";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x01806000 0x2000>, <0x01808000 0x4000>;
+ reg-names = "gpmi-nand", "bch";
+ interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "bch";
+ clocks = <&clks IMX6UL_CLK_GPMI_IO>,
+ <&clks IMX6UL_CLK_GPMI_APB>,
+ <&clks IMX6UL_CLK_GPMI_BCH>,
+ <&clks IMX6UL_CLK_GPMI_BCH_APB>,
+ <&clks IMX6UL_CLK_PER_BCH>;
+ clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch",
+ "gpmi_bch_apb", "per1_bch";
+ dmas = <&dma_apbh 0>;
+ dma-names = "rx-tx";
+ status = "disabled";
+ };
+
aips1: aips-bus at 02000000 {
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
--
2.7.0
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
^ permalink raw reply related [flat|nested] 44+ messages in thread* [PATCH V2 3/4] ARM: dts: imx6ul: Add GPMI nand controller support
@ 2016-02-21 11:29 ` Michael Trimarchi
0 siblings, 0 replies; 44+ messages in thread
From: Michael Trimarchi @ 2016-02-21 11:29 UTC (permalink / raw)
To: Fabio Estevam
Cc: Fabio Estevam, devicetree@vger.kernel.org, Sascha Hauer,
Brian Norris, Shawn Guo, linux-arm-kernel@lists.infradead.org
Add support for GPMI nand controller.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
---
Changes V2:
- drop special IMXUL type because seems that is compatible
with IMX6Q
arch/arm/boot/dts/imx6ul.dtsi | 33 +++++++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index f4daf97..1a486ac 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -142,6 +142,39 @@
reg = <0x00900000 0x20000>;
};
+ dma_apbh: dma-apbh@01804000 {
+ compatible = "fsl,imx6ul-dma-apbh", "fsl,imx28-dma-apbh";
+ reg = <0x01804000 0x2000>;
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
+ #dma-cells = <1>;
+ dma-channels = <4>;
+ clocks = <&clks IMX6UL_CLK_APBHDMA>;
+ };
+
+ gpmi: gpmi-nand@01806000 {
+ compatible = "fsl,imx6q-gpmi-nand";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x01806000 0x2000>, <0x01808000 0x4000>;
+ reg-names = "gpmi-nand", "bch";
+ interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "bch";
+ clocks = <&clks IMX6UL_CLK_GPMI_IO>,
+ <&clks IMX6UL_CLK_GPMI_APB>,
+ <&clks IMX6UL_CLK_GPMI_BCH>,
+ <&clks IMX6UL_CLK_GPMI_BCH_APB>,
+ <&clks IMX6UL_CLK_PER_BCH>;
+ clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch",
+ "gpmi_bch_apb", "per1_bch";
+ dmas = <&dma_apbh 0>;
+ dma-names = "rx-tx";
+ status = "disabled";
+ };
+
aips1: aips-bus@02000000 {
compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>;
--
2.7.0
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
^ permalink raw reply related [flat|nested] 44+ messages in thread* [PATCH V2 3/4] ARM: dts: imx6ul: Add GPMI nand controller support
2016-02-21 11:29 ` Michael Trimarchi
@ 2016-02-22 8:26 ` Lothar Waßmann
-1 siblings, 0 replies; 44+ messages in thread
From: Lothar Waßmann @ 2016-02-22 8:26 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
On Sun, 21 Feb 2016 12:29:53 +0100 Michael Trimarchi wrote:
> Add support for GPMI nand controller.
>
> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> ---
> Changes V2:
> - drop special IMXUL type because seems that is compatible
> with IMX6Q
>
> arch/arm/boot/dts/imx6ul.dtsi | 33 +++++++++++++++++++++++++++++++++
> 1 file changed, 33 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
> index f4daf97..1a486ac 100644
> --- a/arch/arm/boot/dts/imx6ul.dtsi
> +++ b/arch/arm/boot/dts/imx6ul.dtsi
> @@ -142,6 +142,39 @@
> reg = <0x00900000 0x20000>;
> };
>
> + dma_apbh: dma-apbh at 01804000 {
> + compatible = "fsl,imx6ul-dma-apbh", "fsl,imx28-dma-apbh";
> + reg = <0x01804000 0x2000>;
> + interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
> + #dma-cells = <1>;
> + dma-channels = <4>;
> + clocks = <&clks IMX6UL_CLK_APBHDMA>;
> + };
> +
> + gpmi: gpmi-nand at 01806000 {
> + compatible = "fsl,imx6q-gpmi-nand";
>
You should still add an imx6ul specific compatible (likewise to the
dma_apbh).
Lothar Wa?mann
^ permalink raw reply [flat|nested] 44+ messages in thread* Re: [PATCH V2 3/4] ARM: dts: imx6ul: Add GPMI nand controller support
@ 2016-02-22 8:26 ` Lothar Waßmann
0 siblings, 0 replies; 44+ messages in thread
From: Lothar Waßmann @ 2016-02-22 8:26 UTC (permalink / raw)
To: Michael Trimarchi
Cc: Fabio Estevam, Fabio Estevam,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Sascha Hauer,
Brian Norris, Shawn Guo,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Hi,
On Sun, 21 Feb 2016 12:29:53 +0100 Michael Trimarchi wrote:
> Add support for GPMI nand controller.
>
> Signed-off-by: Michael Trimarchi <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
> ---
> Changes V2:
> - drop special IMXUL type because seems that is compatible
> with IMX6Q
>
> arch/arm/boot/dts/imx6ul.dtsi | 33 +++++++++++++++++++++++++++++++++
> 1 file changed, 33 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
> index f4daf97..1a486ac 100644
> --- a/arch/arm/boot/dts/imx6ul.dtsi
> +++ b/arch/arm/boot/dts/imx6ul.dtsi
> @@ -142,6 +142,39 @@
> reg = <0x00900000 0x20000>;
> };
>
> + dma_apbh: dma-apbh@01804000 {
> + compatible = "fsl,imx6ul-dma-apbh", "fsl,imx28-dma-apbh";
> + reg = <0x01804000 0x2000>;
> + interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
> + #dma-cells = <1>;
> + dma-channels = <4>;
> + clocks = <&clks IMX6UL_CLK_APBHDMA>;
> + };
> +
> + gpmi: gpmi-nand@01806000 {
> + compatible = "fsl,imx6q-gpmi-nand";
>
You should still add an imx6ul specific compatible (likewise to the
dma_apbh).
Lothar Waßmann
--
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^ permalink raw reply [flat|nested] 44+ messages in thread* [PATCH V2 3/4] ARM: dts: imx6ul: Add GPMI nand controller support
@ 2016-03-20 8:44 ` Michael Trimarchi
0 siblings, 0 replies; 44+ messages in thread
From: Michael Trimarchi @ 2016-03-20 8:44 UTC (permalink / raw)
To: linux-arm-kernel
Hi Lothar
On Mon, Feb 22, 2016 at 9:26 AM, Lothar Wa?mann <LW@karo-electronics.de> wrote:
> Hi,
>
> On Sun, 21 Feb 2016 12:29:53 +0100 Michael Trimarchi wrote:
>> Add support for GPMI nand controller.
>>
>> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
>> ---
>> Changes V2:
>> - drop special IMXUL type because seems that is compatible
>> with IMX6Q
>>
>> arch/arm/boot/dts/imx6ul.dtsi | 33 +++++++++++++++++++++++++++++++++
>> 1 file changed, 33 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
>> index f4daf97..1a486ac 100644
>> --- a/arch/arm/boot/dts/imx6ul.dtsi
>> +++ b/arch/arm/boot/dts/imx6ul.dtsi
>> @@ -142,6 +142,39 @@
>> reg = <0x00900000 0x20000>;
>> };
>>
>> + dma_apbh: dma-apbh at 01804000 {
>> + compatible = "fsl,imx6ul-dma-apbh", "fsl,imx28-dma-apbh";
>> + reg = <0x01804000 0x2000>;
>> + interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
>> + interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
>> + #dma-cells = <1>;
>> + dma-channels = <4>;
>> + clocks = <&clks IMX6UL_CLK_APBHDMA>;
>> + };
>> +
>> + gpmi: gpmi-nand at 01806000 {
>> + compatible = "fsl,imx6q-gpmi-nand";
>>
> You should still add an imx6ul specific compatible (likewise to the
> dma_apbh).
>
I understand your point but this seems that imx6q and imx6sx are
defined in the same way
Michael
>
>
> Lothar Wa?mann
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
^ permalink raw reply [flat|nested] 44+ messages in thread* Re: [PATCH V2 3/4] ARM: dts: imx6ul: Add GPMI nand controller support
@ 2016-03-20 8:44 ` Michael Trimarchi
0 siblings, 0 replies; 44+ messages in thread
From: Michael Trimarchi @ 2016-03-20 8:44 UTC (permalink / raw)
To: Lothar Waßmann
Cc: Fabio Estevam, Fabio Estevam,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Sascha Hauer,
Brian Norris, Shawn Guo,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Hi Lothar
On Mon, Feb 22, 2016 at 9:26 AM, Lothar Waßmann <LW@karo-electronics.de> wrote:
> Hi,
>
> On Sun, 21 Feb 2016 12:29:53 +0100 Michael Trimarchi wrote:
>> Add support for GPMI nand controller.
>>
>> Signed-off-by: Michael Trimarchi <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
>> ---
>> Changes V2:
>> - drop special IMXUL type because seems that is compatible
>> with IMX6Q
>>
>> arch/arm/boot/dts/imx6ul.dtsi | 33 +++++++++++++++++++++++++++++++++
>> 1 file changed, 33 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
>> index f4daf97..1a486ac 100644
>> --- a/arch/arm/boot/dts/imx6ul.dtsi
>> +++ b/arch/arm/boot/dts/imx6ul.dtsi
>> @@ -142,6 +142,39 @@
>> reg = <0x00900000 0x20000>;
>> };
>>
>> + dma_apbh: dma-apbh@01804000 {
>> + compatible = "fsl,imx6ul-dma-apbh", "fsl,imx28-dma-apbh";
>> + reg = <0x01804000 0x2000>;
>> + interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
>> + interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
>> + #dma-cells = <1>;
>> + dma-channels = <4>;
>> + clocks = <&clks IMX6UL_CLK_APBHDMA>;
>> + };
>> +
>> + gpmi: gpmi-nand@01806000 {
>> + compatible = "fsl,imx6q-gpmi-nand";
>>
> You should still add an imx6ul specific compatible (likewise to the
> dma_apbh).
>
I understand your point but this seems that imx6q and imx6sx are
defined in the same way
Michael
>
>
> Lothar Waßmann
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
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^ permalink raw reply [flat|nested] 44+ messages in thread* [PATCH V2 3/4] ARM: dts: imx6ul: Add GPMI nand controller support
@ 2016-03-21 9:47 ` Lothar Waßmann
0 siblings, 0 replies; 44+ messages in thread
From: Lothar Waßmann @ 2016-03-21 9:47 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
On Sun, 20 Mar 2016 09:44:19 +0100 Michael Trimarchi wrote:
> Hi Lothar
>
> On Mon, Feb 22, 2016 at 9:26 AM, Lothar Wa?mann <LW@karo-electronics.de> wrote:
> > Hi,
> >
> > On Sun, 21 Feb 2016 12:29:53 +0100 Michael Trimarchi wrote:
> >> Add support for GPMI nand controller.
> >>
> >> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> >> ---
> >> Changes V2:
> >> - drop special IMXUL type because seems that is compatible
> >> with IMX6Q
> >>
> >> arch/arm/boot/dts/imx6ul.dtsi | 33 +++++++++++++++++++++++++++++++++
> >> 1 file changed, 33 insertions(+)
> >>
> >> diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
> >> index f4daf97..1a486ac 100644
> >> --- a/arch/arm/boot/dts/imx6ul.dtsi
> >> +++ b/arch/arm/boot/dts/imx6ul.dtsi
> >> @@ -142,6 +142,39 @@
> >> reg = <0x00900000 0x20000>;
> >> };
> >>
> >> + dma_apbh: dma-apbh at 01804000 {
> >> + compatible = "fsl,imx6ul-dma-apbh", "fsl,imx28-dma-apbh";
> >> + reg = <0x01804000 0x2000>;
> >> + interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
> >> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
> >> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
> >> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
> >> + interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
> >> + #dma-cells = <1>;
> >> + dma-channels = <4>;
> >> + clocks = <&clks IMX6UL_CLK_APBHDMA>;
> >> + };
> >> +
> >> + gpmi: gpmi-nand at 01806000 {
> >> + compatible = "fsl,imx6q-gpmi-nand";
> >>
> > You should still add an imx6ul specific compatible (likewise to the
> > dma_apbh).
> >
>
> I understand your point but this seems that imx6q and imx6sx are
> defined in the same way
>
That doesn't mean they are correct. I got the same comment from Lucas
Stach in <1452678036.3694.51.camel@pengutronix.de>
Lothar Wa?mann
^ permalink raw reply [flat|nested] 44+ messages in thread* Re: [PATCH V2 3/4] ARM: dts: imx6ul: Add GPMI nand controller support
@ 2016-03-21 9:47 ` Lothar Waßmann
0 siblings, 0 replies; 44+ messages in thread
From: Lothar Waßmann @ 2016-03-21 9:47 UTC (permalink / raw)
To: Michael Trimarchi
Cc: Fabio Estevam, Fabio Estevam,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Sascha Hauer,
Brian Norris, Shawn Guo,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Hi,
On Sun, 20 Mar 2016 09:44:19 +0100 Michael Trimarchi wrote:
> Hi Lothar
>
> On Mon, Feb 22, 2016 at 9:26 AM, Lothar Waßmann <LW@karo-electronics.de> wrote:
> > Hi,
> >
> > On Sun, 21 Feb 2016 12:29:53 +0100 Michael Trimarchi wrote:
> >> Add support for GPMI nand controller.
> >>
> >> Signed-off-by: Michael Trimarchi <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
> >> ---
> >> Changes V2:
> >> - drop special IMXUL type because seems that is compatible
> >> with IMX6Q
> >>
> >> arch/arm/boot/dts/imx6ul.dtsi | 33 +++++++++++++++++++++++++++++++++
> >> 1 file changed, 33 insertions(+)
> >>
> >> diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
> >> index f4daf97..1a486ac 100644
> >> --- a/arch/arm/boot/dts/imx6ul.dtsi
> >> +++ b/arch/arm/boot/dts/imx6ul.dtsi
> >> @@ -142,6 +142,39 @@
> >> reg = <0x00900000 0x20000>;
> >> };
> >>
> >> + dma_apbh: dma-apbh@01804000 {
> >> + compatible = "fsl,imx6ul-dma-apbh", "fsl,imx28-dma-apbh";
> >> + reg = <0x01804000 0x2000>;
> >> + interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
> >> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
> >> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
> >> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
> >> + interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
> >> + #dma-cells = <1>;
> >> + dma-channels = <4>;
> >> + clocks = <&clks IMX6UL_CLK_APBHDMA>;
> >> + };
> >> +
> >> + gpmi: gpmi-nand@01806000 {
> >> + compatible = "fsl,imx6q-gpmi-nand";
> >>
> > You should still add an imx6ul specific compatible (likewise to the
> > dma_apbh).
> >
>
> I understand your point but this seems that imx6q and imx6sx are
> defined in the same way
>
That doesn't mean they are correct. I got the same comment from Lucas
Stach in <1452678036.3694.51.camel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
Lothar Waßmann
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
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^ permalink raw reply [flat|nested] 44+ messages in thread* [PATCH V2 3/4] ARM: dts: imx6ul: Add GPMI nand controller support
@ 2016-03-22 7:44 ` Michael Trimarchi
0 siblings, 0 replies; 44+ messages in thread
From: Michael Trimarchi @ 2016-03-22 7:44 UTC (permalink / raw)
To: linux-arm-kernel
Hi
On Mon, Mar 21, 2016 at 10:47 AM, Lothar Wa?mann <LW@karo-electronics.de> wrote:
> Hi,
>
> On Sun, 20 Mar 2016 09:44:19 +0100 Michael Trimarchi wrote:
>> Hi Lothar
>>
>> On Mon, Feb 22, 2016 at 9:26 AM, Lothar Wa?mann <LW@karo-electronics.de> wrote:
>> > Hi,
>> >
>> > On Sun, 21 Feb 2016 12:29:53 +0100 Michael Trimarchi wrote:
>> >> Add support for GPMI nand controller.
>> >>
>> >> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
>> >> ---
>> >> Changes V2:
>> >> - drop special IMXUL type because seems that is compatible
>> >> with IMX6Q
>> >>
>> >> arch/arm/boot/dts/imx6ul.dtsi | 33 +++++++++++++++++++++++++++++++++
>> >> 1 file changed, 33 insertions(+)
>> >>
>> >> diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
>> >> index f4daf97..1a486ac 100644
>> >> --- a/arch/arm/boot/dts/imx6ul.dtsi
>> >> +++ b/arch/arm/boot/dts/imx6ul.dtsi
>> >> @@ -142,6 +142,39 @@
>> >> reg = <0x00900000 0x20000>;
>> >> };
>> >>
>> >> + dma_apbh: dma-apbh at 01804000 {
>> >> + compatible = "fsl,imx6ul-dma-apbh", "fsl,imx28-dma-apbh";
>> >> + reg = <0x01804000 0x2000>;
>> >> + interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
>> >> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
>> >> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
>> >> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
>> >> + interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
>> >> + #dma-cells = <1>;
>> >> + dma-channels = <4>;
>> >> + clocks = <&clks IMX6UL_CLK_APBHDMA>;
>> >> + };
>> >> +
>> >> + gpmi: gpmi-nand at 01806000 {
>> >> + compatible = "fsl,imx6q-gpmi-nand";
>> >>
>> > You should still add an imx6ul specific compatible (likewise to the
>> > dma_apbh).
>> >
>>
>> I understand your point but this seems that imx6q and imx6sx are
>> defined in the same way
>>
> That doesn't mean they are correct. I got the same comment from Lucas
> Stach in <1452678036.3694.51.camel@pengutronix.de>
>
Ok, it's fine. I will fix it and re-post the series
Michael
>
> Lothar Wa?mann
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
^ permalink raw reply [flat|nested] 44+ messages in thread* Re: [PATCH V2 3/4] ARM: dts: imx6ul: Add GPMI nand controller support
@ 2016-03-22 7:44 ` Michael Trimarchi
0 siblings, 0 replies; 44+ messages in thread
From: Michael Trimarchi @ 2016-03-22 7:44 UTC (permalink / raw)
To: Lothar Waßmann
Cc: Fabio Estevam, Fabio Estevam,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Sascha Hauer,
Brian Norris, Shawn Guo,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Hi
On Mon, Mar 21, 2016 at 10:47 AM, Lothar Waßmann <LW@karo-electronics.de> wrote:
> Hi,
>
> On Sun, 20 Mar 2016 09:44:19 +0100 Michael Trimarchi wrote:
>> Hi Lothar
>>
>> On Mon, Feb 22, 2016 at 9:26 AM, Lothar Waßmann <LW@karo-electronics.de> wrote:
>> > Hi,
>> >
>> > On Sun, 21 Feb 2016 12:29:53 +0100 Michael Trimarchi wrote:
>> >> Add support for GPMI nand controller.
>> >>
>> >> Signed-off-by: Michael Trimarchi <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
>> >> ---
>> >> Changes V2:
>> >> - drop special IMXUL type because seems that is compatible
>> >> with IMX6Q
>> >>
>> >> arch/arm/boot/dts/imx6ul.dtsi | 33 +++++++++++++++++++++++++++++++++
>> >> 1 file changed, 33 insertions(+)
>> >>
>> >> diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
>> >> index f4daf97..1a486ac 100644
>> >> --- a/arch/arm/boot/dts/imx6ul.dtsi
>> >> +++ b/arch/arm/boot/dts/imx6ul.dtsi
>> >> @@ -142,6 +142,39 @@
>> >> reg = <0x00900000 0x20000>;
>> >> };
>> >>
>> >> + dma_apbh: dma-apbh@01804000 {
>> >> + compatible = "fsl,imx6ul-dma-apbh", "fsl,imx28-dma-apbh";
>> >> + reg = <0x01804000 0x2000>;
>> >> + interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
>> >> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
>> >> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
>> >> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
>> >> + interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
>> >> + #dma-cells = <1>;
>> >> + dma-channels = <4>;
>> >> + clocks = <&clks IMX6UL_CLK_APBHDMA>;
>> >> + };
>> >> +
>> >> + gpmi: gpmi-nand@01806000 {
>> >> + compatible = "fsl,imx6q-gpmi-nand";
>> >>
>> > You should still add an imx6ul specific compatible (likewise to the
>> > dma_apbh).
>> >
>>
>> I understand your point but this seems that imx6q and imx6sx are
>> defined in the same way
>>
> That doesn't mean they are correct. I got the same comment from Lucas
> Stach in <1452678036.3694.51.camel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
>
Ok, it's fine. I will fix it and re-post the series
Michael
>
> Lothar Waßmann
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| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
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^ permalink raw reply [flat|nested] 44+ messages in thread
* [PATCH 4/4] ARM: dts: imx6ul-geam: Add Engicam IMX6UL GEA M6UL initial support
@ 2016-02-20 10:20 ` Michael Trimarchi
0 siblings, 0 replies; 44+ messages in thread
From: Michael Trimarchi @ 2016-02-20 10:20 UTC (permalink / raw)
To: linux-arm-kernel
http://www.engicam.com/prodotti/embedded/som/sodimm/gea-m6ul
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
---
arch/arm/boot/dts/Makefile | 3 +-
arch/arm/boot/dts/imx6ul-geam-kit.dts | 102 ++++++++++
arch/arm/boot/dts/imx6ul-geam.dtsi | 371 ++++++++++++++++++++++++++++++++++
3 files changed, 475 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/imx6ul-geam-kit.dts
create mode 100644 arch/arm/boot/dts/imx6ul-geam.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index a4a6d70..4f6965a 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -358,7 +358,8 @@ dtb-$(CONFIG_SOC_IMX6SX) += \
imx6sx-sdb-reva.dtb \
imx6sx-sdb.dtb
dtb-$(CONFIG_SOC_IMX6UL) += \
- imx6ul-14x14-evk.dtb
+ imx6ul-14x14-evk.dtb \
+ imx6ul-geam-kit.dtb
dtb-$(CONFIG_SOC_IMX7D) += \
imx7d-cl-som-imx7.dtb \
imx7d-sbc-imx7.dtb \
diff --git a/arch/arm/boot/dts/imx6ul-geam-kit.dts b/arch/arm/boot/dts/imx6ul-geam-kit.dts
new file mode 100644
index 0000000..9ba4a66
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ul-geam-kit.dts
@@ -0,0 +1,102 @@
+/*
+ * Copyright (C) 2016 Amarula Solutions B.V.
+ * Copyright (C) 2016 Engicam S.r.l.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include "imx6ul-geam.dtsi"
+
+/ {
+ model = "Engicam GEAM6UL";
+ compatible = "engicam,imx6ul-geam", "fsl,imx6ul";
+};
+
+&flexcan1 {
+ status = "okay";
+};
+
+&flexcan2 {
+ status = "okay";
+};
+
+&lcdif {
+ display = <&display0>;
+ status = "okay";
+
+ display0: display {
+ bits-per-pixel = <16>;
+ bus-width = <18>;
+
+ display-timings {
+ native-mode = <&timing0>;
+ timing0: timing0 {
+ clock-frequency = <28000000>;
+ hactive = <800>;
+ vactive = <480>;
+ hfront-porch = <30>;
+ hback-porch = <30>;
+ hsync-len = <64>;
+ vback-porch = <5>;
+ vfront-porch = <5>;
+ vsync-len = <20>;
+
+ hsync-active = <0>;
+ vsync-active = <0>;
+ de-active = <1>;
+ pixelclk-active = <0>;
+ };
+ };
+ };
+};
+
+&usdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc1>;
+ status = "okay";
+};
+
+&tsc {
+ measure_delay_time = <0x1ffff>;
+ pre_charge_time = <0x1fff>;
+ status = "okay";
+};
+
diff --git a/arch/arm/boot/dts/imx6ul-geam.dtsi b/arch/arm/boot/dts/imx6ul-geam.dtsi
new file mode 100644
index 0000000..738f420
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ul-geam.dtsi
@@ -0,0 +1,371 @@
+/*
+ * Copyright (C) 2016 Amarula Solutions B.V.
+ * Copyright (C) 2016 Engicam S.r.l.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include "imx6ul.dtsi"
+
+/ {
+ memory {
+ reg = <0x80000000 0x20000000>;
+ };
+
+ chosen {
+ stdout-path = &uart1;
+ };
+
+ reg_1p8v: regulator-1p8v {
+ compatible = "regulator-fixed";
+ regulator-name = "1P8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+};
+
+&flexcan1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexcan1>;
+ xceiver-supply = <®_3p3v>;
+};
+
+&flexcan2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexcan2>;
+ xceiver-supply = <®_3p3v>;
+};
+
+&fec1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet1>;
+ phy-mode = "rmii";
+ phy-handle = <ðphy0>;
+ status = "okay";
+};
+
+&fec2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet2>;
+ phy-mode = "rmii";
+ phy-handle = <ðphy1>;
+ status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy0: ethernet-phy at 0 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0>;
+ };
+
+ ethphy1: ethernet-phy at 1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+ };
+};
+
+&gpmi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpmi_nand>;
+ status = "okay";
+ nand-on-flash-bbt;
+};
+
+&lcdif {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_lcdif_dat
+ &pinctrl_lcdif_ctrl>;
+ display = <&display0>;
+};
+
+&tsc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_tsc>;
+ xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ status = "okay";
+};
+
+&usbotg1 {
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
+&usbotg2 {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usdhc1 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc1>;
+ pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
+ bus-width = <4>;
+ cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
+ no-1-8-v;
+ status = "okay";
+};
+
+&i2c1 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1>;
+ status = "okay";
+};
+
+&i2c2 {
+ clock_frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ status = "okay";
+};
+
+&iomuxc {
+
+ pinctrl_enet1: enet1grp {
+ fsl,pins = <
+ MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
+ MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
+ MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
+ MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
+ MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
+ MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
+ MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031
+ >;
+ };
+
+ pinctrl_enet2: enet2grp {
+ fsl,pins = <
+ MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
+ MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
+ MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
+ MX6UL_PAD_ENET2_RX_ER__GPIO2_IO15 0x1b0b0 /* ENET_nRST */
+ MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
+ MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
+ MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
+ MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
+ MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
+ MX6UL_PAD_GPIO1_IO05__ENET2_REF_CLK2 0x4001b031
+ >;
+ };
+
+ pinctrl_flexcan1: flexcan1grp {
+ fsl,pins = <
+ MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x1b020
+ MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x1b020
+ >;
+ };
+
+ pinctrl_flexcan2: flexcan2grp{
+ fsl,pins = <
+ MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020
+ MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020
+ >;
+ };
+
+ pinctrl_gpmi_nand: gpmi-nand {
+ fsl,pins = <
+ MX6UL_PAD_NAND_CLE__RAWNAND_CLE 0xb0b1
+ MX6UL_PAD_NAND_ALE__RAWNAND_ALE 0xb0b1
+ MX6UL_PAD_NAND_WP_B__RAWNAND_WP_B 0xb0b1
+ MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0xb000
+ MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B 0xb0b1
+ MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B 0xb0b1
+ MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B 0xb0b1
+ MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0xb0b1
+ MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0xb0b1
+ MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02 0xb0b1
+ MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03 0xb0b1
+ MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04 0xb0b1
+ MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05 0xb0b1
+ MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06 0xb0b1
+ MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07 0xb0b1
+ >;
+ };
+
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins = <
+ MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
+ MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0
+ >;
+ };
+
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
+ MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
+ >;
+ };
+
+ pinctrl_lcdif_ctrl: lcdifctrlgrp {
+ fsl,pins = <
+ MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79
+ MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79
+ MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79
+ MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79
+ >;
+ };
+
+ pinctrl_lcdif_dat: lcdifdatgrp {
+ fsl,pins = <
+ MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79
+ MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79
+ MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79
+ MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79
+ MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79
+ MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79
+ MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79
+ MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79
+ MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79
+ MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79
+ MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79
+ MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79
+ MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79
+ MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79
+ MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79
+ MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79
+ MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79
+ MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79
+ >;
+ };
+
+ pinctrl_uart1: uart1grp {
+ fsl,pins = <
+ MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
+ MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
+ >;
+ };
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1
+ MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1
+ MX6UL_PAD_UART3_RX_DATA__UART2_DCE_RTS 0x1b0b1
+ MX6UL_PAD_UART3_TX_DATA__UART2_DCE_CTS 0x1b0b1
+ >;
+ };
+
+ pinctrl_usdhc1: usdhc1grp {
+ fsl,pins = <
+ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
+ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059
+ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
+ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
+ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
+ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
+ >;
+ };
+
+ pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
+ fsl,pins = <
+ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9
+ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9
+ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
+ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
+ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
+ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
+ >;
+ };
+
+ pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
+ fsl,pins = <
+ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9
+ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9
+ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
+ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
+ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
+ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
+ >;
+ };
+
+ pinctrl_usdhc2: usdhc2grp {
+ fsl,pins = <
+ MX6UL_PAD_CSI_VSYNC__USDHC2_CLK 0x17070
+ MX6UL_PAD_CSI_HSYNC__USDHC2_CMD 0x10070
+ MX6UL_PAD_CSI_DATA00__USDHC2_DATA0 0x17070
+ MX6UL_PAD_CSI_DATA01__USDHC2_DATA1 0x17070
+ MX6UL_PAD_CSI_DATA02__USDHC2_DATA2 0x17070
+ MX6UL_PAD_CSI_DATA03__USDHC2_DATA3 0x17070
+ >;
+ };
+
+ pinctrl_spi4: spi4grp {
+ fsl,pins = <
+ MX6UL_PAD_BOOT_MODE0__GPIO5_IO10 0x70a1
+ MX6UL_PAD_BOOT_MODE1__GPIO5_IO11 0x70a1
+ MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x70a1
+ MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x80000000
+ >;
+ };
+
+ pinctrl_tsc: tscgrp {
+ fsl,pin = <
+ MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0
+ MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0
+ MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0
+ MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0xb0
+ >;
+ };
+};
--
2.7.0
^ permalink raw reply related [flat|nested] 44+ messages in thread* [PATCH 4/4] ARM: dts: imx6ul-geam: Add Engicam IMX6UL GEA M6UL initial support
@ 2016-02-20 10:20 ` Michael Trimarchi
0 siblings, 0 replies; 44+ messages in thread
From: Michael Trimarchi @ 2016-02-20 10:20 UTC (permalink / raw)
To: shawnguo-DgEjT+Ai2ygdnm+yROfE0A, kernel-bIcnvbaLZ9MEGnE8C9+IrQ
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA,
fabio.estevam-KZfg59tc24xl57MIdRCFDg,
computersforpeace-Re5JQEeQqe8AvxtiuMwx3w,
michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/
http://www.engicam.com/prodotti/embedded/som/sodimm/gea-m6ul
Signed-off-by: Michael Trimarchi <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org>
---
arch/arm/boot/dts/Makefile | 3 +-
arch/arm/boot/dts/imx6ul-geam-kit.dts | 102 ++++++++++
arch/arm/boot/dts/imx6ul-geam.dtsi | 371 ++++++++++++++++++++++++++++++++++
3 files changed, 475 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/imx6ul-geam-kit.dts
create mode 100644 arch/arm/boot/dts/imx6ul-geam.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index a4a6d70..4f6965a 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -358,7 +358,8 @@ dtb-$(CONFIG_SOC_IMX6SX) += \
imx6sx-sdb-reva.dtb \
imx6sx-sdb.dtb
dtb-$(CONFIG_SOC_IMX6UL) += \
- imx6ul-14x14-evk.dtb
+ imx6ul-14x14-evk.dtb \
+ imx6ul-geam-kit.dtb
dtb-$(CONFIG_SOC_IMX7D) += \
imx7d-cl-som-imx7.dtb \
imx7d-sbc-imx7.dtb \
diff --git a/arch/arm/boot/dts/imx6ul-geam-kit.dts b/arch/arm/boot/dts/imx6ul-geam-kit.dts
new file mode 100644
index 0000000..9ba4a66
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ul-geam-kit.dts
@@ -0,0 +1,102 @@
+/*
+ * Copyright (C) 2016 Amarula Solutions B.V.
+ * Copyright (C) 2016 Engicam S.r.l.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include "imx6ul-geam.dtsi"
+
+/ {
+ model = "Engicam GEAM6UL";
+ compatible = "engicam,imx6ul-geam", "fsl,imx6ul";
+};
+
+&flexcan1 {
+ status = "okay";
+};
+
+&flexcan2 {
+ status = "okay";
+};
+
+&lcdif {
+ display = <&display0>;
+ status = "okay";
+
+ display0: display {
+ bits-per-pixel = <16>;
+ bus-width = <18>;
+
+ display-timings {
+ native-mode = <&timing0>;
+ timing0: timing0 {
+ clock-frequency = <28000000>;
+ hactive = <800>;
+ vactive = <480>;
+ hfront-porch = <30>;
+ hback-porch = <30>;
+ hsync-len = <64>;
+ vback-porch = <5>;
+ vfront-porch = <5>;
+ vsync-len = <20>;
+
+ hsync-active = <0>;
+ vsync-active = <0>;
+ de-active = <1>;
+ pixelclk-active = <0>;
+ };
+ };
+ };
+};
+
+&usdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc1>;
+ status = "okay";
+};
+
+&tsc {
+ measure_delay_time = <0x1ffff>;
+ pre_charge_time = <0x1fff>;
+ status = "okay";
+};
+
diff --git a/arch/arm/boot/dts/imx6ul-geam.dtsi b/arch/arm/boot/dts/imx6ul-geam.dtsi
new file mode 100644
index 0000000..738f420
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ul-geam.dtsi
@@ -0,0 +1,371 @@
+/*
+ * Copyright (C) 2016 Amarula Solutions B.V.
+ * Copyright (C) 2016 Engicam S.r.l.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include "imx6ul.dtsi"
+
+/ {
+ memory {
+ reg = <0x80000000 0x20000000>;
+ };
+
+ chosen {
+ stdout-path = &uart1;
+ };
+
+ reg_1p8v: regulator-1p8v {
+ compatible = "regulator-fixed";
+ regulator-name = "1P8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+};
+
+&flexcan1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexcan1>;
+ xceiver-supply = <®_3p3v>;
+};
+
+&flexcan2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexcan2>;
+ xceiver-supply = <®_3p3v>;
+};
+
+&fec1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet1>;
+ phy-mode = "rmii";
+ phy-handle = <ðphy0>;
+ status = "okay";
+};
+
+&fec2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet2>;
+ phy-mode = "rmii";
+ phy-handle = <ðphy1>;
+ status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0>;
+ };
+
+ ethphy1: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+ };
+};
+
+&gpmi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpmi_nand>;
+ status = "okay";
+ nand-on-flash-bbt;
+};
+
+&lcdif {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_lcdif_dat
+ &pinctrl_lcdif_ctrl>;
+ display = <&display0>;
+};
+
+&tsc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_tsc>;
+ xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ status = "okay";
+};
+
+&usbotg1 {
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
+&usbotg2 {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usdhc1 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc1>;
+ pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
+ bus-width = <4>;
+ cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
+ no-1-8-v;
+ status = "okay";
+};
+
+&i2c1 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1>;
+ status = "okay";
+};
+
+&i2c2 {
+ clock_frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ status = "okay";
+};
+
+&iomuxc {
+
+ pinctrl_enet1: enet1grp {
+ fsl,pins = <
+ MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
+ MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
+ MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
+ MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
+ MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
+ MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
+ MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031
+ >;
+ };
+
+ pinctrl_enet2: enet2grp {
+ fsl,pins = <
+ MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
+ MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
+ MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
+ MX6UL_PAD_ENET2_RX_ER__GPIO2_IO15 0x1b0b0 /* ENET_nRST */
+ MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
+ MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
+ MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
+ MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
+ MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
+ MX6UL_PAD_GPIO1_IO05__ENET2_REF_CLK2 0x4001b031
+ >;
+ };
+
+ pinctrl_flexcan1: flexcan1grp {
+ fsl,pins = <
+ MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x1b020
+ MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x1b020
+ >;
+ };
+
+ pinctrl_flexcan2: flexcan2grp{
+ fsl,pins = <
+ MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020
+ MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020
+ >;
+ };
+
+ pinctrl_gpmi_nand: gpmi-nand {
+ fsl,pins = <
+ MX6UL_PAD_NAND_CLE__RAWNAND_CLE 0xb0b1
+ MX6UL_PAD_NAND_ALE__RAWNAND_ALE 0xb0b1
+ MX6UL_PAD_NAND_WP_B__RAWNAND_WP_B 0xb0b1
+ MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0xb000
+ MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B 0xb0b1
+ MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B 0xb0b1
+ MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B 0xb0b1
+ MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0xb0b1
+ MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0xb0b1
+ MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02 0xb0b1
+ MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03 0xb0b1
+ MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04 0xb0b1
+ MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05 0xb0b1
+ MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06 0xb0b1
+ MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07 0xb0b1
+ >;
+ };
+
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins = <
+ MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
+ MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0
+ >;
+ };
+
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
+ MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
+ >;
+ };
+
+ pinctrl_lcdif_ctrl: lcdifctrlgrp {
+ fsl,pins = <
+ MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79
+ MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79
+ MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79
+ MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79
+ >;
+ };
+
+ pinctrl_lcdif_dat: lcdifdatgrp {
+ fsl,pins = <
+ MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79
+ MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79
+ MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79
+ MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79
+ MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79
+ MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79
+ MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79
+ MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79
+ MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79
+ MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79
+ MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79
+ MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79
+ MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79
+ MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79
+ MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79
+ MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79
+ MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79
+ MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79
+ >;
+ };
+
+ pinctrl_uart1: uart1grp {
+ fsl,pins = <
+ MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
+ MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
+ >;
+ };
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1
+ MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1
+ MX6UL_PAD_UART3_RX_DATA__UART2_DCE_RTS 0x1b0b1
+ MX6UL_PAD_UART3_TX_DATA__UART2_DCE_CTS 0x1b0b1
+ >;
+ };
+
+ pinctrl_usdhc1: usdhc1grp {
+ fsl,pins = <
+ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
+ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059
+ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
+ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
+ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
+ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
+ >;
+ };
+
+ pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
+ fsl,pins = <
+ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9
+ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9
+ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
+ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
+ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
+ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
+ >;
+ };
+
+ pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
+ fsl,pins = <
+ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9
+ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9
+ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
+ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
+ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
+ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
+ >;
+ };
+
+ pinctrl_usdhc2: usdhc2grp {
+ fsl,pins = <
+ MX6UL_PAD_CSI_VSYNC__USDHC2_CLK 0x17070
+ MX6UL_PAD_CSI_HSYNC__USDHC2_CMD 0x10070
+ MX6UL_PAD_CSI_DATA00__USDHC2_DATA0 0x17070
+ MX6UL_PAD_CSI_DATA01__USDHC2_DATA1 0x17070
+ MX6UL_PAD_CSI_DATA02__USDHC2_DATA2 0x17070
+ MX6UL_PAD_CSI_DATA03__USDHC2_DATA3 0x17070
+ >;
+ };
+
+ pinctrl_spi4: spi4grp {
+ fsl,pins = <
+ MX6UL_PAD_BOOT_MODE0__GPIO5_IO10 0x70a1
+ MX6UL_PAD_BOOT_MODE1__GPIO5_IO11 0x70a1
+ MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x70a1
+ MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x80000000
+ >;
+ };
+
+ pinctrl_tsc: tscgrp {
+ fsl,pin = <
+ MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0
+ MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0
+ MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0
+ MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0xb0
+ >;
+ };
+};
--
2.7.0
--
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^ permalink raw reply related [flat|nested] 44+ messages in thread* [PATCH 4/4] ARM: dts: imx6ul-geam: Add Engicam IMX6UL GEA M6UL initial support
@ 2016-02-20 14:11 ` Fabio Estevam
0 siblings, 0 replies; 44+ messages in thread
From: Fabio Estevam @ 2016-02-20 14:11 UTC (permalink / raw)
To: linux-arm-kernel
On Sat, Feb 20, 2016 at 8:20 AM, Michael Trimarchi
<michael@amarulasolutions.com> wrote:
> + reg_1p8v: regulator-1p8v {
> + compatible = "regulator-fixed";
> + regulator-name = "1P8V";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-boot-on;
> + regulator-always-on;
These last two properties can be removed.
> + };
> +
> + reg_3p3v: regulator-3p3v {
> + compatible = "regulator-fixed";
> + regulator-name = "3P3V";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
Ditto.
> + pinctrl_spi4: spi4grp {
> + fsl,pins = <
> + MX6UL_PAD_BOOT_MODE0__GPIO5_IO10 0x70a1
> + MX6UL_PAD_BOOT_MODE1__GPIO5_IO11 0x70a1
> + MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x70a1
> + MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x80000000
> + >;
> + };
pinctrl_spi4 seems to be unused.
^ permalink raw reply [flat|nested] 44+ messages in thread* Re: [PATCH 4/4] ARM: dts: imx6ul-geam: Add Engicam IMX6UL GEA M6UL initial support
@ 2016-02-20 14:11 ` Fabio Estevam
0 siblings, 0 replies; 44+ messages in thread
From: Fabio Estevam @ 2016-02-20 14:11 UTC (permalink / raw)
To: Michael Trimarchi
Cc: Shawn Guo, Sascha Hauer, Fabio Estevam,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Brian Norris,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
On Sat, Feb 20, 2016 at 8:20 AM, Michael Trimarchi
<michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org> wrote:
> + reg_1p8v: regulator-1p8v {
> + compatible = "regulator-fixed";
> + regulator-name = "1P8V";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-boot-on;
> + regulator-always-on;
These last two properties can be removed.
> + };
> +
> + reg_3p3v: regulator-3p3v {
> + compatible = "regulator-fixed";
> + regulator-name = "3P3V";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + regulator-always-on;
Ditto.
> + pinctrl_spi4: spi4grp {
> + fsl,pins = <
> + MX6UL_PAD_BOOT_MODE0__GPIO5_IO10 0x70a1
> + MX6UL_PAD_BOOT_MODE1__GPIO5_IO11 0x70a1
> + MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x70a1
> + MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x80000000
> + >;
> + };
pinctrl_spi4 seems to be unused.
--
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^ permalink raw reply [flat|nested] 44+ messages in thread* [PATCH 4/4] ARM: dts: imx6ul-geam: Add Engicam IMX6UL GEA M6UL initial support
@ 2016-02-20 17:19 ` Michael Trimarchi
0 siblings, 0 replies; 44+ messages in thread
From: Michael Trimarchi @ 2016-02-20 17:19 UTC (permalink / raw)
To: linux-arm-kernel
Hi Fabio
On Sat, Feb 20, 2016 at 12:11:14PM -0200, Fabio Estevam wrote:
> On Sat, Feb 20, 2016 at 8:20 AM, Michael Trimarchi
> <michael@amarulasolutions.com> wrote:
>
> > + reg_1p8v: regulator-1p8v {
> > + compatible = "regulator-fixed";
> > + regulator-name = "1P8V";
> > + regulator-min-microvolt = <1800000>;
> > + regulator-max-microvolt = <1800000>;
> > + regulator-boot-on;
> > + regulator-always-on;
>
> These last two properties can be removed.
>
This map the phy connection. Regulator are really always on and they
are always on
Michael
> > + };
> > +
> > + reg_3p3v: regulator-3p3v {
> > + compatible = "regulator-fixed";
> > + regulator-name = "3P3V";
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + regulator-boot-on;
> > + regulator-always-on;
>
> Ditto.
>
> > + pinctrl_spi4: spi4grp {
> > + fsl,pins = <
> > + MX6UL_PAD_BOOT_MODE0__GPIO5_IO10 0x70a1
> > + MX6UL_PAD_BOOT_MODE1__GPIO5_IO11 0x70a1
> > + MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x70a1
> > + MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x80000000
> > + >;
> > + };
>
> pinctrl_spi4 seems to be unused.
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
^ permalink raw reply [flat|nested] 44+ messages in thread* Re: [PATCH 4/4] ARM: dts: imx6ul-geam: Add Engicam IMX6UL GEA M6UL initial support
@ 2016-02-20 17:19 ` Michael Trimarchi
0 siblings, 0 replies; 44+ messages in thread
From: Michael Trimarchi @ 2016-02-20 17:19 UTC (permalink / raw)
To: Fabio Estevam
Cc: Shawn Guo, Sascha Hauer, Fabio Estevam,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Brian Norris,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Hi Fabio
On Sat, Feb 20, 2016 at 12:11:14PM -0200, Fabio Estevam wrote:
> On Sat, Feb 20, 2016 at 8:20 AM, Michael Trimarchi
> <michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org> wrote:
>
> > + reg_1p8v: regulator-1p8v {
> > + compatible = "regulator-fixed";
> > + regulator-name = "1P8V";
> > + regulator-min-microvolt = <1800000>;
> > + regulator-max-microvolt = <1800000>;
> > + regulator-boot-on;
> > + regulator-always-on;
>
> These last two properties can be removed.
>
This map the phy connection. Regulator are really always on and they
are always on
Michael
> > + };
> > +
> > + reg_3p3v: regulator-3p3v {
> > + compatible = "regulator-fixed";
> > + regulator-name = "3P3V";
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + regulator-boot-on;
> > + regulator-always-on;
>
> Ditto.
>
> > + pinctrl_spi4: spi4grp {
> > + fsl,pins = <
> > + MX6UL_PAD_BOOT_MODE0__GPIO5_IO10 0x70a1
> > + MX6UL_PAD_BOOT_MODE1__GPIO5_IO11 0x70a1
> > + MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x70a1
> > + MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x80000000
> > + >;
> > + };
>
> pinctrl_spi4 seems to be unused.
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
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^ permalink raw reply [flat|nested] 44+ messages in thread* [PATCH 4/4] ARM: dts: imx6ul-geam: Add Engicam IMX6UL GEA M6UL initial support
2016-02-20 17:19 ` Michael Trimarchi
@ 2016-02-20 17:30 ` Fabio Estevam
-1 siblings, 0 replies; 44+ messages in thread
From: Fabio Estevam @ 2016-02-20 17:30 UTC (permalink / raw)
To: linux-arm-kernel
On Sat, Feb 20, 2016 at 3:19 PM, Michael Trimarchi
<michael@amarulasolutions.com> wrote:
> This map the phy connection. Regulator are really always on and they
> are always on
but they are pointless with this type of regulator.
^ permalink raw reply [flat|nested] 44+ messages in thread
* Re: [PATCH 4/4] ARM: dts: imx6ul-geam: Add Engicam IMX6UL GEA M6UL initial support
@ 2016-02-20 17:30 ` Fabio Estevam
0 siblings, 0 replies; 44+ messages in thread
From: Fabio Estevam @ 2016-02-20 17:30 UTC (permalink / raw)
To: Michael Trimarchi
Cc: Shawn Guo, Sascha Hauer, Fabio Estevam,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Brian Norris,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
On Sat, Feb 20, 2016 at 3:19 PM, Michael Trimarchi
<michael-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org> wrote:
> This map the phy connection. Regulator are really always on and they
> are always on
but they are pointless with this type of regulator.
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 44+ messages in thread
* [PATCH V2 4/4] ARM: dts: imx6ul-geam: Add Engicam IMX6UL GEA M6UL initial support
2016-02-20 17:30 ` Fabio Estevam
@ 2016-02-21 15:32 ` Michael Trimarchi
-1 siblings, 0 replies; 44+ messages in thread
From: Michael Trimarchi @ 2016-02-21 15:32 UTC (permalink / raw)
To: linux-arm-kernel
http://www.engicam.com/prodotti/embedded/som/sodimm/gea-m6ul
Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
---
Changes V2:
- remove not used muxed
- sort better regulator but not remove "silly" one propertes for now
- small issue on code style
- add Matteo from Engicam that help me to test and verify the board,
provide hw support
arch/arm/boot/dts/Makefile | 3 +-
arch/arm/boot/dts/imx6ul-geam-kit.dts | 102 ++++++++++
arch/arm/boot/dts/imx6ul-geam.dtsi | 362 ++++++++++++++++++++++++++++++++++
3 files changed, 466 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/imx6ul-geam-kit.dts
create mode 100644 arch/arm/boot/dts/imx6ul-geam.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index a4a6d70..4f6965a 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -358,7 +358,8 @@ dtb-$(CONFIG_SOC_IMX6SX) += \
imx6sx-sdb-reva.dtb \
imx6sx-sdb.dtb
dtb-$(CONFIG_SOC_IMX6UL) += \
- imx6ul-14x14-evk.dtb
+ imx6ul-14x14-evk.dtb \
+ imx6ul-geam-kit.dtb
dtb-$(CONFIG_SOC_IMX7D) += \
imx7d-cl-som-imx7.dtb \
imx7d-sbc-imx7.dtb \
diff --git a/arch/arm/boot/dts/imx6ul-geam-kit.dts b/arch/arm/boot/dts/imx6ul-geam-kit.dts
new file mode 100644
index 0000000..9ba4a66
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ul-geam-kit.dts
@@ -0,0 +1,102 @@
+/*
+ * Copyright (C) 2016 Amarula Solutions B.V.
+ * Copyright (C) 2016 Engicam S.r.l.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include "imx6ul-geam.dtsi"
+
+/ {
+ model = "Engicam GEAM6UL";
+ compatible = "engicam,imx6ul-geam", "fsl,imx6ul";
+};
+
+&flexcan1 {
+ status = "okay";
+};
+
+&flexcan2 {
+ status = "okay";
+};
+
+&lcdif {
+ display = <&display0>;
+ status = "okay";
+
+ display0: display {
+ bits-per-pixel = <16>;
+ bus-width = <18>;
+
+ display-timings {
+ native-mode = <&timing0>;
+ timing0: timing0 {
+ clock-frequency = <28000000>;
+ hactive = <800>;
+ vactive = <480>;
+ hfront-porch = <30>;
+ hback-porch = <30>;
+ hsync-len = <64>;
+ vback-porch = <5>;
+ vfront-porch = <5>;
+ vsync-len = <20>;
+
+ hsync-active = <0>;
+ vsync-active = <0>;
+ de-active = <1>;
+ pixelclk-active = <0>;
+ };
+ };
+ };
+};
+
+&usdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc1>;
+ status = "okay";
+};
+
+&tsc {
+ measure_delay_time = <0x1ffff>;
+ pre_charge_time = <0x1fff>;
+ status = "okay";
+};
+
diff --git a/arch/arm/boot/dts/imx6ul-geam.dtsi b/arch/arm/boot/dts/imx6ul-geam.dtsi
new file mode 100644
index 0000000..914c0b1
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ul-geam.dtsi
@@ -0,0 +1,362 @@
+/*
+ * Copyright (C) 2016 Amarula Solutions B.V.
+ * Copyright (C) 2016 Engicam S.r.l.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include "imx6ul.dtsi"
+
+/ {
+ memory {
+ reg = <0x80000000 0x20000000>;
+ };
+
+ chosen {
+ stdout-path = &uart1;
+ };
+
+ reg_1p8v: regulator-1p8v {
+ compatible = "regulator-fixed";
+ regulator-name = "1P8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+};
+
+&flexcan1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexcan1>;
+ xceiver-supply = <®_3p3v>;
+};
+
+&flexcan2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexcan2>;
+ xceiver-supply = <®_3p3v>;
+};
+
+&fec1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet1>;
+ phy-mode = "rmii";
+ phy-handle = <ðphy0>;
+ status = "okay";
+};
+
+&fec2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet2>;
+ phy-mode = "rmii";
+ phy-handle = <ðphy1>;
+ status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy0: ethernet-phy at 0 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0>;
+ };
+
+ ethphy1: ethernet-phy at 1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+ };
+};
+
+&gpmi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpmi_nand>;
+ status = "okay";
+ nand-on-flash-bbt;
+};
+
+&lcdif {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_lcdif_dat
+ &pinctrl_lcdif_ctrl>;
+ display = <&display0>;
+};
+
+&tsc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_tsc>;
+ xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ status = "okay";
+};
+
+&usbotg1 {
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
+&usbotg2 {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usdhc1 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc1>;
+ pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
+ bus-width = <4>;
+ cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
+ no-1-8-v;
+ status = "okay";
+};
+
+&i2c1 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1>;
+ status = "okay";
+};
+
+&i2c2 {
+ clock_frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ status = "okay";
+};
+
+&iomuxc {
+
+ pinctrl_enet1: enet1grp {
+ fsl,pins = <
+ MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
+ MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
+ MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
+ MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
+ MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
+ MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
+ MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031
+ >;
+ };
+
+ pinctrl_enet2: enet2grp {
+ fsl,pins = <
+ MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
+ MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
+ MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
+ MX6UL_PAD_ENET2_RX_ER__GPIO2_IO15 0x1b0b0 /* ENET_nRST */
+ MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
+ MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
+ MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
+ MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
+ MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
+ MX6UL_PAD_GPIO1_IO05__ENET2_REF_CLK2 0x4001b031
+ >;
+ };
+
+ pinctrl_flexcan1: flexcan1grp {
+ fsl,pins = <
+ MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x1b020
+ MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x1b020
+ >;
+ };
+
+ pinctrl_flexcan2: flexcan2grp {
+ fsl,pins = <
+ MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020
+ MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020
+ >;
+ };
+
+ pinctrl_gpmi_nand: gpmi-nand {
+ fsl,pins = <
+ MX6UL_PAD_NAND_CLE__RAWNAND_CLE 0xb0b1
+ MX6UL_PAD_NAND_ALE__RAWNAND_ALE 0xb0b1
+ MX6UL_PAD_NAND_WP_B__RAWNAND_WP_B 0xb0b1
+ MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0xb000
+ MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B 0xb0b1
+ MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B 0xb0b1
+ MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B 0xb0b1
+ MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0xb0b1
+ MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0xb0b1
+ MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02 0xb0b1
+ MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03 0xb0b1
+ MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04 0xb0b1
+ MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05 0xb0b1
+ MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06 0xb0b1
+ MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07 0xb0b1
+ >;
+ };
+
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins = <
+ MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
+ MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0
+ >;
+ };
+
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
+ MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
+ >;
+ };
+
+ pinctrl_lcdif_ctrl: lcdifctrlgrp {
+ fsl,pins = <
+ MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79
+ MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79
+ MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79
+ MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79
+ >;
+ };
+
+ pinctrl_lcdif_dat: lcdifdatgrp {
+ fsl,pins = <
+ MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79
+ MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79
+ MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79
+ MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79
+ MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79
+ MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79
+ MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79
+ MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79
+ MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79
+ MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79
+ MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79
+ MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79
+ MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79
+ MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79
+ MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79
+ MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79
+ MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79
+ MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79
+ >;
+ };
+
+ pinctrl_uart1: uart1grp {
+ fsl,pins = <
+ MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
+ MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
+ >;
+ };
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1
+ MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1
+ MX6UL_PAD_UART3_RX_DATA__UART2_DCE_RTS 0x1b0b1
+ MX6UL_PAD_UART3_TX_DATA__UART2_DCE_CTS 0x1b0b1
+ >;
+ };
+
+ pinctrl_usdhc1: usdhc1grp {
+ fsl,pins = <
+ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
+ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059
+ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
+ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
+ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
+ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
+ >;
+ };
+
+ pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
+ fsl,pins = <
+ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9
+ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9
+ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
+ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
+ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
+ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
+ >;
+ };
+
+ pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
+ fsl,pins = <
+ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9
+ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9
+ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
+ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
+ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
+ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
+ >;
+ };
+
+ pinctrl_usdhc2: usdhc2grp {
+ fsl,pins = <
+ MX6UL_PAD_CSI_VSYNC__USDHC2_CLK 0x17070
+ MX6UL_PAD_CSI_HSYNC__USDHC2_CMD 0x10070
+ MX6UL_PAD_CSI_DATA00__USDHC2_DATA0 0x17070
+ MX6UL_PAD_CSI_DATA01__USDHC2_DATA1 0x17070
+ MX6UL_PAD_CSI_DATA02__USDHC2_DATA2 0x17070
+ MX6UL_PAD_CSI_DATA03__USDHC2_DATA3 0x17070
+ >;
+ };
+
+ pinctrl_tsc: tscgrp {
+ fsl,pin = <
+ MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0
+ MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0
+ MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0
+ MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0xb0
+ >;
+ };
+};
--
2.7.0
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
^ permalink raw reply related [flat|nested] 44+ messages in thread* [PATCH V2 4/4] ARM: dts: imx6ul-geam: Add Engicam IMX6UL GEA M6UL initial support
@ 2016-02-21 15:32 ` Michael Trimarchi
0 siblings, 0 replies; 44+ messages in thread
From: Michael Trimarchi @ 2016-02-21 15:32 UTC (permalink / raw)
To: Fabio Estevam
Cc: Fabio Estevam, devicetree@vger.kernel.org, Sascha Hauer,
Brian Norris, Shawn Guo, linux-arm-kernel@lists.infradead.org
http://www.engicam.com/prodotti/embedded/som/sodimm/gea-m6ul
Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
---
Changes V2:
- remove not used muxed
- sort better regulator but not remove "silly" one propertes for now
- small issue on code style
- add Matteo from Engicam that help me to test and verify the board,
provide hw support
arch/arm/boot/dts/Makefile | 3 +-
arch/arm/boot/dts/imx6ul-geam-kit.dts | 102 ++++++++++
arch/arm/boot/dts/imx6ul-geam.dtsi | 362 ++++++++++++++++++++++++++++++++++
3 files changed, 466 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/imx6ul-geam-kit.dts
create mode 100644 arch/arm/boot/dts/imx6ul-geam.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index a4a6d70..4f6965a 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -358,7 +358,8 @@ dtb-$(CONFIG_SOC_IMX6SX) += \
imx6sx-sdb-reva.dtb \
imx6sx-sdb.dtb
dtb-$(CONFIG_SOC_IMX6UL) += \
- imx6ul-14x14-evk.dtb
+ imx6ul-14x14-evk.dtb \
+ imx6ul-geam-kit.dtb
dtb-$(CONFIG_SOC_IMX7D) += \
imx7d-cl-som-imx7.dtb \
imx7d-sbc-imx7.dtb \
diff --git a/arch/arm/boot/dts/imx6ul-geam-kit.dts b/arch/arm/boot/dts/imx6ul-geam-kit.dts
new file mode 100644
index 0000000..9ba4a66
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ul-geam-kit.dts
@@ -0,0 +1,102 @@
+/*
+ * Copyright (C) 2016 Amarula Solutions B.V.
+ * Copyright (C) 2016 Engicam S.r.l.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include "imx6ul-geam.dtsi"
+
+/ {
+ model = "Engicam GEAM6UL";
+ compatible = "engicam,imx6ul-geam", "fsl,imx6ul";
+};
+
+&flexcan1 {
+ status = "okay";
+};
+
+&flexcan2 {
+ status = "okay";
+};
+
+&lcdif {
+ display = <&display0>;
+ status = "okay";
+
+ display0: display {
+ bits-per-pixel = <16>;
+ bus-width = <18>;
+
+ display-timings {
+ native-mode = <&timing0>;
+ timing0: timing0 {
+ clock-frequency = <28000000>;
+ hactive = <800>;
+ vactive = <480>;
+ hfront-porch = <30>;
+ hback-porch = <30>;
+ hsync-len = <64>;
+ vback-porch = <5>;
+ vfront-porch = <5>;
+ vsync-len = <20>;
+
+ hsync-active = <0>;
+ vsync-active = <0>;
+ de-active = <1>;
+ pixelclk-active = <0>;
+ };
+ };
+ };
+};
+
+&usdhc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc1>;
+ status = "okay";
+};
+
+&tsc {
+ measure_delay_time = <0x1ffff>;
+ pre_charge_time = <0x1fff>;
+ status = "okay";
+};
+
diff --git a/arch/arm/boot/dts/imx6ul-geam.dtsi b/arch/arm/boot/dts/imx6ul-geam.dtsi
new file mode 100644
index 0000000..914c0b1
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ul-geam.dtsi
@@ -0,0 +1,362 @@
+/*
+ * Copyright (C) 2016 Amarula Solutions B.V.
+ * Copyright (C) 2016 Engicam S.r.l.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include "imx6ul.dtsi"
+
+/ {
+ memory {
+ reg = <0x80000000 0x20000000>;
+ };
+
+ chosen {
+ stdout-path = &uart1;
+ };
+
+ reg_1p8v: regulator-1p8v {
+ compatible = "regulator-fixed";
+ regulator-name = "1P8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ reg_3p3v: regulator-3p3v {
+ compatible = "regulator-fixed";
+ regulator-name = "3P3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+};
+
+&flexcan1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexcan1>;
+ xceiver-supply = <®_3p3v>;
+};
+
+&flexcan2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flexcan2>;
+ xceiver-supply = <®_3p3v>;
+};
+
+&fec1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet1>;
+ phy-mode = "rmii";
+ phy-handle = <ðphy0>;
+ status = "okay";
+};
+
+&fec2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet2>;
+ phy-mode = "rmii";
+ phy-handle = <ðphy1>;
+ status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0>;
+ };
+
+ ethphy1: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+ };
+};
+
+&gpmi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpmi_nand>;
+ status = "okay";
+ nand-on-flash-bbt;
+};
+
+&lcdif {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_lcdif_dat
+ &pinctrl_lcdif_ctrl>;
+ display = <&display0>;
+};
+
+&tsc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_tsc>;
+ xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+ status = "okay";
+};
+
+&usbotg1 {
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
+&usbotg2 {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usdhc1 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <&pinctrl_usdhc1>;
+ pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
+ bus-width = <4>;
+ cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
+ no-1-8-v;
+ status = "okay";
+};
+
+&i2c1 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1>;
+ status = "okay";
+};
+
+&i2c2 {
+ clock_frequency = <100000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ status = "okay";
+};
+
+&iomuxc {
+
+ pinctrl_enet1: enet1grp {
+ fsl,pins = <
+ MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
+ MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
+ MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
+ MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
+ MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
+ MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
+ MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031
+ >;
+ };
+
+ pinctrl_enet2: enet2grp {
+ fsl,pins = <
+ MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
+ MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
+ MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
+ MX6UL_PAD_ENET2_RX_ER__GPIO2_IO15 0x1b0b0 /* ENET_nRST */
+ MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
+ MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
+ MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
+ MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
+ MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
+ MX6UL_PAD_GPIO1_IO05__ENET2_REF_CLK2 0x4001b031
+ >;
+ };
+
+ pinctrl_flexcan1: flexcan1grp {
+ fsl,pins = <
+ MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x1b020
+ MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x1b020
+ >;
+ };
+
+ pinctrl_flexcan2: flexcan2grp {
+ fsl,pins = <
+ MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020
+ MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020
+ >;
+ };
+
+ pinctrl_gpmi_nand: gpmi-nand {
+ fsl,pins = <
+ MX6UL_PAD_NAND_CLE__RAWNAND_CLE 0xb0b1
+ MX6UL_PAD_NAND_ALE__RAWNAND_ALE 0xb0b1
+ MX6UL_PAD_NAND_WP_B__RAWNAND_WP_B 0xb0b1
+ MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0xb000
+ MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B 0xb0b1
+ MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B 0xb0b1
+ MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B 0xb0b1
+ MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0xb0b1
+ MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0xb0b1
+ MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02 0xb0b1
+ MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03 0xb0b1
+ MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04 0xb0b1
+ MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05 0xb0b1
+ MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06 0xb0b1
+ MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07 0xb0b1
+ >;
+ };
+
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins = <
+ MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
+ MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0
+ >;
+ };
+
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
+ MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
+ >;
+ };
+
+ pinctrl_lcdif_ctrl: lcdifctrlgrp {
+ fsl,pins = <
+ MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79
+ MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79
+ MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79
+ MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79
+ >;
+ };
+
+ pinctrl_lcdif_dat: lcdifdatgrp {
+ fsl,pins = <
+ MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79
+ MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79
+ MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79
+ MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79
+ MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79
+ MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79
+ MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79
+ MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79
+ MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79
+ MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79
+ MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79
+ MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79
+ MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79
+ MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79
+ MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79
+ MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79
+ MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79
+ MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79
+ >;
+ };
+
+ pinctrl_uart1: uart1grp {
+ fsl,pins = <
+ MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
+ MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
+ >;
+ };
+
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1
+ MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1
+ MX6UL_PAD_UART3_RX_DATA__UART2_DCE_RTS 0x1b0b1
+ MX6UL_PAD_UART3_TX_DATA__UART2_DCE_CTS 0x1b0b1
+ >;
+ };
+
+ pinctrl_usdhc1: usdhc1grp {
+ fsl,pins = <
+ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
+ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059
+ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
+ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
+ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
+ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
+ >;
+ };
+
+ pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
+ fsl,pins = <
+ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9
+ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9
+ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
+ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
+ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
+ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
+ >;
+ };
+
+ pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
+ fsl,pins = <
+ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9
+ MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9
+ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
+ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
+ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
+ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
+ >;
+ };
+
+ pinctrl_usdhc2: usdhc2grp {
+ fsl,pins = <
+ MX6UL_PAD_CSI_VSYNC__USDHC2_CLK 0x17070
+ MX6UL_PAD_CSI_HSYNC__USDHC2_CMD 0x10070
+ MX6UL_PAD_CSI_DATA00__USDHC2_DATA0 0x17070
+ MX6UL_PAD_CSI_DATA01__USDHC2_DATA1 0x17070
+ MX6UL_PAD_CSI_DATA02__USDHC2_DATA2 0x17070
+ MX6UL_PAD_CSI_DATA03__USDHC2_DATA3 0x17070
+ >;
+ };
+
+ pinctrl_tsc: tscgrp {
+ fsl,pin = <
+ MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0
+ MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0
+ MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0
+ MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0xb0
+ >;
+ };
+};
--
2.7.0
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
^ permalink raw reply related [flat|nested] 44+ messages in thread
* [PATCH 0/4] Add support for Engicam IMX6UL module
@ 2016-03-30 11:47 ` Shawn Guo
0 siblings, 0 replies; 44+ messages in thread
From: Shawn Guo @ 2016-03-30 11:47 UTC (permalink / raw)
To: linux-arm-kernel
On Sat, Feb 20, 2016 at 11:20:48AM +0100, Michael Trimarchi wrote:
> Thi patch series add the support for Engicam IMXUL product
>
> https://community.freescale.com/docs/DOC-328428
>
> Based on Freescale? i.MX 6UltraLite processor, a high performance,
> ultra-efficient processor family featuring an advanced implementation
> of a single ARM? Cortex?-A7 core, which operates at speeds up to 528 MHz.
>
> The new ENGICAM GEA M6UL module is suitable for cost effective HMI
> applications requiring high performance CPU.
>
> Michael Trimarchi (4):
> ARM: dts: imx6ul: Add flexcan1 and flexcan2 support
> ARM: dts: imx6ul: Add LCDIF support
> ARM: dts: imx6ul: Add GPMI nand controller support
> ARM: dts: imx6ul-geam: Add Engicam IMX6UL GEA M6UL initial support
There are quite some changes around imx6ul.dtsi getting into 4.6-rc1.
Can you please rebase onto 4.6-rc1 and resend?
Shawn
>
> arch/arm/boot/dts/Makefile | 3 +-
> arch/arm/boot/dts/imx6ul-geam-kit.dts | 102 +++++++++
> arch/arm/boot/dts/imx6ul-geam.dtsi | 371 +++++++++++++++++++++++++++++++++
> arch/arm/boot/dts/imx6ul.dtsi | 68 ++++++
> drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 10 +
> drivers/mtd/nand/gpmi-nand/gpmi-nand.h | 6 +-
> 6 files changed, 557 insertions(+), 3 deletions(-)
> create mode 100644 arch/arm/boot/dts/imx6ul-geam-kit.dts
> create mode 100644 arch/arm/boot/dts/imx6ul-geam.dtsi
>
> --
> 2.7.0
>
>
^ permalink raw reply [flat|nested] 44+ messages in thread
* Re: [PATCH 0/4] Add support for Engicam IMX6UL module
@ 2016-03-30 11:47 ` Shawn Guo
0 siblings, 0 replies; 44+ messages in thread
From: Shawn Guo @ 2016-03-30 11:47 UTC (permalink / raw)
To: Michael Trimarchi
Cc: kernel-bIcnvbaLZ9MEGnE8C9+IrQ,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
devicetree-u79uwXL29TY76Z2rM5mHXA,
fabio.estevam-KZfg59tc24xl57MIdRCFDg,
computersforpeace-Re5JQEeQqe8AvxtiuMwx3w
On Sat, Feb 20, 2016 at 11:20:48AM +0100, Michael Trimarchi wrote:
> Thi patch series add the support for Engicam IMXUL product
>
> https://community.freescale.com/docs/DOC-328428
>
> Based on Freescale™ i.MX 6UltraLite processor, a high performance,
> ultra-efficient processor family featuring an advanced implementation
> of a single ARM™ Cortex™-A7 core, which operates at speeds up to 528 MHz.
>
> The new ENGICAM GEA M6UL module is suitable for cost effective HMI
> applications requiring high performance CPU.
>
> Michael Trimarchi (4):
> ARM: dts: imx6ul: Add flexcan1 and flexcan2 support
> ARM: dts: imx6ul: Add LCDIF support
> ARM: dts: imx6ul: Add GPMI nand controller support
> ARM: dts: imx6ul-geam: Add Engicam IMX6UL GEA M6UL initial support
There are quite some changes around imx6ul.dtsi getting into 4.6-rc1.
Can you please rebase onto 4.6-rc1 and resend?
Shawn
>
> arch/arm/boot/dts/Makefile | 3 +-
> arch/arm/boot/dts/imx6ul-geam-kit.dts | 102 +++++++++
> arch/arm/boot/dts/imx6ul-geam.dtsi | 371 +++++++++++++++++++++++++++++++++
> arch/arm/boot/dts/imx6ul.dtsi | 68 ++++++
> drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 10 +
> drivers/mtd/nand/gpmi-nand/gpmi-nand.h | 6 +-
> 6 files changed, 557 insertions(+), 3 deletions(-)
> create mode 100644 arch/arm/boot/dts/imx6ul-geam-kit.dts
> create mode 100644 arch/arm/boot/dts/imx6ul-geam.dtsi
>
> --
> 2.7.0
>
>
--
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^ permalink raw reply [flat|nested] 44+ messages in thread
* [PATCH 0/4] Add support for Engicam IMX6UL module
2016-03-30 11:47 ` Shawn Guo
@ 2016-03-30 12:46 ` Michael Trimarchi
-1 siblings, 0 replies; 44+ messages in thread
From: Michael Trimarchi @ 2016-03-30 12:46 UTC (permalink / raw)
To: linux-arm-kernel
Hi
On Wed, Mar 30, 2016 at 1:47 PM, Shawn Guo <shawnguo@kernel.org> wrote:
> On Sat, Feb 20, 2016 at 11:20:48AM +0100, Michael Trimarchi wrote:
>> Thi patch series add the support for Engicam IMXUL product
>>
>> https://community.freescale.com/docs/DOC-328428
>>
>> Based on Freescale? i.MX 6UltraLite processor, a high performance,
>> ultra-efficient processor family featuring an advanced implementation
>> of a single ARM? Cortex?-A7 core, which operates at speeds up to 528 MHz.
>>
>> The new ENGICAM GEA M6UL module is suitable for cost effective HMI
>> applications requiring high performance CPU.
>>
>> Michael Trimarchi (4):
>> ARM: dts: imx6ul: Add flexcan1 and flexcan2 support
>> ARM: dts: imx6ul: Add LCDIF support
>> ARM: dts: imx6ul: Add GPMI nand controller support
>> ARM: dts: imx6ul-geam: Add Engicam IMX6UL GEA M6UL initial support
>
> There are quite some changes around imx6ul.dtsi getting into 4.6-rc1.
> Can you please rebase onto 4.6-rc1 and resend?
>
I will prepare tonight again, let test them tomorrow and send back
tomorrow evening
Michael
> Shawn
>
>>
>> arch/arm/boot/dts/Makefile | 3 +-
>> arch/arm/boot/dts/imx6ul-geam-kit.dts | 102 +++++++++
>> arch/arm/boot/dts/imx6ul-geam.dtsi | 371 +++++++++++++++++++++++++++++++++
>> arch/arm/boot/dts/imx6ul.dtsi | 68 ++++++
>> drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 10 +
>> drivers/mtd/nand/gpmi-nand/gpmi-nand.h | 6 +-
>> 6 files changed, 557 insertions(+), 3 deletions(-)
>> create mode 100644 arch/arm/boot/dts/imx6ul-geam-kit.dts
>> create mode 100644 arch/arm/boot/dts/imx6ul-geam.dtsi
>>
>> --
>> 2.7.0
>>
>>
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
^ permalink raw reply [flat|nested] 44+ messages in thread
* Re: [PATCH 0/4] Add support for Engicam IMX6UL module
@ 2016-03-30 12:46 ` Michael Trimarchi
0 siblings, 0 replies; 44+ messages in thread
From: Michael Trimarchi @ 2016-03-30 12:46 UTC (permalink / raw)
To: Shawn Guo
Cc: Fabio Estevam, devicetree@vger.kernel.org, Brian Norris,
linux-arm-kernel, Sascha Hauer
Hi
On Wed, Mar 30, 2016 at 1:47 PM, Shawn Guo <shawnguo@kernel.org> wrote:
> On Sat, Feb 20, 2016 at 11:20:48AM +0100, Michael Trimarchi wrote:
>> Thi patch series add the support for Engicam IMXUL product
>>
>> https://community.freescale.com/docs/DOC-328428
>>
>> Based on Freescale™ i.MX 6UltraLite processor, a high performance,
>> ultra-efficient processor family featuring an advanced implementation
>> of a single ARM™ Cortex™-A7 core, which operates at speeds up to 528 MHz.
>>
>> The new ENGICAM GEA M6UL module is suitable for cost effective HMI
>> applications requiring high performance CPU.
>>
>> Michael Trimarchi (4):
>> ARM: dts: imx6ul: Add flexcan1 and flexcan2 support
>> ARM: dts: imx6ul: Add LCDIF support
>> ARM: dts: imx6ul: Add GPMI nand controller support
>> ARM: dts: imx6ul-geam: Add Engicam IMX6UL GEA M6UL initial support
>
> There are quite some changes around imx6ul.dtsi getting into 4.6-rc1.
> Can you please rebase onto 4.6-rc1 and resend?
>
I will prepare tonight again, let test them tomorrow and send back
tomorrow evening
Michael
> Shawn
>
>>
>> arch/arm/boot/dts/Makefile | 3 +-
>> arch/arm/boot/dts/imx6ul-geam-kit.dts | 102 +++++++++
>> arch/arm/boot/dts/imx6ul-geam.dtsi | 371 +++++++++++++++++++++++++++++++++
>> arch/arm/boot/dts/imx6ul.dtsi | 68 ++++++
>> drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 10 +
>> drivers/mtd/nand/gpmi-nand/gpmi-nand.h | 6 +-
>> 6 files changed, 557 insertions(+), 3 deletions(-)
>> create mode 100644 arch/arm/boot/dts/imx6ul-geam-kit.dts
>> create mode 100644 arch/arm/boot/dts/imx6ul-geam.dtsi
>>
>> --
>> 2.7.0
>>
>>
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
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^ permalink raw reply [flat|nested] 44+ messages in thread