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* [PATCH] drm/i915/gen8+: Do not enable DPF interrupt since the handler does not exist
@ 2016-04-19 13:26 Tvrtko Ursulin
  2016-04-19 13:33 ` Ville Syrjälä
  2016-04-19 14:27 ` ✗ Fi.CI.BAT: failure for " Patchwork
  0 siblings, 2 replies; 3+ messages in thread
From: Tvrtko Ursulin @ 2016-04-19 13:26 UTC (permalink / raw)
  To: Intel-gfx; +Cc: Daniel Vetter

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Looks like DPF was not implemented for gen8+ but the IER and IMR
are still enabled on initialization.

Since there is no code to handle this interrupt, gate the irq
enablement behind HAS_L3_DPF in case the feature gets enabled
in the future.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/i915_irq.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 93da4feb3048..2f6fd33c07ba 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -3796,7 +3796,6 @@ static void gen8_gt_irq_postinstall(struct drm_i915_private *dev_priv)
 	uint32_t gt_interrupts[] = {
 		GT_RENDER_USER_INTERRUPT << GEN8_RCS_IRQ_SHIFT |
 			GT_CONTEXT_SWITCH_INTERRUPT << GEN8_RCS_IRQ_SHIFT |
-			GT_RENDER_L3_PARITY_ERROR_INTERRUPT |
 			GT_RENDER_USER_INTERRUPT << GEN8_BCS_IRQ_SHIFT |
 			GT_CONTEXT_SWITCH_INTERRUPT << GEN8_BCS_IRQ_SHIFT,
 		GT_RENDER_USER_INTERRUPT << GEN8_VCS1_IRQ_SHIFT |
@@ -3808,6 +3807,9 @@ static void gen8_gt_irq_postinstall(struct drm_i915_private *dev_priv)
 			GT_CONTEXT_SWITCH_INTERRUPT << GEN8_VECS_IRQ_SHIFT
 		};
 
+	if (HAS_L3_DPF(dev_priv))
+		gt_interrupts[0] |= GT_RENDER_L3_PARITY_ERROR_INTERRUPT;
+
 	dev_priv->pm_irq_mask = 0xffffffff;
 	GEN8_IRQ_INIT_NDX(GT, 0, ~gt_interrupts[0], gt_interrupts[0]);
 	GEN8_IRQ_INIT_NDX(GT, 1, ~gt_interrupts[1], gt_interrupts[1]);
-- 
1.9.1

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 3+ messages in thread
* Re: [PATCH] drm/i915/gen8+: Do not enable DPF interrupt since the handler does not exist
  2016-04-19 13:26 [PATCH] drm/i915/gen8+: Do not enable DPF interrupt since the handler does not exist Tvrtko Ursulin
@ 2016-04-19 13:33 ` Ville Syrjälä
  2016-04-19 14:27 ` ✗ Fi.CI.BAT: failure for " Patchwork
  1 sibling, 0 replies; 3+ messages in thread
From: Ville Syrjälä @ 2016-04-19 13:33 UTC (permalink / raw)
  To: Tvrtko Ursulin; +Cc: Daniel Vetter, Intel-gfx

On Tue, Apr 19, 2016 at 02:26:51PM +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> 
> Looks like DPF was not implemented for gen8+ but the IER and IMR
> are still enabled on initialization.
> 
> Since there is no code to handle this interrupt, gate the irq
> enablement behind HAS_L3_DPF in case the feature gets enabled
> in the future.

In addition to hooking it up in the irq handler, we'd need to
use the w/a BB to do the remapping when execlists are enabled IIRC.

Patch is
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> 
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>  drivers/gpu/drm/i915/i915_irq.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 93da4feb3048..2f6fd33c07ba 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -3796,7 +3796,6 @@ static void gen8_gt_irq_postinstall(struct drm_i915_private *dev_priv)
>  	uint32_t gt_interrupts[] = {
>  		GT_RENDER_USER_INTERRUPT << GEN8_RCS_IRQ_SHIFT |
>  			GT_CONTEXT_SWITCH_INTERRUPT << GEN8_RCS_IRQ_SHIFT |
> -			GT_RENDER_L3_PARITY_ERROR_INTERRUPT |
>  			GT_RENDER_USER_INTERRUPT << GEN8_BCS_IRQ_SHIFT |
>  			GT_CONTEXT_SWITCH_INTERRUPT << GEN8_BCS_IRQ_SHIFT,
>  		GT_RENDER_USER_INTERRUPT << GEN8_VCS1_IRQ_SHIFT |
> @@ -3808,6 +3807,9 @@ static void gen8_gt_irq_postinstall(struct drm_i915_private *dev_priv)
>  			GT_CONTEXT_SWITCH_INTERRUPT << GEN8_VECS_IRQ_SHIFT
>  		};
>  
> +	if (HAS_L3_DPF(dev_priv))
> +		gt_interrupts[0] |= GT_RENDER_L3_PARITY_ERROR_INTERRUPT;
> +
>  	dev_priv->pm_irq_mask = 0xffffffff;
>  	GEN8_IRQ_INIT_NDX(GT, 0, ~gt_interrupts[0], gt_interrupts[0]);
>  	GEN8_IRQ_INIT_NDX(GT, 1, ~gt_interrupts[1], gt_interrupts[1]);
> -- 
> 1.9.1

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 3+ messages in thread
* ✗ Fi.CI.BAT: failure for drm/i915/gen8+: Do not enable DPF interrupt since the handler does not exist
  2016-04-19 13:26 [PATCH] drm/i915/gen8+: Do not enable DPF interrupt since the handler does not exist Tvrtko Ursulin
  2016-04-19 13:33 ` Ville Syrjälä
@ 2016-04-19 14:27 ` Patchwork
  1 sibling, 0 replies; 3+ messages in thread
From: Patchwork @ 2016-04-19 14:27 UTC (permalink / raw)
  To: Tvrtko Ursulin; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/gen8+: Do not enable DPF interrupt since the handler does not exist
URL   : https://patchwork.freedesktop.org/series/5936/
State : failure

== Summary ==

Series 5936v1 drm/i915/gen8+: Do not enable DPF interrupt since the handler does not exist
http://patchwork.freedesktop.org/api/1.0/series/5936/revisions/1/mbox/

Test drv_module_reload_basic:
                pass       -> INCOMPLETE (snb-dellxps)
Test gem_busy:
        Subgroup basic-blt:
                pass       -> SKIP       (bsw-nuc-2)
Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-b:
                pass       -> INCOMPLETE (hsw-brixbox)

bdw-nuci7        total:192  pass:180  dwarn:0   dfail:0   fail:0   skip:12 
bdw-ultra        total:127  pass:105  dwarn:0   dfail:0   fail:0   skip:22 
bsw-nuc-2        total:191  pass:151  dwarn:0   dfail:0   fail:0   skip:40 
byt-nuc          total:191  pass:153  dwarn:0   dfail:0   fail:0   skip:38 
hsw-brixbox      total:126  pass:111  dwarn:0   dfail:0   fail:0   skip:14 
hsw-gt2          total:192  pass:173  dwarn:0   dfail:0   fail:0   skip:19 
ilk-hp8440p      total:127  pass:82   dwarn:0   dfail:0   fail:0   skip:45 
ivb-t430s        total:192  pass:164  dwarn:0   dfail:0   fail:0   skip:28 
skl-i7k-2        total:192  pass:167  dwarn:0   dfail:0   fail:0   skip:25 
skl-nuci5        total:192  pass:181  dwarn:0   dfail:0   fail:0   skip:11 
snb-dellxps      total:108  pass:86   dwarn:0   dfail:0   fail:0   skip:21 
snb-x220t        total:192  pass:154  dwarn:0   dfail:0   fail:1   skip:37 

Results at /archive/results/CI_IGT_test/Patchwork_1943/

83dde235b9d8bbe1cabf7ad002a6c48ff5a699fc drm-intel-nightly: 2016y-04m-19d-11h-58m-43s UTC integration manifest
1343259 drm/i915/gen8+: Do not enable DPF interrupt since the handler does not exist

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 3+ messages in thread
end of thread, other threads:[~2016-04-19 14:27 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2016-04-19 13:26 [PATCH] drm/i915/gen8+: Do not enable DPF interrupt since the handler does not exist Tvrtko Ursulin
2016-04-19 13:33 ` Ville Syrjälä
2016-04-19 14:27 ` ✗ Fi.CI.BAT: failure for " Patchwork

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