[U-Boot] [PATCH v5 0/4] Amlogic Meson GXBaby and ODROID-C2 support

[U-Boot] [PATCH v5 0/4] Amlogic Meson GXBaby and ODROID-C2 support

[Beniamino Galvani]

Hi,

this series adds a very basic support for Amlogic S905 SoC (GXBaby)
and for the ODROID-C2 board [1], and is based on u-boot sources
available from the board vendor [2]. At the moment the only supported
devices are the integrated UART and Ethernet adapter.

Changes since v4:
 - added patch to implement generic PSCI reset
 - used min() macro from linux/kernel.h

Changes since v3:
 - designware eth: added check that buffer addresses are in first 4GiB
   as suggested by Marek (and thus removed the ack tags)
 - consolidated pinmux and gpio macros
 - used get_unaligned_be64() to avoid alignment faults in dram_init()
 - uint32_t -> u32 in serial_meson.c
 - implemented reboot and read from e-fuse through secure monitor

Changes since v2:
 - squashed all platform patches into a single one
 - got rid of additional non-upstream DTS node for ethernet
 - improved board README
 - added macros for SoC registers fields

Changes since v1:
 - updated DTS files from Linux kernel
 - added Ethernet support
 - first 16MiB of RAM are now marked as unavailable; this seems to
   be required to successfully boot Linux
 - fixed typo in config file

[1] http://www.hardkernel.com/main/products/prdt_info.php?g_code=G145457216438
[2] https://github.com/hardkernel/u-boot/tree/odroidc2-v2015.01

Beniamino Galvani (4):
  arm: implement generic PSCI reset call for armv8
  net: designware: fix descriptor layout and warnings on 64-bit archs
  arm: add initial support for Amlogic Meson and ODROID-C2
  arm: meson: implement calls to secure monitor

 arch/arm/Kconfig                       |   5 +
 arch/arm/Makefile                      |   1 +
 arch/arm/cpu/armv8/fwcall.c            |  16 +++
 arch/arm/dts/Makefile                  |   2 +
 arch/arm/dts/meson-gxbb-odroidc2.dts   |  69 +++++++++++++
 arch/arm/dts/meson-gxbb.dtsi           | 178 +++++++++++++++++++++++++++++++++
 arch/arm/include/asm/arch-meson/gxbb.h |  52 ++++++++++
 arch/arm/include/asm/arch-meson/sm.h   |  12 +++
 arch/arm/include/asm/psci.h            |  17 +++-
 arch/arm/include/asm/system.h          |   2 +
 arch/arm/mach-meson/Kconfig            |  31 ++++++
 arch/arm/mach-meson/Makefile           |   7 ++
 arch/arm/mach-meson/board.c            |  67 +++++++++++++
 arch/arm/mach-meson/sm.c               |  57 +++++++++++
 board/hardkernel/odroid-c2/Kconfig     |  12 +++
 board/hardkernel/odroid-c2/MAINTAINERS |   6 ++
 board/hardkernel/odroid-c2/Makefile    |   7 ++
 board/hardkernel/odroid-c2/README      |  60 +++++++++++
 board/hardkernel/odroid-c2/odroid-c2.c |  67 +++++++++++++
 configs/odroid-c2_defconfig            |  23 +++++
 drivers/net/designware.c               |  59 ++++++-----
 drivers/net/designware.h               |   4 +-
 drivers/serial/Kconfig                 |  15 +++
 drivers/serial/Makefile                |   1 +
 drivers/serial/serial_meson.c          | 162 ++++++++++++++++++++++++++++++
 include/configs/odroid-c2.h            |  55 ++++++++++
 26 files changed, 957 insertions(+), 30 deletions(-)
 create mode 100644 arch/arm/dts/meson-gxbb-odroidc2.dts
 create mode 100644 arch/arm/dts/meson-gxbb.dtsi
 create mode 100644 arch/arm/include/asm/arch-meson/gxbb.h
 create mode 100644 arch/arm/include/asm/arch-meson/sm.h
 create mode 100644 arch/arm/mach-meson/Kconfig
 create mode 100644 arch/arm/mach-meson/Makefile
 create mode 100644 arch/arm/mach-meson/board.c
 create mode 100644 arch/arm/mach-meson/sm.c
 create mode 100644 board/hardkernel/odroid-c2/Kconfig
 create mode 100644 board/hardkernel/odroid-c2/MAINTAINERS
 create mode 100644 board/hardkernel/odroid-c2/Makefile
 create mode 100644 board/hardkernel/odroid-c2/README
 create mode 100644 board/hardkernel/odroid-c2/odroid-c2.c
 create mode 100644 configs/odroid-c2_defconfig
 create mode 100644 drivers/serial/serial_meson.c
 create mode 100644 include/configs/odroid-c2.h

-- 
2.7.3

[U-Boot] [PATCH v5 1/4] arm: implement generic PSCI reset call for armv8

[Beniamino Galvani]

Add a psci_system_reset() which calls the SYSTEM_RESET function of
PSCI 0.2 and can be used by boards that support it to implement
reset_cpu().

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
---
 arch/arm/cpu/armv8/fwcall.c   | 16 ++++++++++++++++
 arch/arm/include/asm/psci.h   | 17 ++++++++++++++++-
 arch/arm/include/asm/system.h |  2 ++
 3 files changed, 34 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv8/fwcall.c b/arch/arm/cpu/armv8/fwcall.c
index 9efcc5a..079e250 100644
--- a/arch/arm/cpu/armv8/fwcall.c
+++ b/arch/arm/cpu/armv8/fwcall.c
@@ -8,6 +8,7 @@
 #include <config.h>
 #include <version.h>
 #include <asm/macro.h>
+#include <asm/psci.h>
 #include <asm/system.h>
 
 /*
@@ -73,3 +74,18 @@ void smc_call(struct pt_regs *args)
 		  "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15",
 		  "x16", "x17");
 }
+
+void __noreturn psci_system_reset(bool conduit_smc)
+{
+	struct pt_regs regs;
+
+	regs.regs[0] = ARM_PSCI_0_2_FN_SYSTEM_RESET;
+
+	if (conduit_smc)
+		smc_call(&regs);
+	else
+		hvc_call(&regs);
+
+	while (1)
+		;
+}
diff --git a/arch/arm/include/asm/psci.h b/arch/arm/include/asm/psci.h
index 128a606..3704f07 100644
--- a/arch/arm/include/asm/psci.h
+++ b/arch/arm/include/asm/psci.h
@@ -18,7 +18,7 @@
 #ifndef __ARM_PSCI_H__
 #define __ARM_PSCI_H__
 
-/* PSCI interface */
+/* PSCI 0.1 interface */
 #define ARM_PSCI_FN_BASE		0x95c1ba5e
 #define ARM_PSCI_FN(n)			(ARM_PSCI_FN_BASE + (n))
 
@@ -32,6 +32,21 @@
 #define ARM_PSCI_RET_INVAL		(-2)
 #define ARM_PSCI_RET_DENIED		(-3)
 
+/* PSCI 0.2 interface */
+#define ARM_PSCI_0_2_FN_BASE			0x84000000
+#define ARM_PSCI_0_2_FN(n)			(ARM_PSCI_0_2_FN_BASE + (n))
+
+#define ARM_PSCI_0_2_FN_PSCI_VERSION		ARM_PSCI_0_2_FN(0)
+#define ARM_PSCI_0_2_FN_CPU_SUSPEND		ARM_PSCI_0_2_FN(1)
+#define ARM_PSCI_0_2_FN_CPU_OFF			ARM_PSCI_0_2_FN(2)
+#define ARM_PSCI_0_2_FN_CPU_ON			ARM_PSCI_0_2_FN(3)
+#define ARM_PSCI_0_2_FN_AFFINITY_INFO		ARM_PSCI_0_2_FN(4)
+#define ARM_PSCI_0_2_FN_MIGRATE			ARM_PSCI_0_2_FN(5)
+#define ARM_PSCI_0_2_FN_MIGRATE_INFO_TYPE	ARM_PSCI_0_2_FN(6)
+#define ARM_PSCI_0_2_FN_MIGRATE_INFO_UP_CPU	ARM_PSCI_0_2_FN(7)
+#define ARM_PSCI_0_2_FN_SYSTEM_OFF		ARM_PSCI_0_2_FN(8)
+#define ARM_PSCI_0_2_FN_SYSTEM_RESET		ARM_PSCI_0_2_FN(9)
+
 #ifndef __ASSEMBLY__
 int psci_update_dt(void *fdt);
 void psci_board_init(void);
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 9ae890a..2bdc0be 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -128,6 +128,8 @@ void hvc_call(struct pt_regs *args);
  */
 void smc_call(struct pt_regs *args);
 
+void __noreturn psci_system_reset(bool smc);
+
 #endif	/* __ASSEMBLY__ */
 
 #else /* CONFIG_ARM64 */
-- 
2.7.3

[U-Boot] [PATCH v5 2/4] net: designware: fix descriptor layout and warnings on 64-bit archs

[Beniamino Galvani]

All members of the DMA descriptor must be 32-bit, even on 64-bit
architectures: change the type to u32 to ensure this. Also, fix
other warnings.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
---
 drivers/net/designware.c | 59 ++++++++++++++++++++++++++----------------------
 drivers/net/designware.h |  4 ++--
 2 files changed, 34 insertions(+), 29 deletions(-)

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index ca58f34..2eda461 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -98,8 +98,8 @@ static void tx_descs_init(struct dw_eth_dev *priv)
 
 	for (idx = 0; idx < CONFIG_TX_DESCR_NUM; idx++) {
 		desc_p = &desc_table_p[idx];
-		desc_p->dmamac_addr = &txbuffs[idx * CONFIG_ETH_BUFSIZE];
-		desc_p->dmamac_next = &desc_table_p[idx + 1];
+		desc_p->dmamac_addr = (ulong)&txbuffs[idx * CONFIG_ETH_BUFSIZE];
+		desc_p->dmamac_next = (ulong)&desc_table_p[idx + 1];
 
 #if defined(CONFIG_DW_ALTDESCRIPTOR)
 		desc_p->txrx_status &= ~(DESC_TXSTS_TXINT | DESC_TXSTS_TXLAST |
@@ -117,11 +117,11 @@ static void tx_descs_init(struct dw_eth_dev *priv)
 	}
 
 	/* Correcting the last pointer of the chain */
-	desc_p->dmamac_next = &desc_table_p[0];
+	desc_p->dmamac_next = (ulong)&desc_table_p[0];
 
 	/* Flush all Tx buffer descriptors at once */
-	flush_dcache_range((unsigned int)priv->tx_mac_descrtable,
-			   (unsigned int)priv->tx_mac_descrtable +
+	flush_dcache_range((ulong)priv->tx_mac_descrtable,
+			   (ulong)priv->tx_mac_descrtable +
 			   sizeof(priv->tx_mac_descrtable));
 
 	writel((ulong)&desc_table_p[0], &dma_p->txdesclistaddr);
@@ -142,13 +142,12 @@ static void rx_descs_init(struct dw_eth_dev *priv)
 	 * Otherwise there's a chance to get some of them flushed in RAM when
 	 * GMAC is already pushing data to RAM via DMA. This way incoming from
 	 * GMAC data will be corrupted. */
-	flush_dcache_range((unsigned int)rxbuffs, (unsigned int)rxbuffs +
-			   RX_TOTAL_BUFSIZE);
+	flush_dcache_range((ulong)rxbuffs, (ulong)rxbuffs + RX_TOTAL_BUFSIZE);
 
 	for (idx = 0; idx < CONFIG_RX_DESCR_NUM; idx++) {
 		desc_p = &desc_table_p[idx];
-		desc_p->dmamac_addr = &rxbuffs[idx * CONFIG_ETH_BUFSIZE];
-		desc_p->dmamac_next = &desc_table_p[idx + 1];
+		desc_p->dmamac_addr = (ulong)&rxbuffs[idx * CONFIG_ETH_BUFSIZE];
+		desc_p->dmamac_next = (ulong)&desc_table_p[idx + 1];
 
 		desc_p->dmamac_cntl =
 			(MAC_MAX_FRAME_SZ & DESC_RXCTRL_SIZE1MASK) |
@@ -158,11 +157,11 @@ static void rx_descs_init(struct dw_eth_dev *priv)
 	}
 
 	/* Correcting the last pointer of the chain */
-	desc_p->dmamac_next = &desc_table_p[0];
+	desc_p->dmamac_next = (ulong)&desc_table_p[0];
 
 	/* Flush all Rx buffer descriptors at once */
-	flush_dcache_range((unsigned int)priv->rx_mac_descrtable,
-			   (unsigned int)priv->rx_mac_descrtable +
+	flush_dcache_range((ulong)priv->rx_mac_descrtable,
+			   (ulong)priv->rx_mac_descrtable +
 			   sizeof(priv->rx_mac_descrtable));
 
 	writel((ulong)&desc_table_p[0], &dma_p->rxdesclistaddr);
@@ -290,12 +289,11 @@ static int _dw_eth_send(struct dw_eth_dev *priv, void *packet, int length)
 	struct eth_dma_regs *dma_p = priv->dma_regs_p;
 	u32 desc_num = priv->tx_currdescnum;
 	struct dmamacdescr *desc_p = &priv->tx_mac_descrtable[desc_num];
-	uint32_t desc_start = (uint32_t)desc_p;
-	uint32_t desc_end = desc_start +
+	ulong desc_start = (ulong)desc_p;
+	ulong desc_end = desc_start +
 		roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN);
-	uint32_t data_start = (uint32_t)desc_p->dmamac_addr;
-	uint32_t data_end = data_start +
-		roundup(length, ARCH_DMA_MINALIGN);
+	ulong data_start = desc_p->dmamac_addr;
+	ulong data_end = data_start + roundup(length, ARCH_DMA_MINALIGN);
 	/*
 	 * Strictly we only need to invalidate the "txrx_status" field
 	 * for the following check, but on some platforms we cannot
@@ -312,7 +310,7 @@ static int _dw_eth_send(struct dw_eth_dev *priv, void *packet, int length)
 		return -EPERM;
 	}
 
-	memcpy(desc_p->dmamac_addr, packet, length);
+	memcpy((void *)data_start, packet, length);
 
 	/* Flush data to be sent */
 	flush_dcache_range(data_start, data_end);
@@ -352,11 +350,11 @@ static int _dw_eth_recv(struct dw_eth_dev *priv, uchar **packetp)
 	u32 status, desc_num = priv->rx_currdescnum;
 	struct dmamacdescr *desc_p = &priv->rx_mac_descrtable[desc_num];
 	int length = -EAGAIN;
-	uint32_t desc_start = (uint32_t)desc_p;
-	uint32_t desc_end = desc_start +
+	ulong desc_start = (ulong)desc_p;
+	ulong desc_end = desc_start +
 		roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN);
-	uint32_t data_start = (uint32_t)desc_p->dmamac_addr;
-	uint32_t data_end;
+	ulong data_start = desc_p->dmamac_addr;
+	ulong data_end;
 
 	/* Invalidate entire buffer descriptor */
 	invalidate_dcache_range(desc_start, desc_end);
@@ -372,7 +370,7 @@ static int _dw_eth_recv(struct dw_eth_dev *priv, uchar **packetp)
 		/* Invalidate received data */
 		data_end = data_start + roundup(length, ARCH_DMA_MINALIGN);
 		invalidate_dcache_range(data_start, data_end);
-		*packetp = desc_p->dmamac_addr;
+		*packetp = (uchar *)(ulong)desc_p->dmamac_addr;
 	}
 
 	return length;
@@ -382,8 +380,8 @@ static int _dw_free_pkt(struct dw_eth_dev *priv)
 {
 	u32 desc_num = priv->rx_currdescnum;
 	struct dmamacdescr *desc_p = &priv->rx_mac_descrtable[desc_num];
-	uint32_t desc_start = (uint32_t)desc_p;
-	uint32_t desc_end = desc_start +
+	ulong desc_start = (ulong)desc_p;
+	ulong desc_end = desc_start +
 		roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN);
 
 	/*
@@ -488,6 +486,11 @@ int designware_initialize(ulong base_addr, u32 interface)
 		return -ENOMEM;
 	}
 
+	if ((unsigned long long)priv + sizeof(*priv) > (1ULL << 32)) {
+		printf("designware: buffers are outside DMA memory\n");
+		return -EINVAL;
+	}
+
 	memset(dev, 0, sizeof(struct eth_device));
 	memset(priv, 0, sizeof(struct dw_eth_dev));
 
@@ -583,6 +586,7 @@ static int designware_eth_probe(struct udevice *dev)
 	struct eth_pdata *pdata = dev_get_platdata(dev);
 	struct dw_eth_dev *priv = dev_get_priv(dev);
 	u32 iobase = pdata->iobase;
+	ulong ioaddr;
 	int ret;
 
 #ifdef CONFIG_DM_PCI
@@ -601,8 +605,9 @@ static int designware_eth_probe(struct udevice *dev)
 #endif
 
 	debug("%s, iobase=%x, priv=%p\n", __func__, iobase, priv);
-	priv->mac_regs_p = (struct eth_mac_regs *)iobase;
-	priv->dma_regs_p = (struct eth_dma_regs *)(iobase + DW_DMA_BASE_OFFSET);
+	ioaddr = iobase;
+	priv->mac_regs_p = (struct eth_mac_regs *)ioaddr;
+	priv->dma_regs_p = (struct eth_dma_regs *)(ioaddr + DW_DMA_BASE_OFFSET);
 	priv->interface = pdata->phy_interface;
 	priv->max_speed = pdata->max_speed;
 
diff --git a/drivers/net/designware.h b/drivers/net/designware.h
index ed6344c..d48df7b 100644
--- a/drivers/net/designware.h
+++ b/drivers/net/designware.h
@@ -110,8 +110,8 @@ struct eth_dma_regs {
 struct dmamacdescr {
 	u32 txrx_status;
 	u32 dmamac_cntl;
-	void *dmamac_addr;
-	struct dmamacdescr *dmamac_next;
+	u32 dmamac_addr;
+	u32 dmamac_next;
 } __aligned(ARCH_DMA_MINALIGN);
 
 /*
-- 
2.7.3

[U-Boot] [PATCH v5 2/4] net: designware: fix descriptor layout and warnings on 64-bit archs

[Joe Hershberger]

On Sun, Apr 24, 2016 at 1:50 AM, Beniamino Galvani <b.galvani@gmail.com> wrote:
> All members of the DMA descriptor must be 32-bit, even on 64-bit
> architectures: change the type to u32 to ensure this. Also, fix
> other warnings.
>
> Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
> ---
>  drivers/net/designware.c | 59 ++++++++++++++++++++++++++----------------------
>  drivers/net/designware.h |  4 ++--
>  2 files changed, 34 insertions(+), 29 deletions(-)
>
> diff --git a/drivers/net/designware.c b/drivers/net/designware.c
> index ca58f34..2eda461 100644
> --- a/drivers/net/designware.c
> +++ b/drivers/net/designware.c
> @@ -98,8 +98,8 @@ static void tx_descs_init(struct dw_eth_dev *priv)
>
>         for (idx = 0; idx < CONFIG_TX_DESCR_NUM; idx++) {
>                 desc_p = &desc_table_p[idx];
> -               desc_p->dmamac_addr = &txbuffs[idx * CONFIG_ETH_BUFSIZE];
> -               desc_p->dmamac_next = &desc_table_p[idx + 1];
> +               desc_p->dmamac_addr = (ulong)&txbuffs[idx * CONFIG_ETH_BUFSIZE];
> +               desc_p->dmamac_next = (ulong)&desc_table_p[idx + 1];

Why are you not casting to the type of the struct member (u32)? Won't
this emit warnings on 64-bit?

>
>  #if defined(CONFIG_DW_ALTDESCRIPTOR)
>                 desc_p->txrx_status &= ~(DESC_TXSTS_TXINT | DESC_TXSTS_TXLAST |
> @@ -117,11 +117,11 @@ static void tx_descs_init(struct dw_eth_dev *priv)
>         }
>
>         /* Correcting the last pointer of the chain */
> -       desc_p->dmamac_next = &desc_table_p[0];
> +       desc_p->dmamac_next = (ulong)&desc_table_p[0];
>
>         /* Flush all Tx buffer descriptors at once */
> -       flush_dcache_range((unsigned int)priv->tx_mac_descrtable,
> -                          (unsigned int)priv->tx_mac_descrtable +
> +       flush_dcache_range((ulong)priv->tx_mac_descrtable,
> +                          (ulong)priv->tx_mac_descrtable +
>                            sizeof(priv->tx_mac_descrtable));
>
>         writel((ulong)&desc_table_p[0], &dma_p->txdesclistaddr);
> @@ -142,13 +142,12 @@ static void rx_descs_init(struct dw_eth_dev *priv)
>          * Otherwise there's a chance to get some of them flushed in RAM when
>          * GMAC is already pushing data to RAM via DMA. This way incoming from
>          * GMAC data will be corrupted. */
> -       flush_dcache_range((unsigned int)rxbuffs, (unsigned int)rxbuffs +
> -                          RX_TOTAL_BUFSIZE);
> +       flush_dcache_range((ulong)rxbuffs, (ulong)rxbuffs + RX_TOTAL_BUFSIZE);
>
>         for (idx = 0; idx < CONFIG_RX_DESCR_NUM; idx++) {
>                 desc_p = &desc_table_p[idx];
> -               desc_p->dmamac_addr = &rxbuffs[idx * CONFIG_ETH_BUFSIZE];
> -               desc_p->dmamac_next = &desc_table_p[idx + 1];
> +               desc_p->dmamac_addr = (ulong)&rxbuffs[idx * CONFIG_ETH_BUFSIZE];
> +               desc_p->dmamac_next = (ulong)&desc_table_p[idx + 1];
>
>                 desc_p->dmamac_cntl =
>                         (MAC_MAX_FRAME_SZ & DESC_RXCTRL_SIZE1MASK) |
> @@ -158,11 +157,11 @@ static void rx_descs_init(struct dw_eth_dev *priv)
>         }
>
>         /* Correcting the last pointer of the chain */
> -       desc_p->dmamac_next = &desc_table_p[0];
> +       desc_p->dmamac_next = (ulong)&desc_table_p[0];
>
>         /* Flush all Rx buffer descriptors at once */
> -       flush_dcache_range((unsigned int)priv->rx_mac_descrtable,
> -                          (unsigned int)priv->rx_mac_descrtable +
> +       flush_dcache_range((ulong)priv->rx_mac_descrtable,
> +                          (ulong)priv->rx_mac_descrtable +
>                            sizeof(priv->rx_mac_descrtable));
>
>         writel((ulong)&desc_table_p[0], &dma_p->rxdesclistaddr);
> @@ -290,12 +289,11 @@ static int _dw_eth_send(struct dw_eth_dev *priv, void *packet, int length)
>         struct eth_dma_regs *dma_p = priv->dma_regs_p;
>         u32 desc_num = priv->tx_currdescnum;
>         struct dmamacdescr *desc_p = &priv->tx_mac_descrtable[desc_num];
> -       uint32_t desc_start = (uint32_t)desc_p;
> -       uint32_t desc_end = desc_start +
> +       ulong desc_start = (ulong)desc_p;
> +       ulong desc_end = desc_start +
>                 roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN);
> -       uint32_t data_start = (uint32_t)desc_p->dmamac_addr;
> -       uint32_t data_end = data_start +
> -               roundup(length, ARCH_DMA_MINALIGN);
> +       ulong data_start = desc_p->dmamac_addr;
> +       ulong data_end = data_start + roundup(length, ARCH_DMA_MINALIGN);
>         /*
>          * Strictly we only need to invalidate the "txrx_status" field
>          * for the following check, but on some platforms we cannot
> @@ -312,7 +310,7 @@ static int _dw_eth_send(struct dw_eth_dev *priv, void *packet, int length)
>                 return -EPERM;
>         }
>
> -       memcpy(desc_p->dmamac_addr, packet, length);
> +       memcpy((void *)data_start, packet, length);
>
>         /* Flush data to be sent */
>         flush_dcache_range(data_start, data_end);
> @@ -352,11 +350,11 @@ static int _dw_eth_recv(struct dw_eth_dev *priv, uchar **packetp)
>         u32 status, desc_num = priv->rx_currdescnum;
>         struct dmamacdescr *desc_p = &priv->rx_mac_descrtable[desc_num];
>         int length = -EAGAIN;
> -       uint32_t desc_start = (uint32_t)desc_p;
> -       uint32_t desc_end = desc_start +
> +       ulong desc_start = (ulong)desc_p;
> +       ulong desc_end = desc_start +
>                 roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN);
> -       uint32_t data_start = (uint32_t)desc_p->dmamac_addr;
> -       uint32_t data_end;
> +       ulong data_start = desc_p->dmamac_addr;
> +       ulong data_end;
>
>         /* Invalidate entire buffer descriptor */
>         invalidate_dcache_range(desc_start, desc_end);
> @@ -372,7 +370,7 @@ static int _dw_eth_recv(struct dw_eth_dev *priv, uchar **packetp)
>                 /* Invalidate received data */
>                 data_end = data_start + roundup(length, ARCH_DMA_MINALIGN);
>                 invalidate_dcache_range(data_start, data_end);
> -               *packetp = desc_p->dmamac_addr;
> +               *packetp = (uchar *)(ulong)desc_p->dmamac_addr;
>         }
>
>         return length;
> @@ -382,8 +380,8 @@ static int _dw_free_pkt(struct dw_eth_dev *priv)
>  {
>         u32 desc_num = priv->rx_currdescnum;
>         struct dmamacdescr *desc_p = &priv->rx_mac_descrtable[desc_num];
> -       uint32_t desc_start = (uint32_t)desc_p;
> -       uint32_t desc_end = desc_start +
> +       ulong desc_start = (ulong)desc_p;
> +       ulong desc_end = desc_start +
>                 roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN);
>
>         /*
> @@ -488,6 +486,11 @@ int designware_initialize(ulong base_addr, u32 interface)
>                 return -ENOMEM;
>         }
>
> +       if ((unsigned long long)priv + sizeof(*priv) > (1ULL << 32)) {
> +               printf("designware: buffers are outside DMA memory\n");
> +               return -EINVAL;
> +       }
> +
>         memset(dev, 0, sizeof(struct eth_device));
>         memset(priv, 0, sizeof(struct dw_eth_dev));
>
> @@ -583,6 +586,7 @@ static int designware_eth_probe(struct udevice *dev)
>         struct eth_pdata *pdata = dev_get_platdata(dev);
>         struct dw_eth_dev *priv = dev_get_priv(dev);
>         u32 iobase = pdata->iobase;
> +       ulong ioaddr;
>         int ret;
>
>  #ifdef CONFIG_DM_PCI
> @@ -601,8 +605,9 @@ static int designware_eth_probe(struct udevice *dev)
>  #endif
>
>         debug("%s, iobase=%x, priv=%p\n", __func__, iobase, priv);
> -       priv->mac_regs_p = (struct eth_mac_regs *)iobase;
> -       priv->dma_regs_p = (struct eth_dma_regs *)(iobase + DW_DMA_BASE_OFFSET);
> +       ioaddr = iobase;
> +       priv->mac_regs_p = (struct eth_mac_regs *)ioaddr;
> +       priv->dma_regs_p = (struct eth_dma_regs *)(ioaddr + DW_DMA_BASE_OFFSET);
>         priv->interface = pdata->phy_interface;
>         priv->max_speed = pdata->max_speed;
>
> diff --git a/drivers/net/designware.h b/drivers/net/designware.h
> index ed6344c..d48df7b 100644
> --- a/drivers/net/designware.h
> +++ b/drivers/net/designware.h
> @@ -110,8 +110,8 @@ struct eth_dma_regs {
>  struct dmamacdescr {
>         u32 txrx_status;
>         u32 dmamac_cntl;
> -       void *dmamac_addr;
> -       struct dmamacdescr *dmamac_next;
> +       u32 dmamac_addr;
> +       u32 dmamac_next;
>  } __aligned(ARCH_DMA_MINALIGN);
>
>  /*
> --
> 2.7.3
>
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] [PATCH v5 2/4] net: designware: fix descriptor layout and warnings on 64-bit archs

[Beniamino Galvani]

On Mon, Apr 25, 2016 at 01:01:10PM -0500, Joe Hershberger wrote:
> > -               desc_p->dmamac_addr = &txbuffs[idx * CONFIG_ETH_BUFSIZE];
> > -               desc_p->dmamac_next = &desc_table_p[idx + 1];
> > +               desc_p->dmamac_addr = (ulong)&txbuffs[idx * CONFIG_ETH_BUFSIZE];
> > +               desc_p->dmamac_next = (ulong)&desc_table_p[idx + 1];
> 
> Why are you not casting to the type of the struct member (u32)? Won't
> this emit warnings on 64-bit?

Hi,

casting to u32 would cause a warning on arm64 ("warning: cast from
pointer to integer of different size [-Wpointer-to-int-cast]") because
the pointer is 64bit.

The (ulong) cast is needed to convert the pointer to an arithmetic
type of same width, which then can be assigned to the struct
member. The assignment operator implicitly converts between different
arithmetic types without the need for explicit casts.

Beniamino

[U-Boot] [PATCH v5 2/4] net: designware: fix descriptor layout and warnings on 64-bit archs

[Joe Hershberger]

On Mon, Apr 25, 2016 at 3:17 PM, Beniamino Galvani <b.galvani@gmail.com> wrote:
> On Mon, Apr 25, 2016 at 01:01:10PM -0500, Joe Hershberger wrote:
>> > -               desc_p->dmamac_addr = &txbuffs[idx * CONFIG_ETH_BUFSIZE];
>> > -               desc_p->dmamac_next = &desc_table_p[idx + 1];
>> > +               desc_p->dmamac_addr = (ulong)&txbuffs[idx * CONFIG_ETH_BUFSIZE];
>> > +               desc_p->dmamac_next = (ulong)&desc_table_p[idx + 1];
>>
>> Why are you not casting to the type of the struct member (u32)? Won't
>> this emit warnings on 64-bit?
>
> Hi,
>
> casting to u32 would cause a warning on arm64 ("warning: cast from
> pointer to integer of different size [-Wpointer-to-int-cast]") because
> the pointer is 64bit.
>
> The (ulong) cast is needed to convert the pointer to an arithmetic
> type of same width, which then can be assigned to the struct
> member. The assignment operator implicitly converts between different
> arithmetic types without the need for explicit casts.

That's the part that surprises me. I thought arithmetic assignments
from larger to smaller types would warn.

Anyway, if it's warning clean,

Acked-by: Joe Hershberger <joe.hershberger@ni.com>

[U-Boot] [PATCH v5 2/4] net: designware: fix descriptor layout and warnings on 64-bit archs

[Marek Vasut]

On 04/25/2016 10:32 PM, Joe Hershberger wrote:
> On Mon, Apr 25, 2016 at 3:17 PM, Beniamino Galvani <b.galvani@gmail.com> wrote:
>> On Mon, Apr 25, 2016 at 01:01:10PM -0500, Joe Hershberger wrote:
>>>> -               desc_p->dmamac_addr = &txbuffs[idx * CONFIG_ETH_BUFSIZE];
>>>> -               desc_p->dmamac_next = &desc_table_p[idx + 1];
>>>> +               desc_p->dmamac_addr = (ulong)&txbuffs[idx * CONFIG_ETH_BUFSIZE];
>>>> +               desc_p->dmamac_next = (ulong)&desc_table_p[idx + 1];
>>>
>>> Why are you not casting to the type of the struct member (u32)? Won't
>>> this emit warnings on 64-bit?
>>
>> Hi,
>>
>> casting to u32 would cause a warning on arm64 ("warning: cast from
>> pointer to integer of different size [-Wpointer-to-int-cast]") because
>> the pointer is 64bit.
>>
>> The (ulong) cast is needed to convert the pointer to an arithmetic
>> type of same width, which then can be assigned to the struct
>> member. The assignment operator implicitly converts between different
>> arithmetic types without the need for explicit casts.
> 
> That's the part that surprises me. I thought arithmetic assignments
> from larger to smaller types would warn.
> 
> Anyway, if it's warning clean,

I am still not a big fan of picking the right type just to silence all
possible warnings. I am worried this will bite us in the future.

> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
> 


-- 
Best regards,
Marek Vasut

[U-Boot] [PATCH v5 2/4] net: designware: fix descriptor layout and warnings on 64-bit archs

[Tom Rini]

On Mon, Apr 25, 2016 at 10:40:25PM +0200, Marek Vasut wrote:
> On 04/25/2016 10:32 PM, Joe Hershberger wrote:
> > On Mon, Apr 25, 2016 at 3:17 PM, Beniamino Galvani <b.galvani@gmail.com> wrote:
> >> On Mon, Apr 25, 2016 at 01:01:10PM -0500, Joe Hershberger wrote:
> >>>> -               desc_p->dmamac_addr = &txbuffs[idx * CONFIG_ETH_BUFSIZE];
> >>>> -               desc_p->dmamac_next = &desc_table_p[idx + 1];
> >>>> +               desc_p->dmamac_addr = (ulong)&txbuffs[idx * CONFIG_ETH_BUFSIZE];
> >>>> +               desc_p->dmamac_next = (ulong)&desc_table_p[idx + 1];
> >>>
> >>> Why are you not casting to the type of the struct member (u32)? Won't
> >>> this emit warnings on 64-bit?
> >>
> >> Hi,
> >>
> >> casting to u32 would cause a warning on arm64 ("warning: cast from
> >> pointer to integer of different size [-Wpointer-to-int-cast]") because
> >> the pointer is 64bit.
> >>
> >> The (ulong) cast is needed to convert the pointer to an arithmetic
> >> type of same width, which then can be assigned to the struct
> >> member. The assignment operator implicitly converts between different
> >> arithmetic types without the need for explicit casts.
> > 
> > That's the part that surprises me. I thought arithmetic assignments
> > from larger to smaller types would warn.
> > 
> > Anyway, if it's warning clean,
> 
> I am still not a big fan of picking the right type just to silence all
> possible warnings. I am worried this will bite us in the future.

When that future comes we'll have lots of things to fixup and convert to
a better solution.

-- 
Tom
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[U-Boot] [PATCH v5 3/4] arm: add initial support for Amlogic Meson and ODROID-C2

[Beniamino Galvani]

This adds platform code for the Amlogic Meson GXBaby (S905) SoC and a
board definition for ODROID-C2. This initial submission only supports
UART and Ethernet (through the existing Designware driver). DTS files
are the ones submitted to Linux arm-soc for 4.7 [1].

[1] https://patchwork.ozlabs.org/patch/603583/

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
---
 arch/arm/Kconfig                       |   5 +
 arch/arm/Makefile                      |   1 +
 arch/arm/dts/Makefile                  |   2 +
 arch/arm/dts/meson-gxbb-odroidc2.dts   |  69 +++++++++++++
 arch/arm/dts/meson-gxbb.dtsi           | 178 +++++++++++++++++++++++++++++++++
 arch/arm/include/asm/arch-meson/gxbb.h |  52 ++++++++++
 arch/arm/mach-meson/Kconfig            |  31 ++++++
 arch/arm/mach-meson/Makefile           |   7 ++
 arch/arm/mach-meson/board.c            |  66 ++++++++++++
 board/hardkernel/odroid-c2/Kconfig     |  12 +++
 board/hardkernel/odroid-c2/MAINTAINERS |   6 ++
 board/hardkernel/odroid-c2/Makefile    |   7 ++
 board/hardkernel/odroid-c2/README      |  60 +++++++++++
 board/hardkernel/odroid-c2/odroid-c2.c |  51 ++++++++++
 configs/odroid-c2_defconfig            |  23 +++++
 drivers/serial/Kconfig                 |  15 +++
 drivers/serial/Makefile                |   1 +
 drivers/serial/serial_meson.c          | 162 ++++++++++++++++++++++++++++++
 include/configs/odroid-c2.h            |  55 ++++++++++
 19 files changed, 803 insertions(+)
 create mode 100644 arch/arm/dts/meson-gxbb-odroidc2.dts
 create mode 100644 arch/arm/dts/meson-gxbb.dtsi
 create mode 100644 arch/arm/include/asm/arch-meson/gxbb.h
 create mode 100644 arch/arm/mach-meson/Kconfig
 create mode 100644 arch/arm/mach-meson/Makefile
 create mode 100644 arch/arm/mach-meson/board.c
 create mode 100644 board/hardkernel/odroid-c2/Kconfig
 create mode 100644 board/hardkernel/odroid-c2/MAINTAINERS
 create mode 100644 board/hardkernel/odroid-c2/Makefile
 create mode 100644 board/hardkernel/odroid-c2/README
 create mode 100644 board/hardkernel/odroid-c2/odroid-c2.c
 create mode 100644 configs/odroid-c2_defconfig
 create mode 100644 drivers/serial/serial_meson.c
 create mode 100644 include/configs/odroid-c2.h

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index d1c3157..95a0838 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -456,6 +456,9 @@ config ARCH_KEYSTONE
 	select SUPPORT_SPL
 	select CMD_POWEROFF
 
+config ARCH_MESON
+	bool "Amlogic Meson"
+
 config ARCH_MX7
 	bool "Freescale MX7"
 	select CPU_V7
@@ -780,6 +783,8 @@ source "arch/arm/mach-orion5x/Kconfig"
 
 source "arch/arm/cpu/armv7/rmobile/Kconfig"
 
+source "arch/arm/mach-meson/Kconfig"
+
 source "arch/arm/mach-rockchip/Kconfig"
 
 source "arch/arm/mach-s5pc1xx/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index d516345..ecd1887 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -50,6 +50,7 @@ machine-$(CONFIG_ARCH_HIGHBANK)		+= highbank
 machine-$(CONFIG_ARCH_KEYSTONE)		+= keystone
 # TODO: rename CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOOD
 machine-$(CONFIG_KIRKWOOD)		+= kirkwood
+machine-$(CONFIG_ARCH_MESON)		+= meson
 machine-$(CONFIG_ARCH_MVEBU)		+= mvebu
 # TODO: rename CONFIG_TEGRA -> CONFIG_ARCH_TEGRA
 # TODO: rename CONFIG_ORION5X -> CONFIG_ARCH_ORION5X
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index aa31fd9..be28d21 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -24,6 +24,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
 	rk3288-jerry.dtb \
 	rk3288-rock2-square.dtb \
 	rk3036-sdk.dtb
+dtb-$(CONFIG_ARCH_MESON) += \
+	meson-gxbb-odroidc2.dtb
 dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
 	tegra20-medcom-wide.dtb \
 	tegra20-paz00.dtb \
diff --git a/arch/arm/dts/meson-gxbb-odroidc2.dts b/arch/arm/dts/meson-gxbb-odroidc2.dts
new file mode 100644
index 0000000..653c2fa
--- /dev/null
+++ b/arch/arm/dts/meson-gxbb-odroidc2.dts
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2016 Andreas F?rber
+ * Copyright (c) 2016 BayLibre, Inc.
+ * Author: Kevin Hilman <khilman@kernel.org>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "meson-gxbb.dtsi"
+
+/ {
+	compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb";
+	model = "Hardkernel ODROID-C2";
+
+	aliases {
+		serial0 = &uart_AO;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory at 0 {
+		device_type = "memory";
+		reg = <0x0 0x0 0x0 0x80000000>;
+	};
+};
+
+&uart_AO {
+	status = "okay";
+};
diff --git a/arch/arm/dts/meson-gxbb.dtsi b/arch/arm/dts/meson-gxbb.dtsi
new file mode 100644
index 0000000..832815d
--- /dev/null
+++ b/arch/arm/dts/meson-gxbb.dtsi
@@ -0,0 +1,178 @@
+/*
+ * Copyright (c) 2016 Andreas F?rber
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This library is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+	compatible = "amlogic,meson-gxbb";
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	cpus {
+		#address-cells = <0x2>;
+		#size-cells = <0x0>;
+
+		cpu0: cpu at 0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53", "arm,armv8";
+			reg = <0x0 0x0>;
+			enable-method = "psci";
+		};
+
+		cpu1: cpu at 1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53", "arm,armv8";
+			reg = <0x0 0x1>;
+			enable-method = "psci";
+		};
+
+		cpu2: cpu at 2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53", "arm,armv8";
+			reg = <0x0 0x2>;
+			enable-method = "psci";
+		};
+
+		cpu3: cpu at 3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53", "arm,armv8";
+			reg = <0x0 0x3>;
+			enable-method = "psci";
+		};
+	};
+
+	arm-pmu {
+		compatible = "arm,cortex-a53-pmu";
+		interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+	};
+
+	psci {
+		compatible = "arm,psci-0.2";
+		method = "smc";
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 13
+			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>,
+			     <GIC_PPI 14
+			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>,
+			     <GIC_PPI 11
+			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>,
+			     <GIC_PPI 10
+			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_EDGE_RISING)>;
+	};
+
+	xtal: xtal-clk {
+		compatible = "fixed-clock";
+		clock-frequency = <24000000>;
+		clock-output-names = "xtal";
+		#clock-cells = <0>;
+	};
+
+	soc {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		cbus: cbus at c1100000 {
+			compatible = "simple-bus";
+			reg = <0x0 0xc1100000 0x0 0x100000>;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>;
+
+			uart_A: serial at 84c0 {
+				compatible = "amlogic,meson-uart";
+				reg = <0x0 0x084c0 0x0 0x14>;
+				interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
+				clocks = <&xtal>;
+				status = "disabled";
+			};
+		};
+
+		gic: interrupt-controller at c4301000 {
+			compatible = "arm,gic-400";
+			reg = <0x0 0xc4301000 0 0x1000>,
+			      <0x0 0xc4302000 0 0x2000>,
+			      <0x0 0xc4304000 0 0x2000>,
+			      <0x0 0xc4306000 0 0x2000>;
+			interrupt-controller;
+			interrupts = <GIC_PPI 9
+				(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
+			#interrupt-cells = <3>;
+			#address-cells = <0>;
+		};
+
+		aobus: aobus at c8100000 {
+			compatible = "simple-bus";
+			reg = <0x0 0xc8100000 0x0 0x100000>;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>;
+
+			uart_AO: serial at 4c0 {
+				compatible = "amlogic,meson-uart";
+				reg = <0x0 0x004c0 0x0 0x14>;
+				interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
+				clocks = <&xtal>;
+				status = "disabled";
+			};
+		};
+
+		apb: apb at d0000000 {
+			compatible = "simple-bus";
+			reg = <0x0 0xd0000000 0x0 0x200000>;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;
+		};
+	};
+};
diff --git a/arch/arm/include/asm/arch-meson/gxbb.h b/arch/arm/include/asm/arch-meson/gxbb.h
new file mode 100644
index 0000000..f90f632
--- /dev/null
+++ b/arch/arm/include/asm/arch-meson/gxbb.h
@@ -0,0 +1,52 @@
+/*
+ * (C) Copyright 2016 - Beniamino Galvani <b.galvani@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __GXBB_H__
+#define __GXBB_H__
+
+#define GXBB_PERIPHS_BASE	0xc8834400
+#define GXBB_HIU_BASE		0xc883c000
+#define GXBB_ETH_BASE		0xc9410000
+
+/* Peripherals registers */
+#define GXBB_PERIPHS_ADDR(off)	(GXBB_PERIPHS_BASE + ((off) << 2))
+
+/* GPIO registers 0 to 6 */
+#define _GXBB_GPIO_OFF(n)	((n) == 6 ? 0x08 : 0x0c + 3 * (n))
+#define GXBB_GPIO_EN(n)		GXBB_PERIPHS_ADDR(_GXBB_GPIO_OFF(n) + 0)
+#define GXBB_GPIO_IN(n)		GXBB_PERIPHS_ADDR(_GXBB_GPIO_OFF(n) + 1)
+#define GXBB_GPIO_OUT(n)	GXBB_PERIPHS_ADDR(_GXBB_GPIO_OFF(n) + 2)
+
+/* Pinmux registers 0 to 12 */
+#define GXBB_PINMUX(n)		GXBB_PERIPHS_ADDR(0x2c + (n))
+
+#define GXBB_ETH_REG_0		GXBB_PERIPHS_ADDR(0x50)
+#define GXBB_ETH_REG_1		GXBB_PERIPHS_ADDR(0x51)
+
+#define GXBB_ETH_REG_0_PHY_INTF		BIT(0)
+#define GXBB_ETH_REG_0_TX_PHASE(x)	(((x) & 3) << 5)
+#define GXBB_ETH_REG_0_TX_RATIO(x)	(((x) & 7) << 7)
+#define GXBB_ETH_REG_0_PHY_CLK_EN	BIT(10)
+#define GXBB_ETH_REG_0_CLK_EN		BIT(12)
+
+/* HIU registers */
+#define GXBB_HIU_ADDR(off)	(GXBB_HIU_BASE + ((off) << 2))
+
+#define GXBB_MEM_PD_REG_0	GXBB_HIU_ADDR(0x40)
+
+/* Ethernet memory power domain */
+#define GXBB_MEM_PD_REG_0_ETH_MASK	(BIT(2) | BIT(3))
+
+/* Clock gates */
+#define GXBB_GCLK_MPEG_0	GXBB_HIU_ADDR(0x50)
+#define GXBB_GCLK_MPEG_1	GXBB_HIU_ADDR(0x51)
+#define GXBB_GCLK_MPEG_2	GXBB_HIU_ADDR(0x52)
+#define GXBB_GCLK_MPEG_OTHER	GXBB_HIU_ADDR(0x53)
+#define GXBB_GCLK_MPEG_AO	GXBB_HIU_ADDR(0x54)
+
+#define GXBB_GCLK_MPEG_1_ETH	BIT(3)
+
+#endif /* __GXBB_H__ */
diff --git a/arch/arm/mach-meson/Kconfig b/arch/arm/mach-meson/Kconfig
new file mode 100644
index 0000000..77d3cfe
--- /dev/null
+++ b/arch/arm/mach-meson/Kconfig
@@ -0,0 +1,31 @@
+if ARCH_MESON
+
+config MESON_GXBB
+	bool "Support Meson GXBaby"
+	select ARM64
+	select DM
+	select DM_SERIAL
+	help
+	  The Amlogic Meson GXBaby (S905) is an ARM SoC with a
+	  quad-core Cortex-A53 CPU and a Mali-450 GPU.
+
+if MESON_GXBB
+
+config TARGET_ODROID_C2
+	bool "ODROID-C2"
+	help
+	  ODROID-C2 is a single board computer based on Meson GXBaby
+	  with 2 GiB of RAM, Gigabit Ethernet, HDMI, 4 USB, micro-SD
+	  slot, eMMC, IR receiver and a 40-pin GPIO header.
+
+endif
+
+config SYS_SOC
+	default "meson"
+
+config SYS_MALLOC_F_LEN
+	default 0x1000
+
+source "board/hardkernel/odroid-c2/Kconfig"
+
+endif
diff --git a/arch/arm/mach-meson/Makefile b/arch/arm/mach-meson/Makefile
new file mode 100644
index 0000000..44e3d63
--- /dev/null
+++ b/arch/arm/mach-meson/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (c) 2016 Beniamino Galvani <b.galvani@gmail.com>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y += board.o
diff --git a/arch/arm/mach-meson/board.c b/arch/arm/mach-meson/board.c
new file mode 100644
index 0000000..782f86c
--- /dev/null
+++ b/arch/arm/mach-meson/board.c
@@ -0,0 +1,66 @@
+/*
+ * (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <libfdt.h>
+#include <linux/err.h>
+#include <asm/arch/gxbb.h>
+#include <asm/armv8/mmu.h>
+#include <asm/unaligned.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dram_init(void)
+{
+	const fdt64_t *val;
+	int offset;
+	int len;
+
+	offset = fdt_path_offset(gd->fdt_blob, "/memory");
+	if (offset < 0)
+		return -EINVAL;
+
+	val = fdt_getprop(gd->fdt_blob, offset, "reg", &len);
+	if (len < sizeof(*val) * 2)
+		return -EINVAL;
+
+	/* Use unaligned access since cache is still disabled */
+	gd->ram_size = get_unaligned_be64(&val[1]);
+
+	return 0;
+}
+
+void dram_init_banksize(void)
+{
+	/* Reserve first 16 MiB of RAM for firmware */
+	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE + (16 * 1024 * 1024);
+	gd->bd->bi_dram[0].size = gd->ram_size - (16 * 1024 * 1024);
+}
+
+void reset_cpu(ulong addr)
+{
+	psci_system_reset(true);
+}
+
+static struct mm_region gxbb_mem_map[] = {
+	{
+		.base = 0x0UL,
+		.size = 0x80000000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+			 PTE_BLOCK_INNER_SHARE
+	}, {
+		.base = 0x80000000UL,
+		.size = 0x80000000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			 PTE_BLOCK_NON_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
+	}, {
+		/* List terminator */
+		0,
+	}
+};
+
+struct mm_region *mem_map = gxbb_mem_map;
diff --git a/board/hardkernel/odroid-c2/Kconfig b/board/hardkernel/odroid-c2/Kconfig
new file mode 100644
index 0000000..687d9c6
--- /dev/null
+++ b/board/hardkernel/odroid-c2/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_ODROID_C2
+
+config SYS_BOARD
+	default "odroid-c2"
+
+config SYS_VENDOR
+	default "hardkernel"
+
+config SYS_CONFIG_NAME
+	default "odroid-c2"
+
+endif
diff --git a/board/hardkernel/odroid-c2/MAINTAINERS b/board/hardkernel/odroid-c2/MAINTAINERS
new file mode 100644
index 0000000..23ae1e7
--- /dev/null
+++ b/board/hardkernel/odroid-c2/MAINTAINERS
@@ -0,0 +1,6 @@
+ODROID-C2
+M:	Beniamino Galvani <b.galvani@gmail.com>
+S:	Maintained
+F:	board/hardkernel/odroid-c2/
+F:	include/configs/odroid-c2.h
+F:	configs/odroid-c2_defconfig
diff --git a/board/hardkernel/odroid-c2/Makefile b/board/hardkernel/odroid-c2/Makefile
new file mode 100644
index 0000000..571044b
--- /dev/null
+++ b/board/hardkernel/odroid-c2/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	:= odroid-c2.o
diff --git a/board/hardkernel/odroid-c2/README b/board/hardkernel/odroid-c2/README
new file mode 100644
index 0000000..d6d266a
--- /dev/null
+++ b/board/hardkernel/odroid-c2/README
@@ -0,0 +1,60 @@
+U-Boot for ODROID-C2
+====================
+
+ODROID-C2 is a single board computer manufactured by Hardkernel
+Co. Ltd with the following specifications:
+
+ - Amlogic S905 ARM Cortex-A53 quad-core SoC @ 2GHz
+ - ARM Mali 450 GPU
+ - 2GB DDR3 SDRAM
+ - Gigabit Ethernet
+ - HDMI 2.0 4K/60Hz display
+ - 40-pin GPIO header
+ - 4 x USB 2.0 Host, 1 x USB OTG
+ - eMMC, microSD
+ - Infrared receiver
+
+Schematics are available on the manufacturer website.
+
+Currently the u-boot port supports the following devices:
+ - serial
+ - Ethernet
+
+u-boot compilation
+==================
+
+ > export ARCH=arm
+ > export CROSS_COMPILE=aarch64-none-elf-
+ > make odroid-c2_defconfig
+ > make
+
+Image creation
+==============
+
+Amlogic doesn't provide sources for the firmware and for tools needed
+to create the bootloader image, so it is necessary to obtain them from
+the git tree published by the board vendor:
+
+ > DIR=odroid-c2
+ > git clone --depth 1 \
+       https://github.com/hardkernel/u-boot.git -b odroidc2-v2015.01 \
+       $DIR
+ > $DIR/fip/fip_create --bl30  $DIR/fip/gxb/bl30.bin \
+                       --bl301 $DIR/fip/gxb/bl301.bin \
+                       --bl31  $DIR/fip/gxb/bl31.bin \
+                       --bl33  u-boot.bin \
+                       $DIR/fip.bin
+ > $DIR/fip/fip_create --dump $DIR/fip.bin
+ > cat $DIR/fip/gxb/bl2.package $DIR/fip.bin > $DIR/boot_new.bin
+ > $DIR/fip/gxb/aml_encrypt_gxb --bootsig \
+                                --input $DIR/boot_new.bin \
+                                --output $DIR/u-boot.img
+ > dd if=$DIR/u-boot.img of=$DIR/u-boot.gxbb bs=512 skip=96
+
+and then write the image to SD with:
+
+ > DEV=/dev/your_sd_device
+ > BL1=$DIR/sd_fuse/bl1.bin.hardkernel
+ > dd if=$BL1 of=$DEV conv=fsync bs=1 count=442
+ > dd if=$BL1 of=$DEV conv=fsync bs=512 skip=1 seek=1
+ > dd if=$DIR/u-boot.gxbb of=$DEV conv=fsync bs=512 seek=97
diff --git a/board/hardkernel/odroid-c2/odroid-c2.c b/board/hardkernel/odroid-c2/odroid-c2.c
new file mode 100644
index 0000000..c258d4f
--- /dev/null
+++ b/board/hardkernel/odroid-c2/odroid-c2.c
@@ -0,0 +1,51 @@
+/*
+ * (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/gxbb.h>
+#include <dm/platdata.h>
+#include <phy.h>
+
+int board_init(void)
+{
+	return 0;
+}
+
+static const struct eth_pdata gxbb_eth_pdata = {
+	.iobase = GXBB_ETH_BASE,
+	.phy_interface = PHY_INTERFACE_MODE_RGMII,
+};
+
+U_BOOT_DEVICE(meson_eth) = {
+	.name = "eth_designware",
+	.platdata = &gxbb_eth_pdata,
+};
+
+int misc_init_r(void)
+{
+	/* Select Ethernet function */
+	setbits_le32(GXBB_PINMUX(6), 0x3fff);
+
+	/* Set RGMII mode */
+	setbits_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_PHY_INTF |
+				     GXBB_ETH_REG_0_TX_PHASE(1) |
+				     GXBB_ETH_REG_0_TX_RATIO(4) |
+				     GXBB_ETH_REG_0_PHY_CLK_EN |
+				     GXBB_ETH_REG_0_CLK_EN);
+
+	/* Enable power and clock gate */
+	setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
+	clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
+
+	/* Reset PHY on GPIOZ_14 */
+	clrbits_le32(GXBB_GPIO_EN(3), BIT(14));
+	clrbits_le32(GXBB_GPIO_OUT(3), BIT(14));
+	mdelay(10);
+	setbits_le32(GXBB_GPIO_OUT(3), BIT(14));
+
+	return 0;
+}
diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig
new file mode 100644
index 0000000..a771b20
--- /dev/null
+++ b/configs/odroid-c2_defconfig
@@ -0,0 +1,23 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MESON=y
+CONFIG_MESON_GXBB=y
+CONFIG_TARGET_ODROID_C2=y
+CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-odroidc2"
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_LOADS is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_SOURCE is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_CONTROL=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_MESON=y
+CONFIG_DEBUG_UART_BASE=0xc81004c0
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_MESON_SERIAL=y
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index a9a5d47..7720b3e 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -112,6 +112,14 @@ config DEBUG_UART_S5P
 	  will need to provide parameters to make this work. The driver will
 	  be available until the real driver-model serial is running.
 
+config DEBUG_UART_MESON
+	bool "Amlogic Meson"
+	depends on MESON_SERIAL
+	help
+	  Select this to enable a debug UART using the serial_meson driver. You
+	  will need to provide parameters to make this work. The driver will
+	  be available until the real driver-model serial is running.
+
 config DEBUG_UART_UARTLITE
 	bool "Xilinx Uartlite"
 	help
@@ -320,6 +328,13 @@ config XILINX_UARTLITE
 	  If you have a Xilinx based board and want to use the uartlite
 	  serial ports, say Y to this option. If unsure, say N.
 
+config MESON_SERIAL
+	bool "Support for Amlogic Meson UART"
+	depends on DM_SERIAL && ARCH_MESON
+	help
+	  If you have an Amlogic Meson based board and want to use the on-chip
+	  serial ports, say Y to this option. If unsure, say N.
+
 config MSM_SERIAL
 	bool "Qualcomm on-chip UART"
 	depends on DM_SERIAL
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index b0ac9d8..35c143d 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -26,6 +26,7 @@ obj-$(CONFIG_SYS_NS16550) += ns16550.o
 obj-$(CONFIG_S5P) += serial_s5p.o
 obj-$(CONFIG_MXC_UART) += serial_mxc.o
 obj-$(CONFIG_PXA_SERIAL) += serial_pxa.o
+obj-$(CONFIG_MESON_SERIAL) += serial_meson.o
 obj-$(CONFIG_S3C24X0_SERIAL) += serial_s3c24x0.o
 obj-$(CONFIG_XILINX_UARTLITE) += serial_xuartlite.o
 obj-$(CONFIG_SANDBOX_SERIAL) += sandbox.o
diff --git a/drivers/serial/serial_meson.c b/drivers/serial/serial_meson.c
new file mode 100644
index 0000000..1b49426
--- /dev/null
+++ b/drivers/serial/serial_meson.c
@@ -0,0 +1,162 @@
+/*
+ * (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <fdtdec.h>
+#include <linux/compiler.h>
+#include <serial.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct meson_uart {
+	u32 wfifo;
+	u32 rfifo;
+	u32 control;
+	u32 status;
+	u32 misc;
+};
+
+struct meson_serial_platdata {
+	struct meson_uart *reg;
+};
+
+/* AML_UART_STATUS bits */
+#define AML_UART_PARITY_ERR		BIT(16)
+#define AML_UART_FRAME_ERR		BIT(17)
+#define AML_UART_TX_FIFO_WERR		BIT(18)
+#define AML_UART_RX_EMPTY		BIT(20)
+#define AML_UART_TX_FULL		BIT(21)
+#define AML_UART_TX_EMPTY		BIT(22)
+#define AML_UART_XMIT_BUSY		BIT(25)
+#define AML_UART_ERR			(AML_UART_PARITY_ERR | \
+					 AML_UART_FRAME_ERR  | \
+					 AML_UART_TX_FIFO_WERR)
+
+/* AML_UART_CONTROL bits */
+#define AML_UART_TX_EN			BIT(12)
+#define AML_UART_RX_EN			BIT(13)
+#define AML_UART_TX_RST			BIT(22)
+#define AML_UART_RX_RST			BIT(23)
+#define AML_UART_CLR_ERR		BIT(24)
+
+static void meson_serial_init(struct meson_uart *uart)
+{
+	u32 val;
+
+	val = readl(&uart->control);
+	val |= (AML_UART_RX_RST | AML_UART_TX_RST | AML_UART_CLR_ERR);
+	writel(val, &uart->control);
+	val &= ~(AML_UART_RX_RST | AML_UART_TX_RST | AML_UART_CLR_ERR);
+	writel(val, &uart->control);
+	val |= (AML_UART_RX_EN | AML_UART_TX_EN);
+	writel(val, &uart->control);
+}
+
+static int meson_serial_probe(struct udevice *dev)
+{
+	struct meson_serial_platdata *plat = dev->platdata;
+	struct meson_uart *const uart = plat->reg;
+
+	meson_serial_init(uart);
+
+	return 0;
+}
+
+static int meson_serial_getc(struct udevice *dev)
+{
+	struct meson_serial_platdata *plat = dev->platdata;
+	struct meson_uart *const uart = plat->reg;
+
+	if (readl(&uart->status) & AML_UART_RX_EMPTY)
+		return -EAGAIN;
+
+	return readl(&uart->rfifo) & 0xff;
+}
+
+static int meson_serial_putc(struct udevice *dev, const char ch)
+{
+	struct meson_serial_platdata *plat = dev->platdata;
+	struct meson_uart *const uart = plat->reg;
+
+	if (readl(&uart->status) & AML_UART_TX_FULL)
+		return -EAGAIN;
+
+	writel(ch, &uart->wfifo);
+
+	return 0;
+}
+
+static int meson_serial_pending(struct udevice *dev, bool input)
+{
+	struct meson_serial_platdata *plat = dev->platdata;
+	struct meson_uart *const uart = plat->reg;
+	uint32_t status = readl(&uart->status);
+
+	if (input)
+		return !(status & AML_UART_RX_EMPTY);
+	else
+		return !(status & AML_UART_TX_FULL);
+}
+
+static int meson_serial_ofdata_to_platdata(struct udevice *dev)
+{
+	struct meson_serial_platdata *plat = dev->platdata;
+	fdt_addr_t addr;
+
+	addr = dev_get_addr(dev);
+	if (addr == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	plat->reg = (struct meson_uart *)addr;
+
+	return 0;
+}
+
+static const struct dm_serial_ops meson_serial_ops = {
+	.putc = meson_serial_putc,
+	.pending = meson_serial_pending,
+	.getc = meson_serial_getc,
+};
+
+static const struct udevice_id meson_serial_ids[] = {
+	{ .compatible = "amlogic,meson-uart" },
+	{ }
+};
+
+U_BOOT_DRIVER(serial_meson) = {
+	.name		= "serial_meson",
+	.id		= UCLASS_SERIAL,
+	.of_match	= meson_serial_ids,
+	.probe		= meson_serial_probe,
+	.ops		= &meson_serial_ops,
+	.flags		= DM_FLAG_PRE_RELOC,
+	.ofdata_to_platdata = meson_serial_ofdata_to_platdata,
+	.platdata_auto_alloc_size = sizeof(struct meson_serial_platdata),
+};
+
+#ifdef CONFIG_DEBUG_UART_MESON
+
+#include <debug_uart.h>
+
+static inline void _debug_uart_init(void)
+{
+}
+
+static inline void _debug_uart_putc(int ch)
+{
+	struct meson_uart *regs = (struct meson_uart *)CONFIG_DEBUG_UART_BASE;
+
+	while (readl(&regs->status) & AML_UART_TX_FULL)
+		;
+
+	writel(ch, &regs->wfifo);
+}
+
+DEBUG_UART_FUNCS
+
+#endif
diff --git a/include/configs/odroid-c2.h b/include/configs/odroid-c2.h
new file mode 100644
index 0000000..5dbc0ce
--- /dev/null
+++ b/include/configs/odroid-c2.h
@@ -0,0 +1,55 @@
+/*
+ * Configuration for ODROID-C2
+ * (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_CPU_ARMV8
+#define CONFIG_REMAKE_ELF
+#define CONFIG_SYS_CACHELINE_SIZE	64
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_NR_DRAM_BANKS		1
+#define CONFIG_ENV_IS_NOWHERE		1
+#define CONFIG_ENV_SIZE			0x2000
+#define CONFIG_SYS_MAXARGS		32
+#define CONFIG_SYS_MALLOC_LEN		(32 << 20)
+#define CONFIG_SYS_CBSIZE		1024
+#define CONFIG_MISC_INIT_R
+
+#define CONFIG_SYS_SDRAM_BASE		0
+#define CONFIG_SYS_TEXT_BASE		0x01000000
+#define CONFIG_SYS_INIT_SP_ADDR		0x20000000
+#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_TEXT_BASE
+
+/* Generic Interrupt Controller Definitions */
+#define GICD_BASE			0xc4301000
+#define GICC_BASE			0xc4302000
+
+#if !defined(CONFIG_IDENT_STRING)
+# define CONFIG_IDENT_STRING		" odroid-c2"
+#endif
+
+/* Serial setup */
+#define CONFIG_CONS_INDEX		0
+#define CONFIG_BAUDRATE			115200
+#define CONFIG_SYS_BAUDRATE_TABLE \
+	{ 4800, 9600, 19200, 38400, 57600, 115200 }
+
+#define CONFIG_CMD_ENV
+
+/* Monitor Command Prompt */
+/* Console I/O Buffer Size */
+#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
+					sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_CMDLINE_EDITING
+
+#include <config_distro_defaults.h>
+
+#endif /* __CONFIG_H */
-- 
2.7.3

[U-Boot] [PATCH v5 3/4] arm: add initial support for Amlogic Meson and ODROID-C2

[Tom Rini]

On Sun, Apr 24, 2016 at 08:50:01AM +0200, Beniamino Galvani wrote:

> This adds platform code for the Amlogic Meson GXBaby (S905) SoC and a
> board definition for ODROID-C2. This initial submission only supports
> UART and Ethernet (through the existing Designware driver). DTS files
> are the ones submitted to Linux arm-soc for 4.7 [1].
> 
> [1] https://patchwork.ozlabs.org/patch/603583/
> 
> Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
[snip]
> +#if !defined(CONFIG_IDENT_STRING)
> +# define CONFIG_IDENT_STRING		" odroid-c2"
> +#endif

Would this ever already be set?

> +/* Serial setup */
> +#define CONFIG_CONS_INDEX		0
> +#define CONFIG_BAUDRATE			115200
> +#define CONFIG_SYS_BAUDRATE_TABLE \
> +	{ 4800, 9600, 19200, 38400, 57600, 115200 }

And I assume you could live with the default table really.

Otherwise looks good, thanks.

-- 
Tom
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[U-Boot] [PATCH v5 3/4] arm: add initial support for Amlogic Meson and ODROID-C2

[Beniamino Galvani]

On Mon, Apr 25, 2016 at 04:53:09PM -0400, Tom Rini wrote:
> > +#if !defined(CONFIG_IDENT_STRING)
> > +# define CONFIG_IDENT_STRING		" odroid-c2"
> > +#endif
> 
> Would this ever already be set?

No, it shouldn't.

> > +/* Serial setup */
> > +#define CONFIG_CONS_INDEX		0
> > +#define CONFIG_BAUDRATE			115200
> > +#define CONFIG_SYS_BAUDRATE_TABLE \
> > +	{ 4800, 9600, 19200, 38400, 57600, 115200 }
> 
> And I assume you could live with the default table really.

Right.

I will fix both and resubmit, thanks!

Beniamino

[U-Boot] [PATCH v5 3/4] arm: add initial support for Amlogic Meson and ODROID-C2

[Simon Glass]

Hi,

On 24 April 2016 at 00:50, Beniamino Galvani <b.galvani@gmail.com> wrote:
> This adds platform code for the Amlogic Meson GXBaby (S905) SoC and a
> board definition for ODROID-C2. This initial submission only supports
> UART and Ethernet (through the existing Designware driver). DTS files
> are the ones submitted to Linux arm-soc for 4.7 [1].
>
> [1] https://patchwork.ozlabs.org/patch/603583/
>
> Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>

A few nits below but this looks very clean, thank you.

Reviewed-by: Simon Glass <sjg@chromium.org>

> ---
>  arch/arm/Kconfig                       |   5 +
>  arch/arm/Makefile                      |   1 +
>  arch/arm/dts/Makefile                  |   2 +
>  arch/arm/dts/meson-gxbb-odroidc2.dts   |  69 +++++++++++++
>  arch/arm/dts/meson-gxbb.dtsi           | 178 +++++++++++++++++++++++++++++++++
>  arch/arm/include/asm/arch-meson/gxbb.h |  52 ++++++++++
>  arch/arm/mach-meson/Kconfig            |  31 ++++++
>  arch/arm/mach-meson/Makefile           |   7 ++
>  arch/arm/mach-meson/board.c            |  66 ++++++++++++
>  board/hardkernel/odroid-c2/Kconfig     |  12 +++
>  board/hardkernel/odroid-c2/MAINTAINERS |   6 ++
>  board/hardkernel/odroid-c2/Makefile    |   7 ++
>  board/hardkernel/odroid-c2/README      |  60 +++++++++++
>  board/hardkernel/odroid-c2/odroid-c2.c |  51 ++++++++++
>  configs/odroid-c2_defconfig            |  23 +++++
>  drivers/serial/Kconfig                 |  15 +++
>  drivers/serial/Makefile                |   1 +
>  drivers/serial/serial_meson.c          | 162 ++++++++++++++++++++++++++++++
>  include/configs/odroid-c2.h            |  55 ++++++++++
>  19 files changed, 803 insertions(+)
>  create mode 100644 arch/arm/dts/meson-gxbb-odroidc2.dts
>  create mode 100644 arch/arm/dts/meson-gxbb.dtsi
>  create mode 100644 arch/arm/include/asm/arch-meson/gxbb.h
>  create mode 100644 arch/arm/mach-meson/Kconfig
>  create mode 100644 arch/arm/mach-meson/Makefile
>  create mode 100644 arch/arm/mach-meson/board.c
>  create mode 100644 board/hardkernel/odroid-c2/Kconfig
>  create mode 100644 board/hardkernel/odroid-c2/MAINTAINERS
>  create mode 100644 board/hardkernel/odroid-c2/Makefile
>  create mode 100644 board/hardkernel/odroid-c2/README
>  create mode 100644 board/hardkernel/odroid-c2/odroid-c2.c
>  create mode 100644 configs/odroid-c2_defconfig
>  create mode 100644 drivers/serial/serial_meson.c
>  create mode 100644 include/configs/odroid-c2.h
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index d1c3157..95a0838 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -456,6 +456,9 @@ config ARCH_KEYSTONE
>         select SUPPORT_SPL
>         select CMD_POWEROFF
>
> +config ARCH_MESON
> +       bool "Amlogic Meson"

Please add a help message describing what this is and what features it has.

> +
>  config ARCH_MX7
>         bool "Freescale MX7"
>         select CPU_V7
> @@ -780,6 +783,8 @@ source "arch/arm/mach-orion5x/Kconfig"
>
>  source "arch/arm/cpu/armv7/rmobile/Kconfig"
>
> +source "arch/arm/mach-meson/Kconfig"
> +
>  source "arch/arm/mach-rockchip/Kconfig"
>
>  source "arch/arm/mach-s5pc1xx/Kconfig"
> diff --git a/arch/arm/Makefile b/arch/arm/Makefile
> index d516345..ecd1887 100644
> --- a/arch/arm/Makefile
> +++ b/arch/arm/Makefile
> @@ -50,6 +50,7 @@ machine-$(CONFIG_ARCH_HIGHBANK)               += highbank
>  machine-$(CONFIG_ARCH_KEYSTONE)                += keystone
>  # TODO: rename CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOOD
>  machine-$(CONFIG_KIRKWOOD)             += kirkwood
> +machine-$(CONFIG_ARCH_MESON)           += meson
>  machine-$(CONFIG_ARCH_MVEBU)           += mvebu
>  # TODO: rename CONFIG_TEGRA -> CONFIG_ARCH_TEGRA
>  # TODO: rename CONFIG_ORION5X -> CONFIG_ARCH_ORION5X
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index aa31fd9..be28d21 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -24,6 +24,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
>         rk3288-jerry.dtb \
>         rk3288-rock2-square.dtb \
>         rk3036-sdk.dtb
> +dtb-$(CONFIG_ARCH_MESON) += \
> +       meson-gxbb-odroidc2.dtb
>  dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
>         tegra20-medcom-wide.dtb \
>         tegra20-paz00.dtb \
> diff --git a/arch/arm/dts/meson-gxbb-odroidc2.dts b/arch/arm/dts/meson-gxbb-odroidc2.dts
> new file mode 100644
> index 0000000..653c2fa
> --- /dev/null
> +++ b/arch/arm/dts/meson-gxbb-odroidc2.dts
> @@ -0,0 +1,69 @@
> +/*
> + * Copyright (c) 2016 Andreas F?rber
> + * Copyright (c) 2016 BayLibre, Inc.
> + * Author: Kevin Hilman <khilman@kernel.org>
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.

Can you use SPDX for these?

> + *
> + *  a) This library is free software; you can redistribute it and/or
> + *     modify it under the terms of the GNU General Public License as
> + *     published by the Free Software Foundation; either version 2 of the
> + *     License, or (at your option) any later version.
> + *
> + *     This library is distributed in the hope that it will be useful,
> + *     but WITHOUT ANY WARRANTY; without even the implied warranty of
> + *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + *     GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + *  b) Permission is hereby granted, free of charge, to any person
> + *     obtaining a copy of this software and associated documentation
> + *     files (the "Software"), to deal in the Software without
> + *     restriction, including without limitation the rights to use,
> + *     copy, modify, merge, publish, distribute, sublicense, and/or
> + *     sell copies of the Software, and to permit persons to whom the
> + *     Software is furnished to do so, subject to the following
> + *     conditions:
> + *
> + *     The above copyright notice and this permission notice shall be
> + *     included in all copies or substantial portions of the Software.
> + *
> + *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + *     OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +/dts-v1/;

[snip]

> diff --git a/board/hardkernel/odroid-c2/odroid-c2.c b/board/hardkernel/odroid-c2/odroid-c2.c
> new file mode 100644
> index 0000000..c258d4f
> --- /dev/null
> +++ b/board/hardkernel/odroid-c2/odroid-c2.c
> @@ -0,0 +1,51 @@
> +/*
> + * (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com>
> + *
> + * SPDX-License-Identifier:    GPL-2.0+
> + */
> +
> +#include <common.h>
> +#include <asm/io.h>
> +#include <asm/arch/gxbb.h>
> +#include <dm/platdata.h>
> +#include <phy.h>
> +
> +int board_init(void)
> +{
> +       return 0;
> +}
> +
> +static const struct eth_pdata gxbb_eth_pdata = {
> +       .iobase = GXBB_ETH_BASE,
> +       .phy_interface = PHY_INTERFACE_MODE_RGMII,
> +};
> +
> +U_BOOT_DEVICE(meson_eth) = {
> +       .name = "eth_designware",
> +       .platdata = &gxbb_eth_pdata,
> +};
> +
> +int misc_init_r(void)
> +{
> +       /* Select Ethernet function */
> +       setbits_le32(GXBB_PINMUX(6), 0x3fff);
> +
> +       /* Set RGMII mode */
> +       setbits_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_PHY_INTF |
> +                                    GXBB_ETH_REG_0_TX_PHASE(1) |
> +                                    GXBB_ETH_REG_0_TX_RATIO(4) |
> +                                    GXBB_ETH_REG_0_PHY_CLK_EN |
> +                                    GXBB_ETH_REG_0_CLK_EN);
> +
> +       /* Enable power and clock gate */
> +       setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
> +       clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
> +
> +       /* Reset PHY on GPIOZ_14 */
> +       clrbits_le32(GXBB_GPIO_EN(3), BIT(14));
> +       clrbits_le32(GXBB_GPIO_OUT(3), BIT(14));
> +       mdelay(10);
> +       setbits_le32(GXBB_GPIO_OUT(3), BIT(14));

Once you have a GPIO/pinctrl driver this could presumably be replaced.

> +
> +       return 0;
> +}

Regards,
Simon

[U-Boot] [PATCH v5 3/4] arm: add initial support for Amlogic Meson and ODROID-C2

[Tom Rini]

On Sun, May 01, 2016 at 12:56:21PM -0600, Simon Glass wrote:
> Hi,
> 
> On 24 April 2016 at 00:50, Beniamino Galvani <b.galvani@gmail.com> wrote:
> > This adds platform code for the Amlogic Meson GXBaby (S905) SoC and a
> > board definition for ODROID-C2. This initial submission only supports
> > UART and Ethernet (through the existing Designware driver). DTS files
> > are the ones submitted to Linux arm-soc for 4.7 [1].
> >
> > [1] https://patchwork.ozlabs.org/patch/603583/
> >
> > Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
[snip]
> > +++ b/arch/arm/dts/meson-gxbb-odroidc2.dts
> > @@ -0,0 +1,69 @@
> > +/*
> > + * Copyright (c) 2016 Andreas F?rber
> > + * Copyright (c) 2016 BayLibre, Inc.
> > + * Author: Kevin Hilman <khilman@kernel.org>
> > + *
> > + * This file is dual-licensed: you can use it either under the terms
> > + * of the GPL or the X11 license, at your option. Note that this dual
> > + * licensing only applies to this file, and not this project as a
> > + * whole.
> 
> Can you use SPDX for these?

No, we don't bother for DTS files where we are not also the upstream
source of them as that just makes churn.

-- 
Tom
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[U-Boot] [PATCH v5 3/4] arm: add initial support for Amlogic Meson and ODROID-C2

[Beniamino Galvani]

On Sun, May 01, 2016 at 12:56:21PM -0600, Simon Glass wrote:
> > +config ARCH_MESON
> > +       bool "Amlogic Meson"
> 
> Please add a help message describing what this is and what features it has.

Fixed in v7.

> > +       /* Reset PHY on GPIOZ_14 */
> > +       clrbits_le32(GXBB_GPIO_EN(3), BIT(14));
> > +       clrbits_le32(GXBB_GPIO_OUT(3), BIT(14));
> > +       mdelay(10);
> > +       setbits_le32(GXBB_GPIO_OUT(3), BIT(14));
> 
> Once you have a GPIO/pinctrl driver this could presumably be replaced.

Yeah, that's in my TODO list.

Thanks,
Beniamino

[U-Boot] [PATCH v5 4/4] arm: meson: implement calls to secure monitor

[Beniamino Galvani]

Implement calls to secure monitor to read the MAC address from e-fuse.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
---
 arch/arm/include/asm/arch-meson/sm.h   | 12 +++++++
 arch/arm/mach-meson/Makefile           |  2 +-
 arch/arm/mach-meson/board.c            |  1 +
 arch/arm/mach-meson/sm.c               | 57 ++++++++++++++++++++++++++++++++++
 board/hardkernel/odroid-c2/odroid-c2.c | 16 ++++++++++
 5 files changed, 87 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/include/asm/arch-meson/sm.h
 create mode 100644 arch/arm/mach-meson/sm.c

diff --git a/arch/arm/include/asm/arch-meson/sm.h b/arch/arm/include/asm/arch-meson/sm.h
new file mode 100644
index 0000000..225438d
--- /dev/null
+++ b/arch/arm/include/asm/arch-meson/sm.h
@@ -0,0 +1,12 @@
+/*
+ * (C) Copyright 2016 - Beniamino Galvani <b.galvani@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __MESON_SM_H__
+#define __MESON_SM_H__
+
+ssize_t meson_sm_read_efuse(uintptr_t offset, void *buffer, size_t size);
+
+#endif /* __MESON_SM_H__ */
diff --git a/arch/arm/mach-meson/Makefile b/arch/arm/mach-meson/Makefile
index 44e3d63..bf49b8b 100644
--- a/arch/arm/mach-meson/Makefile
+++ b/arch/arm/mach-meson/Makefile
@@ -4,4 +4,4 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
-obj-y += board.o
+obj-y += board.o sm.o
diff --git a/arch/arm/mach-meson/board.c b/arch/arm/mach-meson/board.c
index 782f86c..64fa3c1 100644
--- a/arch/arm/mach-meson/board.c
+++ b/arch/arm/mach-meson/board.c
@@ -8,6 +8,7 @@
 #include <libfdt.h>
 #include <linux/err.h>
 #include <asm/arch/gxbb.h>
+#include <asm/arch/sm.h>
 #include <asm/armv8/mmu.h>
 #include <asm/unaligned.h>
 
diff --git a/arch/arm/mach-meson/sm.c b/arch/arm/mach-meson/sm.c
new file mode 100644
index 0000000..1b35a22
--- /dev/null
+++ b/arch/arm/mach-meson/sm.c
@@ -0,0 +1,57 @@
+/*
+ * (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ *
+ * Secure monitor calls.
+ */
+
+#include <common.h>
+#include <asm/arch/gxbb.h>
+#include <linux/kernel.h>
+
+#define FN_GET_SHARE_MEM_INPUT_BASE	0x82000020
+#define FN_GET_SHARE_MEM_OUTPUT_BASE	0x82000021
+#define FN_EFUSE_READ			0x82000030
+#define FN_EFUSE_WRITE			0x82000031
+
+static void *shmem_input;
+static void *shmem_output;
+
+static void meson_init_shmem(void)
+{
+	struct pt_regs regs;
+
+	if (shmem_input && shmem_output)
+		return;
+
+	regs.regs[0] = FN_GET_SHARE_MEM_INPUT_BASE;
+	smc_call(&regs);
+	shmem_input = (void *)regs.regs[0];
+
+	regs.regs[0] = FN_GET_SHARE_MEM_OUTPUT_BASE;
+	smc_call(&regs);
+	shmem_output = (void *)regs.regs[0];
+
+	debug("Secure Monitor shmem: 0x%p 0x%p\n", shmem_input, shmem_output);
+}
+
+ssize_t meson_sm_read_efuse(uintptr_t offset, void *buffer, size_t size)
+{
+	struct pt_regs regs;
+
+	meson_init_shmem();
+
+	regs.regs[0] = FN_EFUSE_READ;
+	regs.regs[1] = offset;
+	regs.regs[2] = size;
+
+	smc_call(&regs);
+
+	if (regs.regs[0] == 0)
+		return -1;
+
+	memcpy(buffer, shmem_output, min(size, regs.regs[0]));
+
+	return regs.regs[0];
+}
diff --git a/board/hardkernel/odroid-c2/odroid-c2.c b/board/hardkernel/odroid-c2/odroid-c2.c
index c258d4f..bd72100 100644
--- a/board/hardkernel/odroid-c2/odroid-c2.c
+++ b/board/hardkernel/odroid-c2/odroid-c2.c
@@ -7,9 +7,15 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/gxbb.h>
+#include <asm/arch/sm.h>
 #include <dm/platdata.h>
 #include <phy.h>
 
+#define EFUSE_SN_OFFSET		20
+#define EFUSE_SN_SIZE		16
+#define EFUSE_MAC_OFFSET	52
+#define EFUSE_MAC_SIZE		6
+
 int board_init(void)
 {
 	return 0;
@@ -27,6 +33,9 @@ U_BOOT_DEVICE(meson_eth) = {
 
 int misc_init_r(void)
 {
+	u8 mac_addr[EFUSE_MAC_SIZE];
+	ssize_t len;
+
 	/* Select Ethernet function */
 	setbits_le32(GXBB_PINMUX(6), 0x3fff);
 
@@ -47,5 +56,12 @@ int misc_init_r(void)
 	mdelay(10);
 	setbits_le32(GXBB_GPIO_OUT(3), BIT(14));
 
+	if (!eth_getenv_enetaddr("ethaddr", mac_addr)) {
+		len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
+					  mac_addr, EFUSE_MAC_SIZE);
+		if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr))
+			eth_setenv_enetaddr("ethaddr", mac_addr);
+	}
+
 	return 0;
 }
-- 
2.7.3