From: linux@armlinux.org.uk (Russell King - ARM Linux)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4] arm64: cpuinfo: Expose MIDR_EL1 and REVIDR_EL1 to sysfs
Date: Mon, 13 Jun 2016 18:21:40 +0100 [thread overview]
Message-ID: <20160613172140.GY1041@n2100.armlinux.org.uk> (raw)
In-Reply-To: <1465837689-28215-1-git-send-email-suzuki.poulose@arm.com>
On Mon, Jun 13, 2016 at 06:08:09PM +0100, Suzuki K Poulose wrote:
> From: Steve Capper <steve.capper@linaro.org>
>
> It can be useful for JIT software to be aware of MIDR_EL1 and
> REVIDR_EL1 to ascertain the presence of any core errata that could
> affect codegen.
>
> This patch exposes these registers through sysfs:
>
> /sys/devices/system/cpu/cpu$ID/identification/midr
> /sys/devices/system/cpu/cpu$ID/identification/revidr
>
> where $ID is the cpu number. For big.LITTLE systems, one can have a
> mixture of cores (e.g. Cortex A53 and Cortex A57), thus all CPUs need
> to be enumerated.
>
> If the kernel does not have valid information to populate these entries
> with, an empty string is returned to userspace.
So there's no confusion, I've historically said no on 32-bit ARM to
exposing the MIDR to userspace, and my position on that for 32-bit
ARM has not changed.
--
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up
according to speedtest.net.
WARNING: multiple messages have this Message-ID (diff)
From: Russell King - ARM Linux <linux@armlinux.org.uk>
To: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: catalin.marinas@arm.com, will.deacon@arm.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, steve.capper@arm.com,
Steve Capper <steve.capper@linaro.org>,
Mark Rutland <mark.rutland@arm.com>
Subject: Re: [PATCH v4] arm64: cpuinfo: Expose MIDR_EL1 and REVIDR_EL1 to sysfs
Date: Mon, 13 Jun 2016 18:21:40 +0100 [thread overview]
Message-ID: <20160613172140.GY1041@n2100.armlinux.org.uk> (raw)
In-Reply-To: <1465837689-28215-1-git-send-email-suzuki.poulose@arm.com>
On Mon, Jun 13, 2016 at 06:08:09PM +0100, Suzuki K Poulose wrote:
> From: Steve Capper <steve.capper@linaro.org>
>
> It can be useful for JIT software to be aware of MIDR_EL1 and
> REVIDR_EL1 to ascertain the presence of any core errata that could
> affect codegen.
>
> This patch exposes these registers through sysfs:
>
> /sys/devices/system/cpu/cpu$ID/identification/midr
> /sys/devices/system/cpu/cpu$ID/identification/revidr
>
> where $ID is the cpu number. For big.LITTLE systems, one can have a
> mixture of cores (e.g. Cortex A53 and Cortex A57), thus all CPUs need
> to be enumerated.
>
> If the kernel does not have valid information to populate these entries
> with, an empty string is returned to userspace.
So there's no confusion, I've historically said no on 32-bit ARM to
exposing the MIDR to userspace, and my position on that for 32-bit
ARM has not changed.
--
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up
according to speedtest.net.
next prev parent reply other threads:[~2016-06-13 17:21 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-13 17:08 [PATCH v4] arm64: cpuinfo: Expose MIDR_EL1 and REVIDR_EL1 to sysfs Suzuki K Poulose
2016-06-13 17:08 ` Suzuki K Poulose
2016-06-13 17:21 ` Russell King - ARM Linux [this message]
2016-06-13 17:21 ` Russell King - ARM Linux
2016-06-14 11:01 ` Catalin Marinas
2016-06-14 11:01 ` Catalin Marinas
2016-06-13 17:26 ` Mark Rutland
2016-06-13 17:26 ` Mark Rutland
2016-06-13 17:40 ` Suzuki K Poulose
2016-06-13 17:40 ` Suzuki K Poulose
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