From: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>
To: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Cc: Marc Zyngier <marc.zyngier-5wv7dgnIgG8@public.gmane.org>,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>,
cf-TNX95d0MmH7DzftRWevZcw@public.gmane.org,
huangtao-TNX95d0MmH7DzftRWevZcw@public.gmane.org,
jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org,
Caesar Wang <wxt-TNX95d0MmH7DzftRWevZcw@public.gmane.org>,
David Wu <david.wu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>,
Brian Norris
<briannorris-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>
Subject: Re: [PATCH v2] drivers/perf: arm-pmu: Handle per-interrupt affinity mask
Date: Mon, 11 Jul 2016 15:47:06 +0100 [thread overview]
Message-ID: <20160711144706.GA27013@arm.com> (raw)
In-Reply-To: <20160711143716.GA9267@rob-hp-laptop>
On Mon, Jul 11, 2016 at 09:37:16AM -0500, Rob Herring wrote:
> On Wed, Jul 06, 2016 at 03:33:47PM +0100, Marc Zyngier wrote:
> > On a big-little system, PMUs can be wired to CPUs using per CPU
> > interrups (PPI). In this case, it is important to make sure that
> > the enable/disable do happen on the right set of CPUs.
> >
> > So instead of relying on the interrupt-affinity property, we can
> > use the actual percpu affinity that DT exposes as part of the
> > interrupt specifier. The DT binding is also updated to reflect
> > the fact that the interrupt-affinity property shouldn't be used
> > in that case.
> >
> > Signed-off-by: Marc Zyngier <marc.zyngier-5wv7dgnIgG8@public.gmane.org>
> > ---
> > * From v1:
> > - propagate the error if irq_get_percpu_devid_partition fails
> >
> > Documentation/devicetree/bindings/arm/pmu.txt | 4 +++-
>
> I acked v1, please add acks.
This is queued in arm64/for-next/core, but I spotted your Ack and added
it when I sent the patch to Catalin.
Will
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WARNING: multiple messages have this Message-ID (diff)
From: will.deacon@arm.com (Will Deacon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2] drivers/perf: arm-pmu: Handle per-interrupt affinity mask
Date: Mon, 11 Jul 2016 15:47:06 +0100 [thread overview]
Message-ID: <20160711144706.GA27013@arm.com> (raw)
In-Reply-To: <20160711143716.GA9267@rob-hp-laptop>
On Mon, Jul 11, 2016 at 09:37:16AM -0500, Rob Herring wrote:
> On Wed, Jul 06, 2016 at 03:33:47PM +0100, Marc Zyngier wrote:
> > On a big-little system, PMUs can be wired to CPUs using per CPU
> > interrups (PPI). In this case, it is important to make sure that
> > the enable/disable do happen on the right set of CPUs.
> >
> > So instead of relying on the interrupt-affinity property, we can
> > use the actual percpu affinity that DT exposes as part of the
> > interrupt specifier. The DT binding is also updated to reflect
> > the fact that the interrupt-affinity property shouldn't be used
> > in that case.
> >
> > Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> > ---
> > * From v1:
> > - propagate the error if irq_get_percpu_devid_partition fails
> >
> > Documentation/devicetree/bindings/arm/pmu.txt | 4 +++-
>
> I acked v1, please add acks.
This is queued in arm64/for-next/core, but I spotted your Ack and added
it when I sent the patch to Catalin.
Will
WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will.deacon@arm.com>
To: Rob Herring <robh@kernel.org>
Cc: Marc Zyngier <marc.zyngier@arm.com>,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-rockchip@lists.infradead.org,
Heiko Stuebner <heiko@sntech.de>,
cf@rock-chips.com, huangtao@rock-chips.com,
jay.xu@rock-chips.com, Caesar Wang <wxt@rock-chips.com>,
David Wu <david.wu@rock-chips.com>,
Brian Norris <briannorris@chromium.org>,
Mark Rutland <mark.rutland@arm.com>
Subject: Re: [PATCH v2] drivers/perf: arm-pmu: Handle per-interrupt affinity mask
Date: Mon, 11 Jul 2016 15:47:06 +0100 [thread overview]
Message-ID: <20160711144706.GA27013@arm.com> (raw)
In-Reply-To: <20160711143716.GA9267@rob-hp-laptop>
On Mon, Jul 11, 2016 at 09:37:16AM -0500, Rob Herring wrote:
> On Wed, Jul 06, 2016 at 03:33:47PM +0100, Marc Zyngier wrote:
> > On a big-little system, PMUs can be wired to CPUs using per CPU
> > interrups (PPI). In this case, it is important to make sure that
> > the enable/disable do happen on the right set of CPUs.
> >
> > So instead of relying on the interrupt-affinity property, we can
> > use the actual percpu affinity that DT exposes as part of the
> > interrupt specifier. The DT binding is also updated to reflect
> > the fact that the interrupt-affinity property shouldn't be used
> > in that case.
> >
> > Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> > ---
> > * From v1:
> > - propagate the error if irq_get_percpu_devid_partition fails
> >
> > Documentation/devicetree/bindings/arm/pmu.txt | 4 +++-
>
> I acked v1, please add acks.
This is queued in arm64/for-next/core, but I spotted your Ack and added
it when I sent the patch to Catalin.
Will
next prev parent reply other threads:[~2016-07-11 14:47 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-06 14:33 [PATCH v2] drivers/perf: arm-pmu: Handle per-interrupt affinity mask Marc Zyngier
2016-07-06 14:33 ` Marc Zyngier
2016-07-06 14:33 ` Marc Zyngier
2016-07-06 16:05 ` Will Deacon
2016-07-06 16:05 ` Will Deacon
2016-07-11 14:37 ` Rob Herring
2016-07-11 14:37 ` Rob Herring
2016-07-11 14:47 ` Will Deacon [this message]
2016-07-11 14:47 ` Will Deacon
2016-07-11 14:47 ` Will Deacon
[not found] ` <1467815627-4061-1-git-send-email-marc.zyngier-5wv7dgnIgG8@public.gmane.org>
2016-07-19 13:25 ` Geert Uytterhoeven
2016-07-19 13:25 ` Geert Uytterhoeven
2016-07-19 13:25 ` Geert Uytterhoeven
2016-07-19 13:46 ` Marc Zyngier
2016-07-19 13:46 ` Marc Zyngier
2016-07-19 14:24 ` Geert Uytterhoeven
2016-07-19 14:24 ` Geert Uytterhoeven
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