* ATPX changes in drm-next-4.8 and D3cold handling
@ 2016-07-21 10:42 Peter Wu
2016-07-28 15:33 ` Deucher, Alexander
0 siblings, 1 reply; 6+ messages in thread
From: Peter Wu @ 2016-07-21 10:42 UTC (permalink / raw)
To: Alex Deucher
Cc: dri-devel, Christoph Haag, Christian König, amd-gfx,
Hawking Zhang
Hi Alex,
There are a couple of changes for 4.8 that try to detect whether the
"power_cntl" flag is present. Originally attributed to a firmware bug,
it seems that the detection is performed too late resulting in flags
that are always zero
(https://bugzilla.kernel.org/show_bug.cgi?id=115321). What PX platform
are these patches tested with, did they have the same issue?
In case you missed it, Dave's D3cold patches were succeeded by changes
in PCI core. Relevant commits in the pci/pm branch:
006d44e PCI: Add runtime PM support for PCIe ports
16468c7 ACPI / hotplug / PCI: Runtime resume bridge before rescan
d963f65 PCI: Power on bridges before scanning new devices
9d26d3a PCI: Put PCIe ports into D3 during suspend
43f7f88 PCI: Don't clear d3cold_allowed for PCIe ports
With these changes, the nouveau driver had to disable use of the _DSM
ACPI method (comparable to ATPX), otherwise both interfaces are used
which could cause issues like being unable to resume the device.
Also note that pcieport currently only handles D3cold for devices with a
BIOS date in 2015 (or newer), you need to detect this with an approach
like http://www.spinics.net/lists/linux-pci/msg52602.html
We also found that the Nvidia HDMI audio device (function 1) would
prevent the pcieport from sleeping. For modern Nvidia hardware this is
apparently not an issue because these somehow hide the audio device, but
it might be an issue for AMD hardware. See also
https://lists.freedesktop.org/archives/dri-devel/2016-July/112759.html
--
Kind regards,
Peter Wu
https://lekensteyn.nl
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 6+ messages in thread
* RE: ATPX changes in drm-next-4.8 and D3cold handling
2016-07-21 10:42 ATPX changes in drm-next-4.8 and D3cold handling Peter Wu
@ 2016-07-28 15:33 ` Deucher, Alexander
2016-07-28 15:40 ` Lukas Wunner
0 siblings, 1 reply; 6+ messages in thread
From: Deucher, Alexander @ 2016-07-28 15:33 UTC (permalink / raw)
To: 'Peter Wu'
Cc: dri-devel@lists.freedesktop.org, Christoph Haag,
Koenig, Christian, amd-gfx@lists.freedesktop.org, Zhang, Hawking
> -----Original Message-----
> From: Peter Wu [mailto:peter@lekensteyn.nl]
> Sent: Thursday, July 21, 2016 6:43 AM
> To: Deucher, Alexander
> Cc: amd-gfx@lists.freedesktop.org; Zhang, Hawking; Koenig, Christian; dri-
> devel@lists.freedesktop.org; Christoph Haag
> Subject: ATPX changes in drm-next-4.8 and D3cold handling
>
> Hi Alex,
>
> There are a couple of changes for 4.8 that try to detect whether the
> "power_cntl" flag is present. Originally attributed to a firmware bug,
> it seems that the detection is performed too late resulting in flags
> that are always zero
> (https://bugzilla.kernel.org/show_bug.cgi?id=115321). What PX platform
> are these patches tested with, did they have the same issue?
>
>
> In case you missed it, Dave's D3cold patches were succeeded by changes
> in PCI core. Relevant commits in the pci/pm branch:
>
> 006d44e PCI: Add runtime PM support for PCIe ports
> 16468c7 ACPI / hotplug / PCI: Runtime resume bridge before rescan
> d963f65 PCI: Power on bridges before scanning new devices
> 9d26d3a PCI: Put PCIe ports into D3 during suspend
> 43f7f88 PCI: Don't clear d3cold_allowed for PCIe ports
Did those get merged yet?
>
> With these changes, the nouveau driver had to disable use of the _DSM
> ACPI method (comparable to ATPX), otherwise both interfaces are used
> which could cause issues like being unable to resume the device.
> Also note that pcieport currently only handles D3cold for devices with a
> BIOS date in 2015 (or newer), you need to detect this with an approach
> like http://www.spinics.net/lists/linux-pci/msg52602.html
>
My latest PX patches should handle this correctly. We have flags in the ATPX interface to know what sort of system we are. See:
https://cgit.freedesktop.org/~agd5f/linux/commit/?h=drm-next-4.8&id=b8c9fd5ad4b478ec1a5482177833e1a7082e48bd
https://cgit.freedesktop.org/~agd5f/linux/commit/?h=drm-next-4.8&id=31764c1e3b2bd6e9c8eaea1318a215afb6a8bad9
https://cgit.freedesktop.org/~agd5f/linux/commit/?h=drm-next-4.8&id=8491999285a3e5a5395ac87098bb1f26c465b62b
I just need to revert this commit once the d3cold patches land:
https://cgit.freedesktop.org/~agd5f/linux/commit/?h=drm-next-4.8&id=bdfb76040068d960cb9e226876be8a508d741c4a
> We also found that the Nvidia HDMI audio device (function 1) would
> prevent the pcieport from sleeping. For modern Nvidia hardware this is
> apparently not an issue because these somehow hide the audio device, but
> it might be an issue for AMD hardware. See also
> https://lists.freedesktop.org/archives/dri-devel/2016-July/112759.html
Thanks for the heads up.
Alex
> --
> Kind regards,
> Peter Wu
> https://lekensteyn.nl
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: ATPX changes in drm-next-4.8 and D3cold handling
2016-07-28 15:33 ` Deucher, Alexander
@ 2016-07-28 15:40 ` Lukas Wunner
[not found] ` <20160728154031.GB1929-JFq808J9C/izQB+pC5nmwQ@public.gmane.org>
0 siblings, 1 reply; 6+ messages in thread
From: Lukas Wunner @ 2016-07-28 15:40 UTC (permalink / raw)
To: Deucher, Alexander
Cc: dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org,
Christoph Haag, 'Peter Wu', Koenig, Christian,
Zhang, Hawking
On Thu, Jul 28, 2016 at 03:33:25PM +0000, Deucher, Alexander wrote:
> > From: Peter Wu [mailto:peter@lekensteyn.nl]
> > Sent: Thursday, July 21, 2016 6:43 AM
> > In case you missed it, Dave's D3cold patches were succeeded by changes
> > in PCI core. Relevant commits in the pci/pm branch:
> >
> > 006d44e PCI: Add runtime PM support for PCIe ports
> > 16468c7 ACPI / hotplug / PCI: Runtime resume bridge before rescan
> > d963f65 PCI: Power on bridges before scanning new devices
> > 9d26d3a PCI: Put PCIe ports into D3 during suspend
> > 43f7f88 PCI: Don't clear d3cold_allowed for PCIe ports
>
> Did those get merged yet?
They will go into 4.8. Should have gone into 4.7 already but were
dropped at the last minute.
> I just need to revert this commit once the d3cold patches land:
> https://cgit.freedesktop.org/~agd5f/linux/commit/?h=drm-next-4.8&id=bdfb76040068d960cb9e226876be8a508d741c4a
So you probably need to revert this now.
Best regards,
Lukas
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: ATPX changes in drm-next-4.8 and D3cold handling
[not found] ` <20160728154031.GB1929-JFq808J9C/izQB+pC5nmwQ@public.gmane.org>
@ 2016-07-29 0:00 ` Peter Wu
2016-07-29 15:45 ` Deucher, Alexander
0 siblings, 1 reply; 6+ messages in thread
From: Peter Wu @ 2016-07-29 0:00 UTC (permalink / raw)
To: Lukas Wunner
Cc: dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
Christoph Haag, Deucher, Alexander, Koenig, Christian,
Zhang, Hawking
On Thu, Jul 28, 2016 at 05:40:31PM +0200, Lukas Wunner wrote:
> On Thu, Jul 28, 2016 at 03:33:25PM +0000, Deucher, Alexander wrote:
> > > From: Peter Wu [mailto:peter@lekensteyn.nl]
> > > Sent: Thursday, July 21, 2016 6:43 AM
> > > In case you missed it, Dave's D3cold patches were succeeded by changes
> > > in PCI core. Relevant commits in the pci/pm branch:
> > >
> > > 006d44e PCI: Add runtime PM support for PCIe ports
> > > 16468c7 ACPI / hotplug / PCI: Runtime resume bridge before rescan
> > > d963f65 PCI: Power on bridges before scanning new devices
> > > 9d26d3a PCI: Put PCIe ports into D3 during suspend
> > > 43f7f88 PCI: Don't clear d3cold_allowed for PCIe ports
> >
> > Did those get merged yet?
>
> They will go into 4.8. Should have gone into 4.7 already but were
> dropped at the last minute.
>
>
> > I just need to revert this commit once the d3cold patches land:
> > https://cgit.freedesktop.org/~agd5f/linux/commit/?h=drm-next-4.8&id=bdfb76040068d960cb9e226876be8a508d741c4a
>
> So you probably need to revert this now.
>
> Best regards,
> Lukas
It is better to revert it before the PCI/PM patches get merged,
otherwise you risk that the device is already put in D3 before the
bridge tries to do it again. This is currently happening with nouveau on
-next.
Do these AMD hw exist on BIOSes pre-2015? Currently the D3cold work in
the PCI/PM branch only enable the D3cold handling via the bridge when
the BIOS is >= 2015.
--
Kind regards,
Peter Wu
https://lekensteyn.nl
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* RE: ATPX changes in drm-next-4.8 and D3cold handling
2016-07-29 0:00 ` Peter Wu
@ 2016-07-29 15:45 ` Deucher, Alexander
[not found] ` <CY4PR12MB1301098477AC9AA5C211DC86F7010-rpdhrqHFk05CiBuckNFh9wdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
0 siblings, 1 reply; 6+ messages in thread
From: Deucher, Alexander @ 2016-07-29 15:45 UTC (permalink / raw)
To: 'Peter Wu', Lukas Wunner
Cc: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
Zhang, Hawking, Christoph Haag,
dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
Koenig, Christian
> -----Original Message-----
> From: Peter Wu [mailto:peter@lekensteyn.nl]
> Sent: Thursday, July 28, 2016 8:00 PM
> To: Lukas Wunner
> Cc: Deucher, Alexander; dri-devel@lists.freedesktop.org; Christoph Haag;
> Koenig, Christian; amd-gfx@lists.freedesktop.org; Zhang, Hawking
> Subject: Re: ATPX changes in drm-next-4.8 and D3cold handling
>
> On Thu, Jul 28, 2016 at 05:40:31PM +0200, Lukas Wunner wrote:
> > On Thu, Jul 28, 2016 at 03:33:25PM +0000, Deucher, Alexander wrote:
> > > > From: Peter Wu [mailto:peter@lekensteyn.nl]
> > > > Sent: Thursday, July 21, 2016 6:43 AM
> > > > In case you missed it, Dave's D3cold patches were succeeded by
> changes
> > > > in PCI core. Relevant commits in the pci/pm branch:
> > > >
> > > > 006d44e PCI: Add runtime PM support for PCIe ports
> > > > 16468c7 ACPI / hotplug / PCI: Runtime resume bridge before rescan
> > > > d963f65 PCI: Power on bridges before scanning new devices
> > > > 9d26d3a PCI: Put PCIe ports into D3 during suspend
> > > > 43f7f88 PCI: Don't clear d3cold_allowed for PCIe ports
> > >
> > > Did those get merged yet?
> >
> > They will go into 4.8. Should have gone into 4.7 already but were
> > dropped at the last minute.
> >
> >
> > > I just need to revert this commit once the d3cold patches land:
> > > https://cgit.freedesktop.org/~agd5f/linux/commit/?h=drm-next-
> 4.8&id=bdfb76040068d960cb9e226876be8a508d741c4a
> >
> > So you probably need to revert this now.
> >
> > Best regards,
> > Lukas
>
> It is better to revert it before the PCI/PM patches get merged,
> otherwise you risk that the device is already put in D3 before the
> bridge tries to do it again. This is currently happening with nouveau on
> -next.
>
> Do these AMD hw exist on BIOSes pre-2015? Currently the D3cold work in
> the PCI/PM branch only enable the D3cold handling via the bridge when
> the BIOS is >= 2015.
Systems designed for windows 10 use d3 cold rather than the legacy interfaces. Setting the ACPI OSI to windows10 will enable d3cold, setting it to a previous version of windows will use the old method. At least on AMD PX systems there is a bit in the ATPX information block that indicates the current setting hybrid graphics (aka d3cold) or the ATPX power control for dGPU power control.
Alex
> --
> Kind regards,
> Peter Wu
> https://lekensteyn.nl
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: ATPX changes in drm-next-4.8 and D3cold handling
[not found] ` <CY4PR12MB1301098477AC9AA5C211DC86F7010-rpdhrqHFk05CiBuckNFh9wdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
@ 2016-07-29 17:03 ` Peter Wu
0 siblings, 0 replies; 6+ messages in thread
From: Peter Wu @ 2016-07-29 17:03 UTC (permalink / raw)
To: Deucher, Alexander
Cc: dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
Lukas Wunner, Christoph Haag, Koenig, Christian, Zhang, Hawking
On Fri, Jul 29, 2016 at 03:45:50PM +0000, Deucher, Alexander wrote:
> > -----Original Message-----
> > From: Peter Wu [mailto:peter@lekensteyn.nl]
> > Sent: Thursday, July 28, 2016 8:00 PM
> > To: Lukas Wunner
> > Cc: Deucher, Alexander; dri-devel@lists.freedesktop.org; Christoph Haag;
> > Koenig, Christian; amd-gfx@lists.freedesktop.org; Zhang, Hawking
> > Subject: Re: ATPX changes in drm-next-4.8 and D3cold handling
> >
> > On Thu, Jul 28, 2016 at 05:40:31PM +0200, Lukas Wunner wrote:
> > > On Thu, Jul 28, 2016 at 03:33:25PM +0000, Deucher, Alexander wrote:
> > > > > From: Peter Wu [mailto:peter@lekensteyn.nl]
> > > > > Sent: Thursday, July 21, 2016 6:43 AM
> > > > > In case you missed it, Dave's D3cold patches were succeeded by
> > changes
> > > > > in PCI core. Relevant commits in the pci/pm branch:
> > > > >
> > > > > 006d44e PCI: Add runtime PM support for PCIe ports
> > > > > 16468c7 ACPI / hotplug / PCI: Runtime resume bridge before rescan
> > > > > d963f65 PCI: Power on bridges before scanning new devices
> > > > > 9d26d3a PCI: Put PCIe ports into D3 during suspend
> > > > > 43f7f88 PCI: Don't clear d3cold_allowed for PCIe ports
> > > >
> > > > Did those get merged yet?
> > >
> > > They will go into 4.8. Should have gone into 4.7 already but were
> > > dropped at the last minute.
> > >
> > >
> > > > I just need to revert this commit once the d3cold patches land:
> > > > https://cgit.freedesktop.org/~agd5f/linux/commit/?h=drm-next-
> > 4.8&id=bdfb76040068d960cb9e226876be8a508d741c4a
> > >
> > > So you probably need to revert this now.
> > >
> > > Best regards,
> > > Lukas
> >
> > It is better to revert it before the PCI/PM patches get merged,
> > otherwise you risk that the device is already put in D3 before the
> > bridge tries to do it again. This is currently happening with nouveau on
> > -next.
> >
> > Do these AMD hw exist on BIOSes pre-2015? Currently the D3cold work in
> > the PCI/PM branch only enable the D3cold handling via the bridge when
> > the BIOS is >= 2015.
>
> Systems designed for windows 10 use d3 cold rather than the legacy
> interfaces. Setting the ACPI OSI to windows10 will enable d3cold,
> setting it to a previous version of windows will use the old method.
> At least on AMD PX systems there is a bit in the ATPX information
> block that indicates the current setting hybrid graphics (aka d3cold)
> or the ATPX power control for dGPU power control.
>
> Alex
Windows 10 is Windows 2015, so BIOS dates for new Windows 10 devices
should be newer or equal to 2015 and no problem should occur. No
worries!
My initial concern was from the blacklist for ore-2015 BIOSes as can be
seen in function pci_bridge_d3_possible in
https://git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git/commit/?h=pci/pm&id=9d26d3a8f1b0c442339a235f9508bdad8af91043
Kind regards,
Peter
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
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-- links below jump to the message on this page --
2016-07-21 10:42 ATPX changes in drm-next-4.8 and D3cold handling Peter Wu
2016-07-28 15:33 ` Deucher, Alexander
2016-07-28 15:40 ` Lukas Wunner
[not found] ` <20160728154031.GB1929-JFq808J9C/izQB+pC5nmwQ@public.gmane.org>
2016-07-29 0:00 ` Peter Wu
2016-07-29 15:45 ` Deucher, Alexander
[not found] ` <CY4PR12MB1301098477AC9AA5C211DC86F7010-rpdhrqHFk05CiBuckNFh9wdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2016-07-29 17:03 ` Peter Wu
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