* [Qemu-devel] [PATCH 0/1] Convert rc4030 to VMState [For 2.8?] @ 2016-07-18 15:18 Dr. David Alan Gilbert (git) 2016-07-18 15:18 ` [Qemu-devel] [PATCH 1/1] vmstateify rc4030 Dr. David Alan Gilbert (git) 0 siblings, 1 reply; 4+ messages in thread From: Dr. David Alan Gilbert (git) @ 2016-07-18 15:18 UTC (permalink / raw) To: qemu-devel, hpoussin, aurelien, leon.alrae From: "Dr. David Alan Gilbert" <dgilbert@redhat.com> Hi, The attached patch converts the rc4030 chip to VMState, however I've not found a way to test it; if anyone could suggest one I'd appreciate it. Dave Dr. David Alan Gilbert (1): vmstateify rc4030 hw/dma/rc4030.c | 81 +++++++++++++++++++-------------------------------------- 1 file changed, 27 insertions(+), 54 deletions(-) -- 2.7.4 ^ permalink raw reply [flat|nested] 4+ messages in thread
* [Qemu-devel] [PATCH 1/1] vmstateify rc4030 2016-07-18 15:18 [Qemu-devel] [PATCH 0/1] Convert rc4030 to VMState [For 2.8?] Dr. David Alan Gilbert (git) @ 2016-07-18 15:18 ` Dr. David Alan Gilbert (git) 2016-07-20 20:36 ` Hervé Poussineau 0 siblings, 1 reply; 4+ messages in thread From: Dr. David Alan Gilbert (git) @ 2016-07-18 15:18 UTC (permalink / raw) To: qemu-devel, hpoussin, aurelien, leon.alrae From: "Dr. David Alan Gilbert" <dgilbert@redhat.com> rc4030 seems to be part of a MIPS chipset; this converts it to VMState. Note: a) It builds but I've not found a way to boot a MIPS Jazz image to test it. b) It was saving 0..<15 on the 16 entry rem_speed array; I've not got a clue what that array is but I'm now saving the whole 16 entries rather than 15. Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> --- hw/dma/rc4030.c | 81 +++++++++++++++++++-------------------------------------- 1 file changed, 27 insertions(+), 54 deletions(-) diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c index 2f2576f..17c8518 100644 --- a/hw/dma/rc4030.c +++ b/hw/dma/rc4030.c @@ -616,34 +616,9 @@ static void rc4030_reset(DeviceState *dev) qemu_irq_lower(s->jazz_bus_irq); } -static int rc4030_load(QEMUFile *f, void *opaque, int version_id) +static int rc4030_post_load(void *opaque, int version_id) { rc4030State* s = opaque; - int i, j; - - if (version_id != 2) - return -EINVAL; - - s->config = qemu_get_be32(f); - s->invalid_address_register = qemu_get_be32(f); - for (i = 0; i < 8; i++) - for (j = 0; j < 4; j++) - s->dma_regs[i][j] = qemu_get_be32(f); - s->dma_tl_base = qemu_get_be32(f); - s->dma_tl_limit = qemu_get_be32(f); - s->cache_maint = qemu_get_be32(f); - s->remote_failed_address = qemu_get_be32(f); - s->memory_failed_address = qemu_get_be32(f); - s->cache_ptag = qemu_get_be32(f); - s->cache_ltag = qemu_get_be32(f); - s->cache_bmask = qemu_get_be32(f); - s->memory_refresh_rate = qemu_get_be32(f); - s->nvram_protect = qemu_get_be32(f); - for (i = 0; i < 15; i++) - s->rem_speed[i] = qemu_get_be32(f); - s->imr_jazz = qemu_get_be32(f); - s->isr_jazz = qemu_get_be32(f); - s->itr = qemu_get_be32(f); set_next_tick(s); update_jazz_irq(s); @@ -651,32 +626,31 @@ static int rc4030_load(QEMUFile *f, void *opaque, int version_id) return 0; } -static void rc4030_save(QEMUFile *f, void *opaque) -{ - rc4030State* s = opaque; - int i, j; - - qemu_put_be32(f, s->config); - qemu_put_be32(f, s->invalid_address_register); - for (i = 0; i < 8; i++) - for (j = 0; j < 4; j++) - qemu_put_be32(f, s->dma_regs[i][j]); - qemu_put_be32(f, s->dma_tl_base); - qemu_put_be32(f, s->dma_tl_limit); - qemu_put_be32(f, s->cache_maint); - qemu_put_be32(f, s->remote_failed_address); - qemu_put_be32(f, s->memory_failed_address); - qemu_put_be32(f, s->cache_ptag); - qemu_put_be32(f, s->cache_ltag); - qemu_put_be32(f, s->cache_bmask); - qemu_put_be32(f, s->memory_refresh_rate); - qemu_put_be32(f, s->nvram_protect); - for (i = 0; i < 15; i++) - qemu_put_be32(f, s->rem_speed[i]); - qemu_put_be32(f, s->imr_jazz); - qemu_put_be32(f, s->isr_jazz); - qemu_put_be32(f, s->itr); -} +static const VMStateDescription vmstate_rc4030 = { + .name = "rc4030", + .version_id = 3, + .post_load = rc4030_post_load, + .fields = (VMStateField []) { + VMSTATE_UINT32(config, rc4030State), + VMSTATE_UINT32(invalid_address_register, rc4030State), + VMSTATE_UINT32_2DARRAY(dma_regs, rc4030State, 8, 4), + VMSTATE_UINT32(dma_tl_base, rc4030State), + VMSTATE_UINT32(dma_tl_limit, rc4030State), + VMSTATE_UINT32(cache_maint, rc4030State), + VMSTATE_UINT32(remote_failed_address, rc4030State), + VMSTATE_UINT32(memory_failed_address, rc4030State), + VMSTATE_UINT32(cache_ptag, rc4030State), + VMSTATE_UINT32(cache_ltag, rc4030State), + VMSTATE_UINT32(cache_bmask, rc4030State), + VMSTATE_UINT32(memory_refresh_rate, rc4030State), + VMSTATE_UINT32(nvram_protect, rc4030State), + VMSTATE_UINT32_ARRAY(rem_speed, rc4030State, 16), + VMSTATE_UINT32(imr_jazz, rc4030State), + VMSTATE_UINT32(isr_jazz, rc4030State), + VMSTATE_UINT32(itr, rc4030State), + VMSTATE_END_OF_LIST() + } +}; static void rc4030_do_dma(void *opaque, int n, uint8_t *buf, int len, int is_write) { @@ -753,8 +727,6 @@ static void rc4030_initfn(Object *obj) sysbus_init_irq(sysbus, &s->timer_irq); sysbus_init_irq(sysbus, &s->jazz_bus_irq); - register_savevm(NULL, "rc4030", 0, 2, rc4030_save, rc4030_load, s); - sysbus_init_mmio(sysbus, &s->iomem_chipset); sysbus_init_mmio(sysbus, &s->iomem_jazzio); } @@ -813,6 +785,7 @@ static void rc4030_class_init(ObjectClass *klass, void *class_data) dc->realize = rc4030_realize; dc->unrealize = rc4030_unrealize; dc->reset = rc4030_reset; + dc->vmsd = &vmstate_rc4030; } static const TypeInfo rc4030_info = { -- 2.7.4 ^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [Qemu-devel] [PATCH 1/1] vmstateify rc4030 2016-07-18 15:18 ` [Qemu-devel] [PATCH 1/1] vmstateify rc4030 Dr. David Alan Gilbert (git) @ 2016-07-20 20:36 ` Hervé Poussineau 2016-07-21 17:33 ` Dr. David Alan Gilbert 0 siblings, 1 reply; 4+ messages in thread From: Hervé Poussineau @ 2016-07-20 20:36 UTC (permalink / raw) To: Dr. David Alan Gilbert (git), qemu-devel, aurelien, leon.alrae Hi, Le 18/07/2016 à 17:18, Dr. David Alan Gilbert (git) a écrit : > From: "Dr. David Alan Gilbert" <dgilbert@redhat.com> > > rc4030 seems to be part of a MIPS chipset; this converts it to > VMState. > > Note: > a) It builds but I've not found a way to boot a MIPS Jazz image to > test it. > b) It was saving 0..<15 on the 16 entry rem_speed array; I've not > got a clue what that array is but I'm now saving the whole 16 entries > rather than 15. > > Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> rc4030 is the main chipset of MIPS Jazz machines (like Magnum or PICA 61). It is both a interrupt controller, a DMA controller and a memory controller. - savevm on magnum doesn't work (before and after your patch) and crashes QEMU when saving(?) g364 framebuffer state. - savevm + loadvm on pica61 works. The rem_speed[15] (whatever rem_speed means) is the interrupt mask register, that is currently stored in imr_jazz field. Reviewed-by: Hervé Poussineau <hpoussin@reactos.org> Tested-by: Hervé Poussineau <hpoussin@reactos.org> Hervé > --- > hw/dma/rc4030.c | 81 +++++++++++++++++++-------------------------------------- > 1 file changed, 27 insertions(+), 54 deletions(-) > > diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c > index 2f2576f..17c8518 100644 > --- a/hw/dma/rc4030.c > +++ b/hw/dma/rc4030.c > @@ -616,34 +616,9 @@ static void rc4030_reset(DeviceState *dev) > qemu_irq_lower(s->jazz_bus_irq); > } > > -static int rc4030_load(QEMUFile *f, void *opaque, int version_id) > +static int rc4030_post_load(void *opaque, int version_id) > { > rc4030State* s = opaque; > - int i, j; > - > - if (version_id != 2) > - return -EINVAL; > - > - s->config = qemu_get_be32(f); > - s->invalid_address_register = qemu_get_be32(f); > - for (i = 0; i < 8; i++) > - for (j = 0; j < 4; j++) > - s->dma_regs[i][j] = qemu_get_be32(f); > - s->dma_tl_base = qemu_get_be32(f); > - s->dma_tl_limit = qemu_get_be32(f); > - s->cache_maint = qemu_get_be32(f); > - s->remote_failed_address = qemu_get_be32(f); > - s->memory_failed_address = qemu_get_be32(f); > - s->cache_ptag = qemu_get_be32(f); > - s->cache_ltag = qemu_get_be32(f); > - s->cache_bmask = qemu_get_be32(f); > - s->memory_refresh_rate = qemu_get_be32(f); > - s->nvram_protect = qemu_get_be32(f); > - for (i = 0; i < 15; i++) > - s->rem_speed[i] = qemu_get_be32(f); > - s->imr_jazz = qemu_get_be32(f); > - s->isr_jazz = qemu_get_be32(f); > - s->itr = qemu_get_be32(f); > > set_next_tick(s); > update_jazz_irq(s); > @@ -651,32 +626,31 @@ static int rc4030_load(QEMUFile *f, void *opaque, int version_id) > return 0; > } > > -static void rc4030_save(QEMUFile *f, void *opaque) > -{ > - rc4030State* s = opaque; > - int i, j; > - > - qemu_put_be32(f, s->config); > - qemu_put_be32(f, s->invalid_address_register); > - for (i = 0; i < 8; i++) > - for (j = 0; j < 4; j++) > - qemu_put_be32(f, s->dma_regs[i][j]); > - qemu_put_be32(f, s->dma_tl_base); > - qemu_put_be32(f, s->dma_tl_limit); > - qemu_put_be32(f, s->cache_maint); > - qemu_put_be32(f, s->remote_failed_address); > - qemu_put_be32(f, s->memory_failed_address); > - qemu_put_be32(f, s->cache_ptag); > - qemu_put_be32(f, s->cache_ltag); > - qemu_put_be32(f, s->cache_bmask); > - qemu_put_be32(f, s->memory_refresh_rate); > - qemu_put_be32(f, s->nvram_protect); > - for (i = 0; i < 15; i++) > - qemu_put_be32(f, s->rem_speed[i]); > - qemu_put_be32(f, s->imr_jazz); > - qemu_put_be32(f, s->isr_jazz); > - qemu_put_be32(f, s->itr); > -} > +static const VMStateDescription vmstate_rc4030 = { > + .name = "rc4030", > + .version_id = 3, > + .post_load = rc4030_post_load, > + .fields = (VMStateField []) { > + VMSTATE_UINT32(config, rc4030State), > + VMSTATE_UINT32(invalid_address_register, rc4030State), > + VMSTATE_UINT32_2DARRAY(dma_regs, rc4030State, 8, 4), > + VMSTATE_UINT32(dma_tl_base, rc4030State), > + VMSTATE_UINT32(dma_tl_limit, rc4030State), > + VMSTATE_UINT32(cache_maint, rc4030State), > + VMSTATE_UINT32(remote_failed_address, rc4030State), > + VMSTATE_UINT32(memory_failed_address, rc4030State), > + VMSTATE_UINT32(cache_ptag, rc4030State), > + VMSTATE_UINT32(cache_ltag, rc4030State), > + VMSTATE_UINT32(cache_bmask, rc4030State), > + VMSTATE_UINT32(memory_refresh_rate, rc4030State), > + VMSTATE_UINT32(nvram_protect, rc4030State), > + VMSTATE_UINT32_ARRAY(rem_speed, rc4030State, 16), > + VMSTATE_UINT32(imr_jazz, rc4030State), > + VMSTATE_UINT32(isr_jazz, rc4030State), > + VMSTATE_UINT32(itr, rc4030State), > + VMSTATE_END_OF_LIST() > + } > +}; > > static void rc4030_do_dma(void *opaque, int n, uint8_t *buf, int len, int is_write) > { > @@ -753,8 +727,6 @@ static void rc4030_initfn(Object *obj) > sysbus_init_irq(sysbus, &s->timer_irq); > sysbus_init_irq(sysbus, &s->jazz_bus_irq); > > - register_savevm(NULL, "rc4030", 0, 2, rc4030_save, rc4030_load, s); > - > sysbus_init_mmio(sysbus, &s->iomem_chipset); > sysbus_init_mmio(sysbus, &s->iomem_jazzio); > } > @@ -813,6 +785,7 @@ static void rc4030_class_init(ObjectClass *klass, void *class_data) > dc->realize = rc4030_realize; > dc->unrealize = rc4030_unrealize; > dc->reset = rc4030_reset; > + dc->vmsd = &vmstate_rc4030; > } > > static const TypeInfo rc4030_info = { > ^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [Qemu-devel] [PATCH 1/1] vmstateify rc4030 2016-07-20 20:36 ` Hervé Poussineau @ 2016-07-21 17:33 ` Dr. David Alan Gilbert 0 siblings, 0 replies; 4+ messages in thread From: Dr. David Alan Gilbert @ 2016-07-21 17:33 UTC (permalink / raw) To: Hervé Poussineau; +Cc: qemu-devel, aurelien, leon.alrae * Hervé Poussineau (hpoussin@reactos.org) wrote: > Hi, > > Le 18/07/2016 à 17:18, Dr. David Alan Gilbert (git) a écrit : > > From: "Dr. David Alan Gilbert" <dgilbert@redhat.com> > > > > rc4030 seems to be part of a MIPS chipset; this converts it to > > VMState. > > > > Note: > > a) It builds but I've not found a way to boot a MIPS Jazz image to > > test it. > > b) It was saving 0..<15 on the 16 entry rem_speed array; I've not > > got a clue what that array is but I'm now saving the whole 16 entries > > rather than 15. > > > > Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> > > rc4030 is the main chipset of MIPS Jazz machines (like Magnum or PICA 61). It is both a interrupt controller, a DMA controller and a memory controller. > - savevm on magnum doesn't work (before and after your patch) and crashes QEMU when saving(?) g364 framebuffer state. Fun - your vmstate_g364fb looks OK, assuming vram_size is sane. > - savevm + loadvm on pica61 works. Great. > The rem_speed[15] (whatever rem_speed means) is the interrupt mask register, that is currently stored in imr_jazz field. Except Aurelien's patch 9ea0b7a139 made rem_speed[15] exist, where it used to be just 0..14? > Reviewed-by: Hervé Poussineau <hpoussin@reactos.org> > Tested-by: Hervé Poussineau <hpoussin@reactos.org> Thanks! Dave > > Hervé > > > --- > > hw/dma/rc4030.c | 81 +++++++++++++++++++-------------------------------------- > > 1 file changed, 27 insertions(+), 54 deletions(-) > > > > diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c > > index 2f2576f..17c8518 100644 > > --- a/hw/dma/rc4030.c > > +++ b/hw/dma/rc4030.c > > @@ -616,34 +616,9 @@ static void rc4030_reset(DeviceState *dev) > > qemu_irq_lower(s->jazz_bus_irq); > > } > > > > -static int rc4030_load(QEMUFile *f, void *opaque, int version_id) > > +static int rc4030_post_load(void *opaque, int version_id) > > { > > rc4030State* s = opaque; > > - int i, j; > > - > > - if (version_id != 2) > > - return -EINVAL; > > - > > - s->config = qemu_get_be32(f); > > - s->invalid_address_register = qemu_get_be32(f); > > - for (i = 0; i < 8; i++) > > - for (j = 0; j < 4; j++) > > - s->dma_regs[i][j] = qemu_get_be32(f); > > - s->dma_tl_base = qemu_get_be32(f); > > - s->dma_tl_limit = qemu_get_be32(f); > > - s->cache_maint = qemu_get_be32(f); > > - s->remote_failed_address = qemu_get_be32(f); > > - s->memory_failed_address = qemu_get_be32(f); > > - s->cache_ptag = qemu_get_be32(f); > > - s->cache_ltag = qemu_get_be32(f); > > - s->cache_bmask = qemu_get_be32(f); > > - s->memory_refresh_rate = qemu_get_be32(f); > > - s->nvram_protect = qemu_get_be32(f); > > - for (i = 0; i < 15; i++) > > - s->rem_speed[i] = qemu_get_be32(f); > > - s->imr_jazz = qemu_get_be32(f); > > - s->isr_jazz = qemu_get_be32(f); > > - s->itr = qemu_get_be32(f); > > > > set_next_tick(s); > > update_jazz_irq(s); > > @@ -651,32 +626,31 @@ static int rc4030_load(QEMUFile *f, void *opaque, int version_id) > > return 0; > > } > > > > -static void rc4030_save(QEMUFile *f, void *opaque) > > -{ > > - rc4030State* s = opaque; > > - int i, j; > > - > > - qemu_put_be32(f, s->config); > > - qemu_put_be32(f, s->invalid_address_register); > > - for (i = 0; i < 8; i++) > > - for (j = 0; j < 4; j++) > > - qemu_put_be32(f, s->dma_regs[i][j]); > > - qemu_put_be32(f, s->dma_tl_base); > > - qemu_put_be32(f, s->dma_tl_limit); > > - qemu_put_be32(f, s->cache_maint); > > - qemu_put_be32(f, s->remote_failed_address); > > - qemu_put_be32(f, s->memory_failed_address); > > - qemu_put_be32(f, s->cache_ptag); > > - qemu_put_be32(f, s->cache_ltag); > > - qemu_put_be32(f, s->cache_bmask); > > - qemu_put_be32(f, s->memory_refresh_rate); > > - qemu_put_be32(f, s->nvram_protect); > > - for (i = 0; i < 15; i++) > > - qemu_put_be32(f, s->rem_speed[i]); > > - qemu_put_be32(f, s->imr_jazz); > > - qemu_put_be32(f, s->isr_jazz); > > - qemu_put_be32(f, s->itr); > > -} > > +static const VMStateDescription vmstate_rc4030 = { > > + .name = "rc4030", > > + .version_id = 3, > > + .post_load = rc4030_post_load, > > + .fields = (VMStateField []) { > > + VMSTATE_UINT32(config, rc4030State), > > + VMSTATE_UINT32(invalid_address_register, rc4030State), > > + VMSTATE_UINT32_2DARRAY(dma_regs, rc4030State, 8, 4), > > + VMSTATE_UINT32(dma_tl_base, rc4030State), > > + VMSTATE_UINT32(dma_tl_limit, rc4030State), > > + VMSTATE_UINT32(cache_maint, rc4030State), > > + VMSTATE_UINT32(remote_failed_address, rc4030State), > > + VMSTATE_UINT32(memory_failed_address, rc4030State), > > + VMSTATE_UINT32(cache_ptag, rc4030State), > > + VMSTATE_UINT32(cache_ltag, rc4030State), > > + VMSTATE_UINT32(cache_bmask, rc4030State), > > + VMSTATE_UINT32(memory_refresh_rate, rc4030State), > > + VMSTATE_UINT32(nvram_protect, rc4030State), > > + VMSTATE_UINT32_ARRAY(rem_speed, rc4030State, 16), > > + VMSTATE_UINT32(imr_jazz, rc4030State), > > + VMSTATE_UINT32(isr_jazz, rc4030State), > > + VMSTATE_UINT32(itr, rc4030State), > > + VMSTATE_END_OF_LIST() > > + } > > +}; > > > > static void rc4030_do_dma(void *opaque, int n, uint8_t *buf, int len, int is_write) > > { > > @@ -753,8 +727,6 @@ static void rc4030_initfn(Object *obj) > > sysbus_init_irq(sysbus, &s->timer_irq); > > sysbus_init_irq(sysbus, &s->jazz_bus_irq); > > > > - register_savevm(NULL, "rc4030", 0, 2, rc4030_save, rc4030_load, s); > > - > > sysbus_init_mmio(sysbus, &s->iomem_chipset); > > sysbus_init_mmio(sysbus, &s->iomem_jazzio); > > } > > @@ -813,6 +785,7 @@ static void rc4030_class_init(ObjectClass *klass, void *class_data) > > dc->realize = rc4030_realize; > > dc->unrealize = rc4030_unrealize; > > dc->reset = rc4030_reset; > > + dc->vmsd = &vmstate_rc4030; > > } > > > > static const TypeInfo rc4030_info = { > > > -- Dr. David Alan Gilbert / dgilbert@redhat.com / Manchester, UK ^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2016-07-21 17:33 UTC | newest] Thread overview: 4+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2016-07-18 15:18 [Qemu-devel] [PATCH 0/1] Convert rc4030 to VMState [For 2.8?] Dr. David Alan Gilbert (git) 2016-07-18 15:18 ` [Qemu-devel] [PATCH 1/1] vmstateify rc4030 Dr. David Alan Gilbert (git) 2016-07-20 20:36 ` Hervé Poussineau 2016-07-21 17:33 ` Dr. David Alan Gilbert
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