[PATCH 1/2] drm/amdgpu: update gart_pin_size if bo is in GTT

[PATCH 1/2] drm/amdgpu: update gart_pin_size if bo is in GTT

[Flora Cui]

Change-Id: Ia2cb8a8f62d0933b7937991bec4eace560745f97
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 5a6216c..296eb6a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -376,6 +376,7 @@ int amdgpu_bo_create_restricted(struct amdgpu_device *adev,
 		bo->flags &= ~AMDGPU_GEM_CREATE_CPU_GTT_USWC;
 
 	amdgpu_fill_placement_to_bo(bo, placement);
+
 	/* Kernel allocation are uninterruptible */
 	r = ttm_bo_init(&adev->mman.bdev, &bo->tbo, size, type,
 			&bo->placement, page_align, !kernel, NULL,
@@ -726,7 +727,7 @@ int amdgpu_bo_unpin(struct amdgpu_bo *bo)
 		bo->adev->vram_pin_size -= amdgpu_bo_size(bo);
 		if (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)
 			bo->adev->invisible_pin_size -= amdgpu_bo_size(bo);
-	} else {
+	} else if (bo->tbo.mem.mem_type == TTM_PL_TT) {
 		bo->adev->gart_pin_size -= amdgpu_bo_size(bo);
 	}
 
-- 
2.7.4

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[PATCH 2/2] drm/amdgpu: calc addr with domain's gpu_offset

[Flora Cui]

Change-Id: I8112e9d85866104559ecef7449f50fbb94167382
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index a549abd..3d7a3ab 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -1151,7 +1151,7 @@ int amdgpu_vm_bo_update(struct amdgpu_device *adev,
 			break;
 
 		case TTM_PL_VRAM:
-			addr += adev->vm_manager.vram_base_offset;
+			addr += bo_va->bo->tbo.bdev->man[mem->mem_type].gpu_offset;
 			break;
 
 		default:
-- 
2.7.4

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答复: [PATCH 2/2] drm/amdgpu: calc addr with domain's gpu_offset

[Qu, Jim]

Hi Flora:

What is the purpose of these patches?

Thanks
JimQu

________________________________________
发件人: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> 代表 Flora Cui <Flora.Cui@amd.com>
发送时间: 2016年9月9日 14:30:51
收件人: amd-gfx@lists.freedesktop.org
抄送: Cui, Flora
主题: [PATCH 2/2] drm/amdgpu: calc addr with domain's gpu_offset

Change-Id: I8112e9d85866104559ecef7449f50fbb94167382
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index a549abd..3d7a3ab 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -1151,7 +1151,7 @@ int amdgpu_vm_bo_update(struct amdgpu_device *adev,
                        break;

                case TTM_PL_VRAM:
-                       addr += adev->vm_manager.vram_base_offset;
+                       addr += bo_va->bo->tbo.bdev->man[mem->mem_type].gpu_offset;
                        break;

                default:
--
2.7.4

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Re: [PATCH 1/2] drm/amdgpu: update gart_pin_size if bo is in GTT

[Christian König]

Am 09.09.2016 um 08:30 schrieb Flora Cui:
> Change-Id: Ia2cb8a8f62d0933b7937991bec4eace560745f97
> Signed-off-by: Flora Cui <Flora.Cui@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> index 5a6216c..296eb6a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> @@ -376,6 +376,7 @@ int amdgpu_bo_create_restricted(struct amdgpu_device *adev,
>   		bo->flags &= ~AMDGPU_GEM_CREATE_CPU_GTT_USWC;
>   
>   	amdgpu_fill_placement_to_bo(bo, placement);
> +

Unrelated white space change, please remove.

With that fixed the patch is Reviewed-by: Christian König 
<christian.koenig@amd.com>.

Regards,
Christian.

>   	/* Kernel allocation are uninterruptible */
>   	r = ttm_bo_init(&adev->mman.bdev, &bo->tbo, size, type,
>   			&bo->placement, page_align, !kernel, NULL,
> @@ -726,7 +727,7 @@ int amdgpu_bo_unpin(struct amdgpu_bo *bo)
>   		bo->adev->vram_pin_size -= amdgpu_bo_size(bo);
>   		if (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)
>   			bo->adev->invisible_pin_size -= amdgpu_bo_size(bo);
> -	} else {
> +	} else if (bo->tbo.mem.mem_type == TTM_PL_TT) {
>   		bo->adev->gart_pin_size -= amdgpu_bo_size(bo);
>   	}
>   


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Re: [PATCH 2/2] drm/amdgpu: calc addr with domain's gpu_offset

[Christian König]

NAK, that is clearly incorrect. The gpu_offset are MC addresses while 
the vram_base_offset is a bud address.

Most of the time they are both zero, except for APUs which would break 
with this change.

Regards,
Christian.

Am 09.09.2016 um 08:30 schrieb Flora Cui:
> Change-Id: I8112e9d85866104559ecef7449f50fbb94167382
> Signed-off-by: Flora Cui <Flora.Cui@amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> index a549abd..3d7a3ab 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@ -1151,7 +1151,7 @@ int amdgpu_vm_bo_update(struct amdgpu_device *adev,
>   			break;
>   
>   		case TTM_PL_VRAM:
> -			addr += adev->vm_manager.vram_base_offset;
> +			addr += bo_va->bo->tbo.bdev->man[mem->mem_type].gpu_offset;
>   			break;
>   
>   		default:


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Re: [PATCH 2/2] drm/amdgpu: calc addr with domain's gpu_offset

[Flora Cui]

what about commit e6eb9e1cdb740f778fbbacc5f62edd0ce97c2d52?
should the start addr get updated either?

On Fri, Sep 09, 2016 at 09:18:47AM +0200, Christian König wrote:
> NAK, that is clearly incorrect. The gpu_offset are MC addresses while the
> vram_base_offset is a bud address.
> 
> Most of the time they are both zero, except for APUs which would break with
> this change.
> 
> Regards,
> Christian.
> 
> Am 09.09.2016 um 08:30 schrieb Flora Cui:
> >Change-Id: I8112e9d85866104559ecef7449f50fbb94167382
> >Signed-off-by: Flora Cui <Flora.Cui@amd.com>
> >---
> >  drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> >diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> >index a549abd..3d7a3ab 100644
> >--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> >+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> >@@ -1151,7 +1151,7 @@ int amdgpu_vm_bo_update(struct amdgpu_device *adev,
> >  			break;
> >  		case TTM_PL_VRAM:
> >-			addr += adev->vm_manager.vram_base_offset;
> >+			addr += bo_va->bo->tbo.bdev->man[mem->mem_type].gpu_offset;
> >  			break;
> >  		default:
> 
> 
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Re: [PATCH 2/2] drm/amdgpu: calc addr with domain's gpu_offset

[Christian König]

No that patch is correct. See we are dealing with different address 
spaces here.

The TTM code works with MC addresses. E.g. the internal address space as 
seen by everything which runs on system VM (copy operations, ring 
buffers, UVD, VCE etc...).

The MC in turn then works with bus addresses which it either send to the 
PCIE bus or to the VRAM. Those are just a completely different address 
space.

Regards,
Christian.

Am 09.09.2016 um 09:54 schrieb Flora Cui:
> what about commit e6eb9e1cdb740f778fbbacc5f62edd0ce97c2d52?
> should the start addr get updated either?
>
> On Fri, Sep 09, 2016 at 09:18:47AM +0200, Christian König wrote:
>> NAK, that is clearly incorrect. The gpu_offset are MC addresses while the
>> vram_base_offset is a bud address.
>>
>> Most of the time they are both zero, except for APUs which would break with
>> this change.
>>
>> Regards,
>> Christian.
>>
>> Am 09.09.2016 um 08:30 schrieb Flora Cui:
>>> Change-Id: I8112e9d85866104559ecef7449f50fbb94167382
>>> Signed-off-by: Flora Cui <Flora.Cui@amd.com>
>>> ---
>>>   drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 2 +-
>>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
>>> index a549abd..3d7a3ab 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
>>> @@ -1151,7 +1151,7 @@ int amdgpu_vm_bo_update(struct amdgpu_device *adev,
>>>   			break;
>>>   		case TTM_PL_VRAM:
>>> -			addr += adev->vm_manager.vram_base_offset;
>>> +			addr += bo_va->bo->tbo.bdev->man[mem->mem_type].gpu_offset;
>>>   			break;
>>>   		default:
>>
>> _______________________________________________
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