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From: Christoph Hellwig <hch@infradead.org>
To: Kishon Vijay Abraham I <kishon@ti.com>
Cc: devicetree@vger.kernel.org, Joao.Pinto@synopsys.com,
	Dave Jiang <dave.jiang@intel.com>, Arnd Bergmann <arnd@arndb.de>,
	linux-doc@vger.kernel.org, Joao Pinto <jpinto@synopsys.com>,
	Jingoo Han <jingoohan1@gmail.com>, Jon Mason <jdmason@kudzu.us>,
	Pratyush Anand <pratyush.anand@gmail.com>,
	nsekhar@ti.com, linux-kernel@vger.kernel.org,
	Rob Herring <robh+dt@kernel.org>,
	hch@infradead.org, m-karicheri2@ti.com,
	linux-arm-kernel@lists.infradead.org,
	Allen Hubbe <Allen.Hubbe@emc.com>,
	linux-pci@vger.kernel.org, Bjorn Helgaas <bhelgaas@google.com>,
	linux-ntb@googlegroups.com, linux-omap@vger.kernel.org,
	mingkai.hu@nxp.com
Subject: Re: [RFC PATCH 00/11] pci: support for configurable PCI endpoint
Date: Wed, 12 Oct 2016 05:21:44 -0700	[thread overview]
Message-ID: <20161012122144.GA2009@infradead.org> (raw)
In-Reply-To: <57E8BB69.4020804@ti.com>

On Mon, Sep 26, 2016 at 11:38:41AM +0530, Kishon Vijay Abraham I wrote:
> > Ok, so in theory there can be other hardware (and quite likely is)
> > that supports multiple functions, and we can extend the framework
> > to support them without major obstacles, but your hardware doesn't,
> > so you kept it simple with one hardcoded function, right?
> 
> right, PCIe can have upto 8 functions. So the issues with the current framework
> has to be fixed. I don't expect major obstacles with this as of now.

I wouldn't be too worried about.  We have two kinds of functions in
PCIe: physical functions, or virtual functions using SR-IOV.

For the first one we pretty much just need the controller driver to
report them separately as there is almost no interaction between
functions.

SR-IOV support will be more interesting as the physical functions
controls creation of the associated virtual functions.  I'd like to
defer that problem until we get hold of a software programmable
controller that supports SR-IOV and has open documentation.  (That
beeing said, if someone has a pointer to such a beast send it my way!)

> > We should still find out whether it's important that you can have
> > a single PCI function with a software multi-function support of some
> > sort. We'd still be limited to six BARs in total, and would also need
> > something to identify those sub-functions, so implementing that might
> > get quite hairy.
> > 
> > Possibly this could be done at a higher level, e.g. by implementing
> > a PCI-virtio multiplexer that can host multiple virtio based devices
> > inside of a single PCI function. If we think that would be a good idea,
> > we should make sure the configfs interface is extensible enough to
> > handle that.
> 
> Okay. So here the main function (actual PCI function) *can* perform the work of
> virtio muliplexer if the platform wants to support sub-functions or it can be a
> normal PCI function. right?

I really don't think we should be worried about this multiplexer.  It's
not something real PCIe devices do (sane ones anyway, the rest is
handled by ad-hoc multiplexers), and we should avoid creating our own
magic periphals for it.

> > One use case I have in mind for this is to have a PCI function that
> > can use virtio to provide rootfs (virtio-blk or 9pfs), network
> > and console to the system that implements the PCI function (note
> > that this is the opposite direction of what almost everyone else
> > uses PCI devices for).
> 
> Do you mean the virtio should actually be in the host side? Even here the
> system that implements PCI function should have multiple functions right? (one
> for network, other for console etc..). So there should be a virtio multiplexer
> both in the host side and in the device side?

We already support virtio over phsysical PCIe buses to support intel MIC
devices.  Take a look at drivers/misc/mic/bus/vop_bus.c and
drivers/misc/mic/vop (yes, what a horrible place for that code, not my
fault)

WARNING: multiple messages have this Message-ID (diff)
From: Christoph Hellwig <hch@infradead.org>
To: Kishon Vijay Abraham I <kishon@ti.com>
Cc: devicetree@vger.kernel.org, Joao.Pinto@synopsys.com,
	Dave Jiang <dave.jiang@intel.com>, Arnd Bergmann <arnd@arndb.de>,
	linux-doc@vger.kernel.org, Joao Pinto <jpinto@synopsys.com>,
	Jingoo Han <jingoohan1@gmail.com>, Jon Mason <jdmason@kudzu.us>,
	Pratyush Anand <pratyush.anand@gmail.com>,
	nsekhar@ti.com, linux-kernel@vger.kernel.org,
	Rob Herring <robh+dt@kernel.org>,
	hch@infradead.org, m-karicheri2@ti.com,
	linux-arm-kernel@lists.infradead.org,
	Allen Hubbe <Allen.Hubbe@emc.com>,
	linux-pci@vger.kernel.org, Bjorn Helgaas <bhelgaas@google.com>,
	linux-ntb@googlegroups.com, linux-omap@vger.kernel.org,
	mingkai.hu@nxp.com
Subject: Re: [RFC PATCH 00/11] pci: support for configurable PCI endpoint
Date: Wed, 12 Oct 2016 05:21:44 -0700	[thread overview]
Message-ID: <20161012122144.GA2009@infradead.org> (raw)
In-Reply-To: <57E8BB69.4020804@ti.com>

On Mon, Sep 26, 2016 at 11:38:41AM +0530, Kishon Vijay Abraham I wrote:
> > Ok, so in theory there can be other hardware (and quite likely is)
> > that supports multiple functions, and we can extend the framework
> > to support them without major obstacles, but your hardware doesn't,
> > so you kept it simple with one hardcoded function, right?
> 
> right, PCIe can have upto 8 functions. So the issues with the current framework
> has to be fixed. I don't expect major obstacles with this as of now.

I wouldn't be too worried about.  We have two kinds of functions in
PCIe: physical functions, or virtual functions using SR-IOV.

For the first one we pretty much just need the controller driver to
report them separately as there is almost no interaction between
functions.

SR-IOV support will be more interesting as the physical functions
controls creation of the associated virtual functions.  I'd like to
defer that problem until we get hold of a software programmable
controller that supports SR-IOV and has open documentation.  (That
beeing said, if someone has a pointer to such a beast send it my way!)

> > We should still find out whether it's important that you can have
> > a single PCI function with a software multi-function support of some
> > sort. We'd still be limited to six BARs in total, and would also need
> > something to identify those sub-functions, so implementing that might
> > get quite hairy.
> > 
> > Possibly this could be done at a higher level, e.g. by implementing
> > a PCI-virtio multiplexer that can host multiple virtio based devices
> > inside of a single PCI function. If we think that would be a good idea,
> > we should make sure the configfs interface is extensible enough to
> > handle that.
> 
> Okay. So here the main function (actual PCI function) *can* perform the work of
> virtio muliplexer if the platform wants to support sub-functions or it can be a
> normal PCI function. right?

I really don't think we should be worried about this multiplexer.  It's
not something real PCIe devices do (sane ones anyway, the rest is
handled by ad-hoc multiplexers), and we should avoid creating our own
magic periphals for it.

> > One use case I have in mind for this is to have a PCI function that
> > can use virtio to provide rootfs (virtio-blk or 9pfs), network
> > and console to the system that implements the PCI function (note
> > that this is the opposite direction of what almost everyone else
> > uses PCI devices for).
> 
> Do you mean the virtio should actually be in the host side? Even here the
> system that implements PCI function should have multiple functions right? (one
> for network, other for console etc..). So there should be a virtio multiplexer
> both in the host side and in the device side?

We already support virtio over phsysical PCIe buses to support intel MIC
devices.  Take a look at drivers/misc/mic/bus/vop_bus.c and
drivers/misc/mic/vop (yes, what a horrible place for that code, not my
fault)

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Christoph Hellwig <hch@infradead.org>
To: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Arnd Bergmann <arnd@arndb.de>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Jingoo Han <jingoohan1@gmail.com>,
	hch@infradead.org, Joao.Pinto@synopsys.com, mingkai.hu@nxp.com,
	m-karicheri2@ti.com, Pratyush Anand <pratyush.anand@gmail.com>,
	linux-pci@vger.kernel.org, linux-doc@vger.kernel.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	Joao Pinto <jpinto@synopsys.com>,
	Rob Herring <robh+dt@kernel.org>,
	nsekhar@ti.com, Jon Mason <jdmason@kudzu.us>,
	Dave Jiang <dave.jiang@intel.com>,
	Allen Hubbe <Allen.Hubbe@emc.com>,
	linux-ntb@googlegroups.com
Subject: Re: [RFC PATCH 00/11] pci: support for configurable PCI endpoint
Date: Wed, 12 Oct 2016 05:21:44 -0700	[thread overview]
Message-ID: <20161012122144.GA2009@infradead.org> (raw)
In-Reply-To: <57E8BB69.4020804@ti.com>

On Mon, Sep 26, 2016 at 11:38:41AM +0530, Kishon Vijay Abraham I wrote:
> > Ok, so in theory there can be other hardware (and quite likely is)
> > that supports multiple functions, and we can extend the framework
> > to support them without major obstacles, but your hardware doesn't,
> > so you kept it simple with one hardcoded function, right?
> 
> right, PCIe can have upto 8 functions. So the issues with the current framework
> has to be fixed. I don't expect major obstacles with this as of now.

I wouldn't be too worried about.  We have two kinds of functions in
PCIe: physical functions, or virtual functions using SR-IOV.

For the first one we pretty much just need the controller driver to
report them separately as there is almost no interaction between
functions.

SR-IOV support will be more interesting as the physical functions
controls creation of the associated virtual functions.  I'd like to
defer that problem until we get hold of a software programmable
controller that supports SR-IOV and has open documentation.  (That
beeing said, if someone has a pointer to such a beast send it my way!)

> > We should still find out whether it's important that you can have
> > a single PCI function with a software multi-function support of some
> > sort. We'd still be limited to six BARs in total, and would also need
> > something to identify those sub-functions, so implementing that might
> > get quite hairy.
> > 
> > Possibly this could be done at a higher level, e.g. by implementing
> > a PCI-virtio multiplexer that can host multiple virtio based devices
> > inside of a single PCI function. If we think that would be a good idea,
> > we should make sure the configfs interface is extensible enough to
> > handle that.
> 
> Okay. So here the main function (actual PCI function) *can* perform the work of
> virtio muliplexer if the platform wants to support sub-functions or it can be a
> normal PCI function. right?

I really don't think we should be worried about this multiplexer.  It's
not something real PCIe devices do (sane ones anyway, the rest is
handled by ad-hoc multiplexers), and we should avoid creating our own
magic periphals for it.

> > One use case I have in mind for this is to have a PCI function that
> > can use virtio to provide rootfs (virtio-blk or 9pfs), network
> > and console to the system that implements the PCI function (note
> > that this is the opposite direction of what almost everyone else
> > uses PCI devices for).
> 
> Do you mean the virtio should actually be in the host side? Even here the
> system that implements PCI function should have multiple functions right? (one
> for network, other for console etc..). So there should be a virtio multiplexer
> both in the host side and in the device side?

We already support virtio over phsysical PCIe buses to support intel MIC
devices.  Take a look at drivers/misc/mic/bus/vop_bus.c and
drivers/misc/mic/vop (yes, what a horrible place for that code, not my
fault)

WARNING: multiple messages have this Message-ID (diff)
From: hch@infradead.org (Christoph Hellwig)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC PATCH 00/11] pci: support for configurable PCI endpoint
Date: Wed, 12 Oct 2016 05:21:44 -0700	[thread overview]
Message-ID: <20161012122144.GA2009@infradead.org> (raw)
In-Reply-To: <57E8BB69.4020804@ti.com>

On Mon, Sep 26, 2016 at 11:38:41AM +0530, Kishon Vijay Abraham I wrote:
> > Ok, so in theory there can be other hardware (and quite likely is)
> > that supports multiple functions, and we can extend the framework
> > to support them without major obstacles, but your hardware doesn't,
> > so you kept it simple with one hardcoded function, right?
> 
> right, PCIe can have upto 8 functions. So the issues with the current framework
> has to be fixed. I don't expect major obstacles with this as of now.

I wouldn't be too worried about.  We have two kinds of functions in
PCIe: physical functions, or virtual functions using SR-IOV.

For the first one we pretty much just need the controller driver to
report them separately as there is almost no interaction between
functions.

SR-IOV support will be more interesting as the physical functions
controls creation of the associated virtual functions.  I'd like to
defer that problem until we get hold of a software programmable
controller that supports SR-IOV and has open documentation.  (That
beeing said, if someone has a pointer to such a beast send it my way!)

> > We should still find out whether it's important that you can have
> > a single PCI function with a software multi-function support of some
> > sort. We'd still be limited to six BARs in total, and would also need
> > something to identify those sub-functions, so implementing that might
> > get quite hairy.
> > 
> > Possibly this could be done at a higher level, e.g. by implementing
> > a PCI-virtio multiplexer that can host multiple virtio based devices
> > inside of a single PCI function. If we think that would be a good idea,
> > we should make sure the configfs interface is extensible enough to
> > handle that.
> 
> Okay. So here the main function (actual PCI function) *can* perform the work of
> virtio muliplexer if the platform wants to support sub-functions or it can be a
> normal PCI function. right?

I really don't think we should be worried about this multiplexer.  It's
not something real PCIe devices do (sane ones anyway, the rest is
handled by ad-hoc multiplexers), and we should avoid creating our own
magic periphals for it.

> > One use case I have in mind for this is to have a PCI function that
> > can use virtio to provide rootfs (virtio-blk or 9pfs), network
> > and console to the system that implements the PCI function (note
> > that this is the opposite direction of what almost everyone else
> > uses PCI devices for).
> 
> Do you mean the virtio should actually be in the host side? Even here the
> system that implements PCI function should have multiple functions right? (one
> for network, other for console etc..). So there should be a virtio multiplexer
> both in the host side and in the device side?

We already support virtio over phsysical PCIe buses to support intel MIC
devices.  Take a look at drivers/misc/mic/bus/vop_bus.c and
drivers/misc/mic/vop (yes, what a horrible place for that code, not my
fault)

  parent reply	other threads:[~2016-10-12 12:21 UTC|newest]

Thread overview: 77+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-14  5:11 [RFC PATCH 00/11] pci: support for configurable PCI endpoint Kishon Vijay Abraham I
2016-09-14  5:11 ` Kishon Vijay Abraham I
2016-09-14  5:11 ` Kishon Vijay Abraham I
2016-09-14  5:11 ` [RFC PATCH 01/11] pci: endpoint: add EP core layer to enable EP controller and EP functions Kishon Vijay Abraham I
2016-09-14  5:11   ` Kishon Vijay Abraham I
2016-09-14  5:11   ` Kishon Vijay Abraham I
2016-10-12 12:38   ` Christoph Hellwig
2016-10-12 12:38     ` Christoph Hellwig
2016-10-12 12:38     ` Christoph Hellwig
2016-10-12 12:38     ` Christoph Hellwig
2016-09-14  5:11 ` [RFC PATCH 03/11] Documentation: PCI: guide to use PCI Endpoint Core Layer Kishon Vijay Abraham I
2016-09-14  5:11   ` Kishon Vijay Abraham I
2016-09-14  5:11   ` Kishon Vijay Abraham I
2016-09-14  5:12 ` [RFC PATCH 04/11] pci: endpoint: functions: add an EP function to test PCI Kishon Vijay Abraham I
2016-09-14  5:12   ` Kishon Vijay Abraham I
2016-09-14  5:12   ` Kishon Vijay Abraham I
2016-09-14  5:12 ` [RFC PATCH 05/11] pci: rename *host* directory to *controller* Kishon Vijay Abraham I
2016-09-14  5:12   ` Kishon Vijay Abraham I
2016-09-14  5:12   ` Kishon Vijay Abraham I
2016-10-12 12:43   ` Christoph Hellwig
2016-10-12 12:43     ` Christoph Hellwig
2016-10-12 12:43     ` Christoph Hellwig
2016-10-12 12:43     ` Christoph Hellwig
2016-09-14  5:12 ` [RFC PATCH 06/11] pci: controller: split designware into *core* and *host* Kishon Vijay Abraham I
2016-09-14  5:12   ` Kishon Vijay Abraham I
2016-09-14  5:12   ` Kishon Vijay Abraham I
2016-09-14  5:12 ` [RFC PATCH 07/11] pci: controller: designware: Add EP mode support Kishon Vijay Abraham I
2016-09-14  5:12   ` Kishon Vijay Abraham I
2016-09-14  5:12   ` Kishon Vijay Abraham I
2016-09-23 14:41   ` Rob Herring
2016-09-23 14:41     ` Rob Herring
2016-09-27 11:28     ` Kishon Vijay Abraham I
2016-09-27 11:28       ` Kishon Vijay Abraham I
2016-09-27 11:28       ` Kishon Vijay Abraham I
2016-09-14  5:12 ` [RFC PATCH 08/11] pci: controller: dra7xx: " Kishon Vijay Abraham I
2016-09-14  5:12   ` Kishon Vijay Abraham I
2016-09-14  5:12   ` Kishon Vijay Abraham I
2016-09-23 14:52   ` Rob Herring
2016-09-23 14:52     ` Rob Herring
2016-09-27 11:34     ` Kishon Vijay Abraham I
2016-09-27 11:34       ` Kishon Vijay Abraham I
2016-09-27 11:34       ` Kishon Vijay Abraham I
2016-09-14  5:12 ` [RFC PATCH 09/11] misc: add a new host side PCI endpoint test driver Kishon Vijay Abraham I
2016-09-14  5:12   ` Kishon Vijay Abraham I
2016-09-14  5:12   ` Kishon Vijay Abraham I
     [not found] ` <1473829927-20466-1-git-send-email-kishon-l0cyMroinI0@public.gmane.org>
2016-09-14  5:11   ` [RFC PATCH 02/11] pci: endpoint: introduce configfs entry for configuring EP functions Kishon Vijay Abraham I
2016-09-14  5:11     ` Kishon Vijay Abraham I
2016-09-14  5:11     ` Kishon Vijay Abraham I
2016-10-12 12:42     ` Christoph Hellwig
2016-10-12 12:42       ` Christoph Hellwig
2016-10-12 12:42       ` Christoph Hellwig
2016-10-12 12:42       ` Christoph Hellwig
2016-09-14  5:12   ` [RFC PATCH 10/11] ARM: dts: DRA7: Modify pcie1 dt node for EP mode Kishon Vijay Abraham I
2016-09-14  5:12     ` Kishon Vijay Abraham I
2016-09-14  5:12     ` Kishon Vijay Abraham I
2016-09-14  5:12   ` [RFC PATCH 11/11] HACK: pci: controller: dra7xx: disable smart idle Kishon Vijay Abraham I
2016-09-14  5:12     ` Kishon Vijay Abraham I
2016-09-14  5:12     ` Kishon Vijay Abraham I
2016-09-14 13:25 ` [RFC PATCH 00/11] pci: support for configurable PCI endpoint Arnd Bergmann
2016-09-14 13:25   ` Arnd Bergmann
2016-09-15  8:33   ` Kishon Vijay Abraham I
2016-09-15  8:33     ` Kishon Vijay Abraham I
2016-09-15  8:33     ` Kishon Vijay Abraham I
2016-09-22 13:34     ` Arnd Bergmann
2016-09-22 13:34       ` Arnd Bergmann
2016-09-22 13:34       ` Arnd Bergmann
2016-09-26  6:08       ` Kishon Vijay Abraham I
2016-09-26  6:08         ` Kishon Vijay Abraham I
2016-09-26  6:08         ` Kishon Vijay Abraham I
     [not found]         ` <57E8BB69.4020804-l0cyMroinI0@public.gmane.org>
2016-09-29  8:31           ` Kishon Vijay Abraham I
2016-09-29  8:31             ` Kishon Vijay Abraham I
2016-09-29  8:31             ` Kishon Vijay Abraham I
2016-09-29  8:31             ` Kishon Vijay Abraham I
2016-10-12 12:21         ` Christoph Hellwig [this message]
2016-10-12 12:21           ` Christoph Hellwig
2016-10-12 12:21           ` Christoph Hellwig
2016-10-12 12:21           ` Christoph Hellwig

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