All of lore.kernel.org
 help / color / mirror / Atom feed
From: Christoph Hellwig <hch@infradead.org>
To: Kishon Vijay Abraham I <kishon@ti.com>
Cc: devicetree@vger.kernel.org, Joao.Pinto@synopsys.com,
	Arnd Bergmann <arnd@arndb.de>,
	linux-doc@vger.kernel.org, Joao Pinto <jpinto@synopsys.com>,
	Jingoo Han <jingoohan1@gmail.com>,
	Pratyush Anand <pratyush.anand@gmail.com>,
	nsekhar@ti.com, linux-kernel@vger.kernel.org,
	Rob Herring <robh+dt@kernel.org>,
	hch@infradead.org, m-karicheri2@ti.com,
	linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org,
	Bjorn Helgaas <bhelgaas@google.com>,
	linux-omap@vger.kernel.org, mingkai.hu@nxp.com
Subject: Re: [RFC PATCH 01/11] pci: endpoint: add EP core layer to enable EP controller and EP functions
Date: Wed, 12 Oct 2016 05:38:43 -0700	[thread overview]
Message-ID: <20161012123843.GA942@infradead.org> (raw)
In-Reply-To: <1473829927-20466-2-git-send-email-kishon@ti.com>

> +/**
> + * pci_epc_stop() - stop the PCI link
> + * @epc: the link of the EPC device that has to be stopped
> + *
> + * Invoke to stop the PCI link
> + */
> +void pci_epc_stop(struct pci_epc *epc)
> +{
> +	if (IS_ERR(epc) || !epc->ops->stop)
> +		return;
> +
> +	spin_lock_irq(&epc->irq_lock);
> +	epc->ops->stop(epc);
> +	spin_unlock_irq(&epc->irq_lock);
> +}
> +EXPORT_SYMBOL_GPL(pci_epc_stop);

Can you elaborate on the synchronization strategy here?  It seems
like irq_lock is generally taken irq save and just around method
calls.  Wou;dn't it be better to leave locking to the methods
themselves?

> +/**
> + * struct pci_epc - represents the PCI EPC device
> + * @dev: PCI EPC device
> + * @ops: function pointers for performing endpoint operations
> + * @mutex: mutex to protect pci_epc ops
> + */
> +struct pci_epc {
> +	struct device			dev;
> +	/* support only single function PCI device for now */
> +	struct pci_epf			*epf;
> +	const struct pci_epc_ops	*ops;
> +	spinlock_t			irq_lock;
> +};

And this still documentes a mutex instead of the irq save spinlock,
while we're at it..

> +/**
> + * struct pci_epf_bar - represents the BAR of EPF device
> + * @phys_addr: physical address that should be mapped to the BAR
> + * @size: the size of the address space present in BAR
> + */
> +struct pci_epf_bar {
> +	dma_addr_t	phys_addr;
> +	size_t		size;
> +};

Just curious: shouldn't this be a phys_addr_t instead of a dma_addr_t?


Otherwise this looks like a nice little framework to get started!

WARNING: multiple messages have this Message-ID (diff)
From: Christoph Hellwig <hch@infradead.org>
To: Kishon Vijay Abraham I <kishon@ti.com>
Cc: devicetree@vger.kernel.org, Joao.Pinto@synopsys.com,
	Arnd Bergmann <arnd@arndb.de>,
	linux-doc@vger.kernel.org, Joao Pinto <jpinto@synopsys.com>,
	Jingoo Han <jingoohan1@gmail.com>,
	Pratyush Anand <pratyush.anand@gmail.com>,
	nsekhar@ti.com, linux-kernel@vger.kernel.org,
	Rob Herring <robh+dt@kernel.org>,
	hch@infradead.org, m-karicheri2@ti.com,
	linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org,
	Bjorn Helgaas <bhelgaas@google.com>,
	linux-omap@vger.kernel.org, mingkai.hu@nxp.com
Subject: Re: [RFC PATCH 01/11] pci: endpoint: add EP core layer to enable EP controller and EP functions
Date: Wed, 12 Oct 2016 05:38:43 -0700	[thread overview]
Message-ID: <20161012123843.GA942@infradead.org> (raw)
In-Reply-To: <1473829927-20466-2-git-send-email-kishon@ti.com>

> +/**
> + * pci_epc_stop() - stop the PCI link
> + * @epc: the link of the EPC device that has to be stopped
> + *
> + * Invoke to stop the PCI link
> + */
> +void pci_epc_stop(struct pci_epc *epc)
> +{
> +	if (IS_ERR(epc) || !epc->ops->stop)
> +		return;
> +
> +	spin_lock_irq(&epc->irq_lock);
> +	epc->ops->stop(epc);
> +	spin_unlock_irq(&epc->irq_lock);
> +}
> +EXPORT_SYMBOL_GPL(pci_epc_stop);

Can you elaborate on the synchronization strategy here?  It seems
like irq_lock is generally taken irq save and just around method
calls.  Wou;dn't it be better to leave locking to the methods
themselves?

> +/**
> + * struct pci_epc - represents the PCI EPC device
> + * @dev: PCI EPC device
> + * @ops: function pointers for performing endpoint operations
> + * @mutex: mutex to protect pci_epc ops
> + */
> +struct pci_epc {
> +	struct device			dev;
> +	/* support only single function PCI device for now */
> +	struct pci_epf			*epf;
> +	const struct pci_epc_ops	*ops;
> +	spinlock_t			irq_lock;
> +};

And this still documentes a mutex instead of the irq save spinlock,
while we're at it..

> +/**
> + * struct pci_epf_bar - represents the BAR of EPF device
> + * @phys_addr: physical address that should be mapped to the BAR
> + * @size: the size of the address space present in BAR
> + */
> +struct pci_epf_bar {
> +	dma_addr_t	phys_addr;
> +	size_t		size;
> +};

Just curious: shouldn't this be a phys_addr_t instead of a dma_addr_t?


Otherwise this looks like a nice little framework to get started!

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: hch@infradead.org (Christoph Hellwig)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC PATCH 01/11] pci: endpoint: add EP core layer to enable EP controller and EP functions
Date: Wed, 12 Oct 2016 05:38:43 -0700	[thread overview]
Message-ID: <20161012123843.GA942@infradead.org> (raw)
In-Reply-To: <1473829927-20466-2-git-send-email-kishon@ti.com>

> +/**
> + * pci_epc_stop() - stop the PCI link
> + * @epc: the link of the EPC device that has to be stopped
> + *
> + * Invoke to stop the PCI link
> + */
> +void pci_epc_stop(struct pci_epc *epc)
> +{
> +	if (IS_ERR(epc) || !epc->ops->stop)
> +		return;
> +
> +	spin_lock_irq(&epc->irq_lock);
> +	epc->ops->stop(epc);
> +	spin_unlock_irq(&epc->irq_lock);
> +}
> +EXPORT_SYMBOL_GPL(pci_epc_stop);

Can you elaborate on the synchronization strategy here?  It seems
like irq_lock is generally taken irq save and just around method
calls.  Wou;dn't it be better to leave locking to the methods
themselves?

> +/**
> + * struct pci_epc - represents the PCI EPC device
> + * @dev: PCI EPC device
> + * @ops: function pointers for performing endpoint operations
> + * @mutex: mutex to protect pci_epc ops
> + */
> +struct pci_epc {
> +	struct device			dev;
> +	/* support only single function PCI device for now */
> +	struct pci_epf			*epf;
> +	const struct pci_epc_ops	*ops;
> +	spinlock_t			irq_lock;
> +};

And this still documentes a mutex instead of the irq save spinlock,
while we're at it..

> +/**
> + * struct pci_epf_bar - represents the BAR of EPF device
> + * @phys_addr: physical address that should be mapped to the BAR
> + * @size: the size of the address space present in BAR
> + */
> +struct pci_epf_bar {
> +	dma_addr_t	phys_addr;
> +	size_t		size;
> +};

Just curious: shouldn't this be a phys_addr_t instead of a dma_addr_t?


Otherwise this looks like a nice little framework to get started!

WARNING: multiple messages have this Message-ID (diff)
From: Christoph Hellwig <hch@infradead.org>
To: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
	Arnd Bergmann <arnd@arndb.de>, Jingoo Han <jingoohan1@gmail.com>,
	hch@infradead.org, Joao.Pinto@synopsys.com, mingkai.hu@nxp.com,
	m-karicheri2@ti.com, Pratyush Anand <pratyush.anand@gmail.com>,
	linux-pci@vger.kernel.org, linux-doc@vger.kernel.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	Joao Pinto <jpinto@synopsys.com>,
	Rob Herring <robh+dt@kernel.org>,
	nsekhar@ti.com
Subject: Re: [RFC PATCH 01/11] pci: endpoint: add EP core layer to enable EP controller and EP functions
Date: Wed, 12 Oct 2016 05:38:43 -0700	[thread overview]
Message-ID: <20161012123843.GA942@infradead.org> (raw)
In-Reply-To: <1473829927-20466-2-git-send-email-kishon@ti.com>

> +/**
> + * pci_epc_stop() - stop the PCI link
> + * @epc: the link of the EPC device that has to be stopped
> + *
> + * Invoke to stop the PCI link
> + */
> +void pci_epc_stop(struct pci_epc *epc)
> +{
> +	if (IS_ERR(epc) || !epc->ops->stop)
> +		return;
> +
> +	spin_lock_irq(&epc->irq_lock);
> +	epc->ops->stop(epc);
> +	spin_unlock_irq(&epc->irq_lock);
> +}
> +EXPORT_SYMBOL_GPL(pci_epc_stop);

Can you elaborate on the synchronization strategy here?  It seems
like irq_lock is generally taken irq save and just around method
calls.  Wou;dn't it be better to leave locking to the methods
themselves?

> +/**
> + * struct pci_epc - represents the PCI EPC device
> + * @dev: PCI EPC device
> + * @ops: function pointers for performing endpoint operations
> + * @mutex: mutex to protect pci_epc ops
> + */
> +struct pci_epc {
> +	struct device			dev;
> +	/* support only single function PCI device for now */
> +	struct pci_epf			*epf;
> +	const struct pci_epc_ops	*ops;
> +	spinlock_t			irq_lock;
> +};

And this still documentes a mutex instead of the irq save spinlock,
while we're at it..

> +/**
> + * struct pci_epf_bar - represents the BAR of EPF device
> + * @phys_addr: physical address that should be mapped to the BAR
> + * @size: the size of the address space present in BAR
> + */
> +struct pci_epf_bar {
> +	dma_addr_t	phys_addr;
> +	size_t		size;
> +};

Just curious: shouldn't this be a phys_addr_t instead of a dma_addr_t?


Otherwise this looks like a nice little framework to get started!

  reply	other threads:[~2016-10-12 12:38 UTC|newest]

Thread overview: 77+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-14  5:11 [RFC PATCH 00/11] pci: support for configurable PCI endpoint Kishon Vijay Abraham I
2016-09-14  5:11 ` Kishon Vijay Abraham I
2016-09-14  5:11 ` Kishon Vijay Abraham I
2016-09-14  5:11 ` [RFC PATCH 01/11] pci: endpoint: add EP core layer to enable EP controller and EP functions Kishon Vijay Abraham I
2016-09-14  5:11   ` Kishon Vijay Abraham I
2016-09-14  5:11   ` Kishon Vijay Abraham I
2016-10-12 12:38   ` Christoph Hellwig [this message]
2016-10-12 12:38     ` Christoph Hellwig
2016-10-12 12:38     ` Christoph Hellwig
2016-10-12 12:38     ` Christoph Hellwig
2016-09-14  5:11 ` [RFC PATCH 03/11] Documentation: PCI: guide to use PCI Endpoint Core Layer Kishon Vijay Abraham I
2016-09-14  5:11   ` Kishon Vijay Abraham I
2016-09-14  5:11   ` Kishon Vijay Abraham I
2016-09-14  5:12 ` [RFC PATCH 04/11] pci: endpoint: functions: add an EP function to test PCI Kishon Vijay Abraham I
2016-09-14  5:12   ` Kishon Vijay Abraham I
2016-09-14  5:12   ` Kishon Vijay Abraham I
2016-09-14  5:12 ` [RFC PATCH 05/11] pci: rename *host* directory to *controller* Kishon Vijay Abraham I
2016-09-14  5:12   ` Kishon Vijay Abraham I
2016-09-14  5:12   ` Kishon Vijay Abraham I
2016-10-12 12:43   ` Christoph Hellwig
2016-10-12 12:43     ` Christoph Hellwig
2016-10-12 12:43     ` Christoph Hellwig
2016-10-12 12:43     ` Christoph Hellwig
2016-09-14  5:12 ` [RFC PATCH 06/11] pci: controller: split designware into *core* and *host* Kishon Vijay Abraham I
2016-09-14  5:12   ` Kishon Vijay Abraham I
2016-09-14  5:12   ` Kishon Vijay Abraham I
2016-09-14  5:12 ` [RFC PATCH 07/11] pci: controller: designware: Add EP mode support Kishon Vijay Abraham I
2016-09-14  5:12   ` Kishon Vijay Abraham I
2016-09-14  5:12   ` Kishon Vijay Abraham I
2016-09-23 14:41   ` Rob Herring
2016-09-23 14:41     ` Rob Herring
2016-09-27 11:28     ` Kishon Vijay Abraham I
2016-09-27 11:28       ` Kishon Vijay Abraham I
2016-09-27 11:28       ` Kishon Vijay Abraham I
2016-09-14  5:12 ` [RFC PATCH 08/11] pci: controller: dra7xx: " Kishon Vijay Abraham I
2016-09-14  5:12   ` Kishon Vijay Abraham I
2016-09-14  5:12   ` Kishon Vijay Abraham I
2016-09-23 14:52   ` Rob Herring
2016-09-23 14:52     ` Rob Herring
2016-09-27 11:34     ` Kishon Vijay Abraham I
2016-09-27 11:34       ` Kishon Vijay Abraham I
2016-09-27 11:34       ` Kishon Vijay Abraham I
2016-09-14  5:12 ` [RFC PATCH 09/11] misc: add a new host side PCI endpoint test driver Kishon Vijay Abraham I
2016-09-14  5:12   ` Kishon Vijay Abraham I
2016-09-14  5:12   ` Kishon Vijay Abraham I
     [not found] ` <1473829927-20466-1-git-send-email-kishon-l0cyMroinI0@public.gmane.org>
2016-09-14  5:11   ` [RFC PATCH 02/11] pci: endpoint: introduce configfs entry for configuring EP functions Kishon Vijay Abraham I
2016-09-14  5:11     ` Kishon Vijay Abraham I
2016-09-14  5:11     ` Kishon Vijay Abraham I
2016-10-12 12:42     ` Christoph Hellwig
2016-10-12 12:42       ` Christoph Hellwig
2016-10-12 12:42       ` Christoph Hellwig
2016-10-12 12:42       ` Christoph Hellwig
2016-09-14  5:12   ` [RFC PATCH 10/11] ARM: dts: DRA7: Modify pcie1 dt node for EP mode Kishon Vijay Abraham I
2016-09-14  5:12     ` Kishon Vijay Abraham I
2016-09-14  5:12     ` Kishon Vijay Abraham I
2016-09-14  5:12   ` [RFC PATCH 11/11] HACK: pci: controller: dra7xx: disable smart idle Kishon Vijay Abraham I
2016-09-14  5:12     ` Kishon Vijay Abraham I
2016-09-14  5:12     ` Kishon Vijay Abraham I
2016-09-14 13:25 ` [RFC PATCH 00/11] pci: support for configurable PCI endpoint Arnd Bergmann
2016-09-14 13:25   ` Arnd Bergmann
2016-09-15  8:33   ` Kishon Vijay Abraham I
2016-09-15  8:33     ` Kishon Vijay Abraham I
2016-09-15  8:33     ` Kishon Vijay Abraham I
2016-09-22 13:34     ` Arnd Bergmann
2016-09-22 13:34       ` Arnd Bergmann
2016-09-22 13:34       ` Arnd Bergmann
2016-09-26  6:08       ` Kishon Vijay Abraham I
2016-09-26  6:08         ` Kishon Vijay Abraham I
2016-09-26  6:08         ` Kishon Vijay Abraham I
     [not found]         ` <57E8BB69.4020804-l0cyMroinI0@public.gmane.org>
2016-09-29  8:31           ` Kishon Vijay Abraham I
2016-09-29  8:31             ` Kishon Vijay Abraham I
2016-09-29  8:31             ` Kishon Vijay Abraham I
2016-09-29  8:31             ` Kishon Vijay Abraham I
2016-10-12 12:21         ` Christoph Hellwig
2016-10-12 12:21           ` Christoph Hellwig
2016-10-12 12:21           ` Christoph Hellwig
2016-10-12 12:21           ` Christoph Hellwig

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20161012123843.GA942@infradead.org \
    --to=hch@infradead.org \
    --cc=Joao.Pinto@synopsys.com \
    --cc=arnd@arndb.de \
    --cc=bhelgaas@google.com \
    --cc=devicetree@vger.kernel.org \
    --cc=jingoohan1@gmail.com \
    --cc=jpinto@synopsys.com \
    --cc=kishon@ti.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-doc@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-omap@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=m-karicheri2@ti.com \
    --cc=mingkai.hu@nxp.com \
    --cc=nsekhar@ti.com \
    --cc=pratyush.anand@gmail.com \
    --cc=robh+dt@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.