From: Pavel Machek <pavel@ucw.cz>
To: Peter Zijlstra <peterz@infradead.org>
Cc: acme@redhat.com, kernel list <linux-kernel@vger.kernel.org>,
mingo@redhat.com, alexander.shishkin@linux.intel.com
Subject: Re: Getting interrupt every million cache misses
Date: Thu, 27 Oct 2016 10:46:38 +0200 [thread overview]
Message-ID: <20161027084637.GA19469@amd> (raw)
In-Reply-To: <20161027082801.GE3568@worktop.programming.kicks-ass.net>
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Hi!
> > I'd like to get an interrupt every million cache misses... to do a
> > printk() or something like that. As far as I can tell, modern hardware
> > should allow me to do that. AFAICT performance events subsystem can do
> > something like that, but I can't figure out where the code is / what I
> > should call.
> >
> > Can someone help?
>
> Can you go back one step and explain why you would want this? What use
> is a printk() on every 1e6-th cache miss.
First, thanks for quick reply.
And actually, printk() is not needed, udelay(50msec) is. Reason is,
that DRAM becomes unreliable if about milion cache misses happen in
under 64msec -- so I'd like to slow the system down in such cases to
prevent bug from biting me.
(Details are here
https://googleprojectzero.blogspot.cz/2015/03/exploiting-dram-rowhammer-bug-to-gain.html
). Bug is exploitable to get local root; it is also exploitable to
gain local code execution from javascript... so it is rather severe.
> That is, why doesn't:
>
> $ perf record -e cache-misses -c 1000000 -a -- sleep 5
>
> suffice?
Thanks for the pointer... I'd really like to do this from kernel, so
that I can "almost synchronously" stop the execution when excessive
cache isses happen.
Best regards,
Pavel
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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next prev parent reply other threads:[~2016-10-27 14:46 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-26 20:54 Getting interrupt every million cache misses Pavel Machek
2016-10-27 8:28 ` Peter Zijlstra
2016-10-27 8:46 ` Pavel Machek [this message]
2016-10-27 9:15 ` Peter Zijlstra
2016-10-27 9:11 ` Pavel Machek
2016-10-27 9:33 ` Peter Zijlstra
2016-10-27 20:40 ` [kernel-hardening] " Kees Cook
2016-10-27 20:40 ` Kees Cook
2016-10-27 21:27 ` [kernel-hardening] rowhammer protection [was Re: Getting interrupt every million cache misses] Pavel Machek
2016-10-27 21:27 ` Pavel Machek
2016-10-28 7:07 ` [kernel-hardening] " Ingo Molnar
2016-10-28 7:07 ` Ingo Molnar
2016-10-28 8:50 ` [kernel-hardening] " Pavel Machek
2016-10-28 8:50 ` Pavel Machek
2016-10-28 8:59 ` [kernel-hardening] " Ingo Molnar
2016-10-28 8:59 ` Ingo Molnar
2016-10-28 11:55 ` [kernel-hardening] " Pavel Machek
2016-10-28 11:55 ` Pavel Machek
2016-10-28 9:04 ` [kernel-hardening] " Peter Zijlstra
2016-10-28 9:04 ` Peter Zijlstra
2016-10-28 9:27 ` [kernel-hardening] " Vegard Nossum
2016-10-28 9:27 ` Vegard Nossum
2016-10-28 9:35 ` [kernel-hardening] " Ingo Molnar
2016-10-28 9:35 ` Ingo Molnar
2016-10-28 9:47 ` [kernel-hardening] " Vegard Nossum
2016-10-28 9:47 ` Vegard Nossum
2016-10-28 9:53 ` [kernel-hardening] " Mark Rutland
2016-10-28 11:27 ` Pavel Machek
2016-10-28 11:27 ` Pavel Machek
2016-10-28 9:51 ` [kernel-hardening] " Mark Rutland
2016-10-28 11:21 ` Pavel Machek
2016-10-28 14:05 ` Mark Rutland
2016-10-28 14:18 ` Peter Zijlstra
2016-10-28 18:30 ` Pavel Machek
2016-10-28 18:48 ` Peter Zijlstra
2016-11-02 18:13 ` Pavel Machek
2016-10-28 17:27 ` Pavel Machek
2016-10-29 13:06 ` Daniel Gruss
2016-10-29 19:42 ` Pavel Machek
2016-10-29 20:05 ` Daniel Gruss
2016-10-29 20:14 ` Daniel Gruss
2016-10-29 21:05 ` Pavel Machek
2016-10-29 21:07 ` Daniel Gruss
2016-10-29 21:45 ` Pavel Machek
2016-10-29 21:49 ` Daniel Gruss
2016-10-29 22:01 ` Pavel Machek
2016-10-29 22:02 ` Daniel Gruss
2016-10-31 8:27 ` Pavel Machek
2016-10-31 14:47 ` Mark Rutland
2016-10-31 21:13 ` Pavel Machek
2016-10-31 22:09 ` Mark Rutland
2016-11-01 6:33 ` Ingo Molnar
2016-11-01 7:20 ` Daniel Micay
2016-11-01 7:53 ` Daniel Gruss
2016-11-01 8:10 ` Pavel Machek
2016-11-01 8:13 ` Daniel Gruss
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