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* [PATCH] drm/i915/bxt: Correct dual-link MIPI port control.
@ 2016-11-21 22:24 Bob Paauwe
  2016-11-21 23:15 ` ✓ Fi.CI.BAT: success for " Patchwork
  2016-11-22 13:00 ` [PATCH] " Ville Syrjälä
  0 siblings, 2 replies; 4+ messages in thread
From: Bob Paauwe @ 2016-11-21 22:24 UTC (permalink / raw)
  To: intel-gfx

For BXT, there is only one bit that enables/disables dual-link mode
and not different bits depending on which pipe is being used.

Signed-off-by: Bob Paauwe <bob.j.paauwe@intel.com>
---
 drivers/gpu/drm/i915/intel_dsi.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 4e0d025..a35c141 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -476,7 +476,10 @@ static void intel_dsi_port_enable(struct intel_encoder *encoder)
 		if (intel_dsi->ports == (BIT(PORT_A) | BIT(PORT_C))) {
 			temp |= (intel_dsi->dual_link - 1)
 						<< DUAL_LINK_MODE_SHIFT;
-			temp |= intel_crtc->pipe ?
+			if (IS_BROXTON(dev_priv))
+				temp |= LANE_CONFIGURATION_DUAL_LINK_A;
+			else
+				temp |= intel_crtc->pipe ?
 					LANE_CONFIGURATION_DUAL_LINK_B :
 					LANE_CONFIGURATION_DUAL_LINK_A;
 		}
-- 
2.7.4

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^ permalink raw reply related	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2016-11-23 20:26 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2016-11-21 22:24 [PATCH] drm/i915/bxt: Correct dual-link MIPI port control Bob Paauwe
2016-11-21 23:15 ` ✓ Fi.CI.BAT: success for " Patchwork
2016-11-22 13:00 ` [PATCH] " Ville Syrjälä
2016-11-23 20:26   ` Ville Syrjälä

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