From: lorenzo.pieralisi@arm.com (Lorenzo Pieralisi)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] arm64: dts: juno: Correct PCI IO window
Date: Wed, 30 Nov 2016 10:43:43 +0000 [thread overview]
Message-ID: <20161130104343.GA13903@red-moon> (raw)
In-Reply-To: <1480452310-29286-1-git-send-email-jeremy.linton@arm.com>
On Tue, Nov 29, 2016 at 02:45:10PM -0600, Jeremy Linton wrote:
> The PCIe root complex on Juno translates the MMIO mapped
> at 0x5f800000 to the PIO address range starting at 0
> (which is common because PIO addresses are generally < 64k).
> Correct the DT to reflect this.
>
> Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
> ---
> arch/arm64/boot/dts/arm/juno-base.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
> index 334271a..7d3a2ac 100644
> --- a/arch/arm64/boot/dts/arm/juno-base.dtsi
> +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
> @@ -393,7 +393,7 @@
> #address-cells = <3>;
> #size-cells = <2>;
> dma-coherent;
> - ranges = <0x01000000 0x00 0x5f800000 0x00 0x5f800000 0x0 0x00800000>,
> + ranges = <0x01000000 0x00 0x00000000 0x00 0x5f800000 0x0 0x00800000>,
> <0x02000000 0x00 0x50000000 0x00 0x50000000 0x0 0x08000000>,
> <0x42000000 0x40 0x00000000 0x40 0x00000000 0x1 0x00000000>;
> #interrupt-cells = <1>;
> --
> 2.5.5
>
WARNING: multiple messages have this Message-ID (diff)
From: Lorenzo Pieralisi <lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>
To: Jeremy Linton <jeremy.linton-5wv7dgnIgG8@public.gmane.org>
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
liviu.dudau-5wv7dgnIgG8@public.gmane.org,
sudeep.holla-5wv7dgnIgG8@public.gmane.org,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
mark.rutland-5wv7dgnIgG8@public.gmane.org,
catalin.marinas-5wv7dgnIgG8@public.gmane.org,
will.deacon-5wv7dgnIgG8@public.gmane.org
Subject: Re: [PATCH] arm64: dts: juno: Correct PCI IO window
Date: Wed, 30 Nov 2016 10:43:43 +0000 [thread overview]
Message-ID: <20161130104343.GA13903@red-moon> (raw)
In-Reply-To: <1480452310-29286-1-git-send-email-jeremy.linton-5wv7dgnIgG8@public.gmane.org>
On Tue, Nov 29, 2016 at 02:45:10PM -0600, Jeremy Linton wrote:
> The PCIe root complex on Juno translates the MMIO mapped
> at 0x5f800000 to the PIO address range starting at 0
> (which is common because PIO addresses are generally < 64k).
> Correct the DT to reflect this.
>
> Signed-off-by: Jeremy Linton <jeremy.linton-5wv7dgnIgG8@public.gmane.org>
> ---
> arch/arm64/boot/dts/arm/juno-base.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>
> diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
> index 334271a..7d3a2ac 100644
> --- a/arch/arm64/boot/dts/arm/juno-base.dtsi
> +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
> @@ -393,7 +393,7 @@
> #address-cells = <3>;
> #size-cells = <2>;
> dma-coherent;
> - ranges = <0x01000000 0x00 0x5f800000 0x00 0x5f800000 0x0 0x00800000>,
> + ranges = <0x01000000 0x00 0x00000000 0x00 0x5f800000 0x0 0x00800000>,
> <0x02000000 0x00 0x50000000 0x00 0x50000000 0x0 0x08000000>,
> <0x42000000 0x40 0x00000000 0x40 0x00000000 0x1 0x00000000>;
> #interrupt-cells = <1>;
> --
> 2.5.5
>
--
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next prev parent reply other threads:[~2016-11-30 10:43 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-29 20:45 [PATCH] arm64: dts: juno: Correct PCI IO window Jeremy Linton
2016-11-29 20:45 ` Jeremy Linton
2016-11-30 10:04 ` liviu.dudau at arm.com
2016-11-30 10:04 ` liviu.dudau
2016-11-30 10:43 ` Lorenzo Pieralisi [this message]
2016-11-30 10:43 ` Lorenzo Pieralisi
2016-11-30 16:29 ` Sudeep Holla
2016-11-30 16:29 ` Sudeep Holla
2016-11-30 22:51 ` Arnd Bergmann
2016-11-30 22:51 ` Arnd Bergmann
2016-12-01 9:58 ` Sudeep Holla
2016-12-01 9:58 ` Sudeep Holla
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