From: arnd@arndb.de (Arnd Bergmann)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] arm64: dts: juno: Correct PCI IO window
Date: Wed, 30 Nov 2016 23:51:05 +0100 [thread overview]
Message-ID: <7823573.FNB8ayVOnQ@wuerfel> (raw)
In-Reply-To: <92ac8013-b88e-2f74-9a49-7d5f38a4e7a5@arm.com>
On Wednesday, November 30, 2016 4:29:35 PM CET Sudeep Holla wrote:
> Hi Jeremy,
>
> On 29/11/16 20:45, Jeremy Linton wrote:
> > The PCIe root complex on Juno translates the MMIO mapped
> > at 0x5f800000 to the PIO address range starting at 0
> > (which is common because PIO addresses are generally < 64k).
> > Correct the DT to reflect this.
> >
>
> I have another DT fix that I have asked ARM-SoC guys to pick up directly
> from the list. If that doesn't happen, I will send PR including both.
>
> If that happens then we need to send this to them to be picked directly.
> At this point I want to wait for couple of days to avoid confusion.
I ended up taking the other one for v4.10, but this one seems more
important so I applied it for v4.9.
Let me know if you disagree with the priorities, as I plan to send out
the last 4.9 fixes pull request to Linus tomorrow.
Arnd
WARNING: multiple messages have this Message-ID (diff)
From: Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>
To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Cc: Sudeep Holla <sudeep.holla-5wv7dgnIgG8@public.gmane.org>,
Jeremy Linton <jeremy.linton-5wv7dgnIgG8@public.gmane.org>,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
mark.rutland-5wv7dgnIgG8@public.gmane.org,
lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org,
catalin.marinas-5wv7dgnIgG8@public.gmane.org,
liviu.dudau-5wv7dgnIgG8@public.gmane.org,
will.deacon-5wv7dgnIgG8@public.gmane.org,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org
Subject: Re: [PATCH] arm64: dts: juno: Correct PCI IO window
Date: Wed, 30 Nov 2016 23:51:05 +0100 [thread overview]
Message-ID: <7823573.FNB8ayVOnQ@wuerfel> (raw)
In-Reply-To: <92ac8013-b88e-2f74-9a49-7d5f38a4e7a5-5wv7dgnIgG8@public.gmane.org>
On Wednesday, November 30, 2016 4:29:35 PM CET Sudeep Holla wrote:
> Hi Jeremy,
>
> On 29/11/16 20:45, Jeremy Linton wrote:
> > The PCIe root complex on Juno translates the MMIO mapped
> > at 0x5f800000 to the PIO address range starting at 0
> > (which is common because PIO addresses are generally < 64k).
> > Correct the DT to reflect this.
> >
>
> I have another DT fix that I have asked ARM-SoC guys to pick up directly
> from the list. If that doesn't happen, I will send PR including both.
>
> If that happens then we need to send this to them to be picked directly.
> At this point I want to wait for couple of days to avoid confusion.
I ended up taking the other one for v4.10, but this one seems more
important so I applied it for v4.9.
Let me know if you disagree with the priorities, as I plan to send out
the last 4.9 fixes pull request to Linus tomorrow.
Arnd
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next prev parent reply other threads:[~2016-11-30 22:51 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-29 20:45 [PATCH] arm64: dts: juno: Correct PCI IO window Jeremy Linton
2016-11-29 20:45 ` Jeremy Linton
2016-11-30 10:04 ` liviu.dudau at arm.com
2016-11-30 10:04 ` liviu.dudau
2016-11-30 10:43 ` Lorenzo Pieralisi
2016-11-30 10:43 ` Lorenzo Pieralisi
2016-11-30 16:29 ` Sudeep Holla
2016-11-30 16:29 ` Sudeep Holla
2016-11-30 22:51 ` Arnd Bergmann [this message]
2016-11-30 22:51 ` Arnd Bergmann
2016-12-01 9:58 ` Sudeep Holla
2016-12-01 9:58 ` Sudeep Holla
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