* [PATCH v2 0/4] r8a7796 HSCIF integration
@ 2016-12-07 16:44 Ulrich Hecht
2016-12-07 16:44 ` [PATCH v2 1/4] clk: shmobile: r8a7796: Add HSCIF clocks Ulrich Hecht
` (4 more replies)
0 siblings, 5 replies; 15+ messages in thread
From: Ulrich Hecht @ 2016-12-07 16:44 UTC (permalink / raw)
To: linux-renesas-soc, horms, geert; +Cc: magnus.damm, Ulrich Hecht
Hi!
This revision adds dmac2 references and Reviewed-bys where appropriate, plus
the missing C pin group for HSCIF2.
(Unlike the SCIF series, the DMA assignments in this one are not completely
bogus. Go figure.)
Based on renesas-devel-20161207-v4.9-rc8.
CU
Uli
Ulrich Hecht (4):
clk: shmobile: r8a7796: Add HSCIF clocks
pinctrl: sh-pfc: r8a7796: Add HSCIF pins, groups, and functions
arm64: renesas: r8a7796 dtsi: Add all HSCIF nodes
arm64: renesas: r8a7796: Enable HSCIF DMA
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 83 +++++++++
drivers/clk/renesas/r8a7796-cpg-mssr.c | 5 +
drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 283 +++++++++++++++++++++++++++++++
3 files changed, 371 insertions(+)
--
2.7.4
^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH v2 1/4] clk: shmobile: r8a7796: Add HSCIF clocks 2016-12-07 16:44 [PATCH v2 0/4] r8a7796 HSCIF integration Ulrich Hecht @ 2016-12-07 16:44 ` Ulrich Hecht 2016-12-09 8:59 ` Geert Uytterhoeven 2016-12-07 16:44 ` [PATCH v2 2/4] pinctrl: sh-pfc: r8a7796: Add HSCIF pins, groups, and functions Ulrich Hecht ` (3 subsequent siblings) 4 siblings, 1 reply; 15+ messages in thread From: Ulrich Hecht @ 2016-12-07 16:44 UTC (permalink / raw) To: linux-renesas-soc, horms, geert; +Cc: magnus.damm, Ulrich Hecht Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> --- drivers/clk/renesas/r8a7796-cpg-mssr.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c index 1c144b2..d25bfd4 100644 --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c @@ -121,6 +121,11 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = { DEF_MOD("sdif0", 314, R8A7796_CLK_SD0), DEF_MOD("rwdt0", 402, R8A7796_CLK_R), DEF_MOD("intc-ap", 408, R8A7796_CLK_S3D1), + DEF_MOD("hscif4", 516, R8A7796_CLK_S3D1), + DEF_MOD("hscif3", 517, R8A7796_CLK_S3D1), + DEF_MOD("hscif2", 518, R8A7796_CLK_S3D1), + DEF_MOD("hscif1", 519, R8A7796_CLK_S3D1), + DEF_MOD("hscif0", 520, R8A7796_CLK_S3D1), DEF_MOD("thermal", 522, R8A7796_CLK_CP), DEF_MOD("etheravb", 812, R8A7796_CLK_S0D6), DEF_MOD("gpio7", 905, R8A7796_CLK_S3D4), -- 2.7.4 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH v2 1/4] clk: shmobile: r8a7796: Add HSCIF clocks 2016-12-07 16:44 ` [PATCH v2 1/4] clk: shmobile: r8a7796: Add HSCIF clocks Ulrich Hecht @ 2016-12-09 8:59 ` Geert Uytterhoeven 0 siblings, 0 replies; 15+ messages in thread From: Geert Uytterhoeven @ 2016-12-09 8:59 UTC (permalink / raw) To: Ulrich Hecht; +Cc: Linux-Renesas, Simon Horman, Magnus Damm On Wed, Dec 7, 2016 at 5:44 PM, Ulrich Hecht <ulrich.hecht+renesas@gmail.com> wrote: > Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Already in clk-next (with s/shmobile/renesas/ ;-) Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v2 2/4] pinctrl: sh-pfc: r8a7796: Add HSCIF pins, groups, and functions 2016-12-07 16:44 [PATCH v2 0/4] r8a7796 HSCIF integration Ulrich Hecht 2016-12-07 16:44 ` [PATCH v2 1/4] clk: shmobile: r8a7796: Add HSCIF clocks Ulrich Hecht @ 2016-12-07 16:44 ` Ulrich Hecht 2016-12-09 9:56 ` Geert Uytterhoeven 2016-12-13 9:40 ` Geert Uytterhoeven 2016-12-07 16:44 ` [PATCH v2 3/4] arm64: renesas: r8a7796 dtsi: Add all HSCIF nodes Ulrich Hecht ` (2 subsequent siblings) 4 siblings, 2 replies; 15+ messages in thread From: Ulrich Hecht @ 2016-12-07 16:44 UTC (permalink / raw) To: linux-renesas-soc, horms, geert; +Cc: magnus.damm, Ulrich Hecht Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> --- drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 283 +++++++++++++++++++++++++++++++++++ 1 file changed, 283 insertions(+) diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c index dc9b671..ed4a877 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c @@ -1490,6 +1490,213 @@ static const struct sh_pfc_pin pinmux_pins[] = { PINMUX_GPIO_GP_ALL(), }; +/* - HSCIF0 ----------------------------------------------------------------- */ +static const unsigned int hscif0_data_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(5, 13), RCAR_GP_PIN(5, 14), +}; +static const unsigned int hscif0_data_mux[] = { + HRX0_MARK, HTX0_MARK, +}; +static const unsigned int hscif0_clk_pins[] = { + /* SCK */ + RCAR_GP_PIN(5, 12), +}; +static const unsigned int hscif0_clk_mux[] = { + HSCK0_MARK, +}; +static const unsigned int hscif0_ctrl_pins[] = { + /* RTS, CTS */ + RCAR_GP_PIN(5, 16), RCAR_GP_PIN(5, 15), +}; +static const unsigned int hscif0_ctrl_mux[] = { + HRTS0_N_MARK, HCTS0_N_MARK, +}; +/* - HSCIF1 ----------------------------------------------------------------- */ +static const unsigned int hscif1_data_a_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 6), +}; +static const unsigned int hscif1_data_a_mux[] = { + HRX1_A_MARK, HTX1_A_MARK, +}; +static const unsigned int hscif1_clk_a_pins[] = { + /* SCK */ + RCAR_GP_PIN(6, 21), +}; +static const unsigned int hscif1_clk_a_mux[] = { + HSCK1_A_MARK, +}; +static const unsigned int hscif1_ctrl_a_pins[] = { + /* RTS, CTS */ + RCAR_GP_PIN(5, 8), RCAR_GP_PIN(5, 7), +}; +static const unsigned int hscif1_ctrl_a_mux[] = { + HRTS1_N_A_MARK, HCTS1_N_A_MARK, +}; + +static const unsigned int hscif1_data_b_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 2), +}; +static const unsigned int hscif1_data_b_mux[] = { + HRX1_B_MARK, HTX1_B_MARK, +}; +static const unsigned int hscif1_clk_b_pins[] = { + /* SCK */ + RCAR_GP_PIN(5, 0), +}; +static const unsigned int hscif1_clk_b_mux[] = { + HSCK1_B_MARK, +}; +static const unsigned int hscif1_ctrl_b_pins[] = { + /* RTS, CTS */ + RCAR_GP_PIN(5, 4), RCAR_GP_PIN(5, 3), +}; +static const unsigned int hscif1_ctrl_b_mux[] = { + HRTS1_N_B_MARK, HCTS1_N_B_MARK, +}; +/* - HSCIF2 ----------------------------------------------------------------- */ +static const unsigned int hscif2_data_a_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9), +}; +static const unsigned int hscif2_data_a_mux[] = { + HRX2_A_MARK, HTX2_A_MARK, +}; +static const unsigned int hscif2_clk_a_pins[] = { + /* SCK */ + RCAR_GP_PIN(6, 10), +}; +static const unsigned int hscif2_clk_a_mux[] = { + HSCK2_A_MARK, +}; +static const unsigned int hscif2_ctrl_a_pins[] = { + /* RTS, CTS */ + RCAR_GP_PIN(6, 7), RCAR_GP_PIN(6, 6), +}; +static const unsigned int hscif2_ctrl_a_mux[] = { + HRTS2_N_A_MARK, HCTS2_N_A_MARK, +}; + +static const unsigned int hscif2_data_b_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(6, 17), RCAR_GP_PIN(6, 18), +}; +static const unsigned int hscif2_data_b_mux[] = { + HRX2_B_MARK, HTX2_B_MARK, +}; +static const unsigned int hscif2_clk_b_pins[] = { + /* SCK */ + RCAR_GP_PIN(6, 21), +}; +static const unsigned int hscif2_clk_b_mux[] = { + HSCK1_B_MARK, +}; +static const unsigned int hscif2_ctrl_b_pins[] = { + /* RTS, CTS */ + RCAR_GP_PIN(6, 20), RCAR_GP_PIN(6, 19), +}; +static const unsigned int hscif2_ctrl_b_mux[] = { + HRTS2_N_B_MARK, HCTS2_N_B_MARK, +}; + +static const unsigned int hscif2_data_c_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(6, 25), RCAR_GP_PIN(6, 26), +}; +static const unsigned int hscif2_data_c_mux[] = { + HRX2_C_MARK, HTX2_C_MARK, +}; +static const unsigned int hscif2_clk_c_pins[] = { + /* SCK */ + RCAR_GP_PIN(6, 24), +}; +static const unsigned int hscif2_clk_c_mux[] = { + HSCK1_C_MARK, +}; +static const unsigned int hscif2_ctrl_c_pins[] = { + /* RTS, CTS */ + RCAR_GP_PIN(6, 28), RCAR_GP_PIN(6, 27), +}; +static const unsigned int hscif2_ctrl_c_mux[] = { + HRTS2_N_C_MARK, HCTS2_N_C_MARK, +}; +/* - HSCIF3 ----------------------------------------------------------------- */ +static const unsigned int hscif3_data_a_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 24), +}; +static const unsigned int hscif3_data_a_mux[] = { + HRX3_A_MARK, HTX3_A_MARK, +}; +static const unsigned int hscif3_clk_pins[] = { + /* SCK */ + RCAR_GP_PIN(1, 22), +}; +static const unsigned int hscif3_clk_mux[] = { + HSCK3_MARK, +}; +static const unsigned int hscif3_ctrl_pins[] = { + /* RTS, CTS */ + RCAR_GP_PIN(1, 26), RCAR_GP_PIN(1, 25), +}; +static const unsigned int hscif3_ctrl_mux[] = { + HRTS3_N_MARK, HCTS3_N_MARK, +}; + +static const unsigned int hscif3_data_b_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(0, 10), RCAR_GP_PIN(0, 11), +}; +static const unsigned int hscif3_data_b_mux[] = { + HRX3_B_MARK, HTX3_B_MARK, +}; +static const unsigned int hscif3_data_c_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15), +}; +static const unsigned int hscif3_data_c_mux[] = { + HRX3_C_MARK, HTX3_C_MARK, +}; +static const unsigned int hscif3_data_d_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 8), +}; +static const unsigned int hscif3_data_d_mux[] = { + HRX3_D_MARK, HTX3_D_MARK, +}; +/* - HSCIF4 ----------------------------------------------------------------- */ +static const unsigned int hscif4_data_a_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 13), +}; +static const unsigned int hscif4_data_a_mux[] = { + HRX4_A_MARK, HTX4_A_MARK, +}; +static const unsigned int hscif4_clk_pins[] = { + /* SCK */ + RCAR_GP_PIN(1, 11), +}; +static const unsigned int hscif4_clk_mux[] = { + HSCK4_MARK, +}; +static const unsigned int hscif4_ctrl_pins[] = { + /* RTS, CTS */ + RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14), +}; +static const unsigned int hscif4_ctrl_mux[] = { + HRTS4_N_MARK, HCTS3_N_MARK, +}; + +static const unsigned int hscif4_data_b_pins[] = { + /* RX, TX */ + RCAR_GP_PIN(1, 8), RCAR_GP_PIN(1, 11), +}; +static const unsigned int hscif4_data_b_mux[] = { + HRX4_B_MARK, HTX4_B_MARK, +}; + /* - SCIF0 ------------------------------------------------------------------ */ static const unsigned int scif0_data_pins[] = { /* RX, TX */ @@ -1912,6 +2119,34 @@ static const unsigned int sdhi3_ds_mux[] = { }; static const struct sh_pfc_pin_group pinmux_groups[] = { + SH_PFC_PIN_GROUP(hscif0_data), + SH_PFC_PIN_GROUP(hscif0_clk), + SH_PFC_PIN_GROUP(hscif0_ctrl), + SH_PFC_PIN_GROUP(hscif1_data_a), + SH_PFC_PIN_GROUP(hscif1_clk_a), + SH_PFC_PIN_GROUP(hscif1_ctrl_a), + SH_PFC_PIN_GROUP(hscif1_data_b), + SH_PFC_PIN_GROUP(hscif1_clk_b), + SH_PFC_PIN_GROUP(hscif1_ctrl_b), + SH_PFC_PIN_GROUP(hscif2_data_a), + SH_PFC_PIN_GROUP(hscif2_clk_a), + SH_PFC_PIN_GROUP(hscif2_ctrl_a), + SH_PFC_PIN_GROUP(hscif2_data_b), + SH_PFC_PIN_GROUP(hscif2_clk_b), + SH_PFC_PIN_GROUP(hscif2_ctrl_b), + SH_PFC_PIN_GROUP(hscif2_data_c), + SH_PFC_PIN_GROUP(hscif2_clk_c), + SH_PFC_PIN_GROUP(hscif2_ctrl_c), + SH_PFC_PIN_GROUP(hscif3_data_a), + SH_PFC_PIN_GROUP(hscif3_clk), + SH_PFC_PIN_GROUP(hscif3_ctrl), + SH_PFC_PIN_GROUP(hscif3_data_b), + SH_PFC_PIN_GROUP(hscif3_data_c), + SH_PFC_PIN_GROUP(hscif3_data_d), + SH_PFC_PIN_GROUP(hscif4_data_a), + SH_PFC_PIN_GROUP(hscif4_clk), + SH_PFC_PIN_GROUP(hscif4_ctrl), + SH_PFC_PIN_GROUP(hscif4_data_b), SH_PFC_PIN_GROUP(scif0_data), SH_PFC_PIN_GROUP(scif0_clk), SH_PFC_PIN_GROUP(scif0_ctrl), @@ -1969,6 +2204,49 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { SH_PFC_PIN_GROUP(sdhi3_ds), }; +static const char * const hscif0_groups[] = { + "hscif0_data", + "hscif0_clk", + "hscif0_ctrl", +}; + +static const char * const hscif1_groups[] = { + "hscif1_data_a", + "hscif1_clk_a", + "hscif1_ctrl_a", + "hscif1_data_b", + "hscif1_clk_b", + "hscif1_ctrl_b", +}; + +static const char * const hscif2_groups[] = { + "hscif2_data_a", + "hscif2_clk_a", + "hscif2_ctrl_a", + "hscif2_data_b", + "hscif2_clk_b", + "hscif2_ctrl_b", + "hscif2_data_c", + "hscif2_clk_c", + "hscif2_ctrl_c", +}; + +static const char * const hscif3_groups[] = { + "hscif3_data_a", + "hscif3_clk", + "hscif3_ctrl", + "hscif3_data_b", + "hscif3_data_c", + "hscif3_data_d", +}; + +static const char * const hscif4_groups[] = { + "hscif4_data_a", + "hscif4_clk", + "hscif4_ctrl", + "hscif4_data_b", +}; + static const char * const scif0_groups[] = { "scif0_data", "scif0_clk", @@ -2058,6 +2336,11 @@ static const char * const sdhi3_groups[] = { }; static const struct sh_pfc_function pinmux_functions[] = { + SH_PFC_FUNCTION(hscif0), + SH_PFC_FUNCTION(hscif1), + SH_PFC_FUNCTION(hscif2), + SH_PFC_FUNCTION(hscif3), + SH_PFC_FUNCTION(hscif4), SH_PFC_FUNCTION(scif0), SH_PFC_FUNCTION(scif1), SH_PFC_FUNCTION(scif2), -- 2.7.4 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH v2 2/4] pinctrl: sh-pfc: r8a7796: Add HSCIF pins, groups, and functions 2016-12-07 16:44 ` [PATCH v2 2/4] pinctrl: sh-pfc: r8a7796: Add HSCIF pins, groups, and functions Ulrich Hecht @ 2016-12-09 9:56 ` Geert Uytterhoeven 2016-12-13 9:40 ` Geert Uytterhoeven 1 sibling, 0 replies; 15+ messages in thread From: Geert Uytterhoeven @ 2016-12-09 9:56 UTC (permalink / raw) To: Ulrich Hecht; +Cc: Linux-Renesas, Simon Horman, Magnus Damm Hi Ulrich, On Wed, Dec 7, 2016 at 5:44 PM, Ulrich Hecht <ulrich.hecht+renesas@gmail.com> wrote: > Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> > --- > drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 283 +++++++++++++++++++++++++++++++++++ > 1 file changed, 283 insertions(+) > > diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c > index dc9b671..ed4a877 100644 > --- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c > +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c > +static const unsigned int hscif2_clk_b_mux[] = { > + HSCK1_B_MARK, HSCK2_B_MARK > +}; > +static const unsigned int hscif2_clk_c_mux[] = { > + HSCK1_C_MARK, drivers/pinctrl/sh-pfc/pfc-r8a7796.c:2124:2: error: 'HSCK1_C_MARK' undeclared here (not in a function) HSCK2_C_MARK > +}; Queued in sh-pfc-for-v4.11 after rebasing, resorting, and fixing up the above. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v2 2/4] pinctrl: sh-pfc: r8a7796: Add HSCIF pins, groups, and functions 2016-12-07 16:44 ` [PATCH v2 2/4] pinctrl: sh-pfc: r8a7796: Add HSCIF pins, groups, and functions Ulrich Hecht 2016-12-09 9:56 ` Geert Uytterhoeven @ 2016-12-13 9:40 ` Geert Uytterhoeven 1 sibling, 0 replies; 15+ messages in thread From: Geert Uytterhoeven @ 2016-12-13 9:40 UTC (permalink / raw) To: Ulrich Hecht; +Cc: Linux-Renesas, Simon Horman, Magnus Damm On Wed, Dec 7, 2016 at 5:44 PM, Ulrich Hecht <ulrich.hecht+renesas@gmail.com> wrote: > Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> > --- > drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 283 +++++++++++++++++++++++++++++++++++ > 1 file changed, 283 insertions(+) > > diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c > index dc9b671..ed4a877 100644 > --- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c > +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c > +/* - HSCIF4 ----------------------------------------------------------------- */ > +static const unsigned int hscif4_ctrl_mux[] = { > + HRTS4_N_MARK, HCTS3_N_MARK, HCTS4_N_MARK Fixing up... > +}; Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v2 3/4] arm64: renesas: r8a7796 dtsi: Add all HSCIF nodes 2016-12-07 16:44 [PATCH v2 0/4] r8a7796 HSCIF integration Ulrich Hecht 2016-12-07 16:44 ` [PATCH v2 1/4] clk: shmobile: r8a7796: Add HSCIF clocks Ulrich Hecht 2016-12-07 16:44 ` [PATCH v2 2/4] pinctrl: sh-pfc: r8a7796: Add HSCIF pins, groups, and functions Ulrich Hecht @ 2016-12-07 16:44 ` Ulrich Hecht 2016-12-08 9:09 ` Sergei Shtylyov 2016-12-07 16:44 ` [PATCH v2 4/4] arm64: renesas: r8a7796: Enable HSCIF DMA Ulrich Hecht 2016-12-08 13:36 ` [PATCH v2 0/4] r8a7796 HSCIF integration Simon Horman 4 siblings, 1 reply; 15+ messages in thread From: Ulrich Hecht @ 2016-12-07 16:44 UTC (permalink / raw) To: linux-renesas-soc, horms, geert; +Cc: magnus.damm, Ulrich Hecht Add the device nodes for all HSCIF serial ports, incl. clocks, and clock domain. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> --- arch/arm64/boot/dts/renesas/r8a7796.dtsi | 70 ++++++++++++++++++++++++++++++++ 1 file changed, 70 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi index 7bf0f2f..c508e0f 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi @@ -421,6 +421,76 @@ }; }; + hscif0: serial@e6540000 { + compatible = "renesas,hscif-r8a7796", + "renesas,rcar-gen3-hscif", + "renesas,hscif"; + reg = <0 0xe6540000 0 96>; + interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 520>, + <&cpg CPG_CORE R8A7796_CLK_S3D1>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + status = "disabled"; + }; + + hscif1: serial@e6550000 { + compatible = "renesas,hscif-r8a7796", + "renesas,rcar-gen3-hscif", + "renesas,hscif"; + reg = <0 0xe6550000 0 96>; + interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 519>, + <&cpg CPG_CORE R8A7796_CLK_S3D1>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + status = "disabled"; + }; + + hscif2: serial@e6560000 { + compatible = "renesas,hscif-r8a7796", + "renesas,rcar-gen3-hscif", + "renesas,hscif"; + reg = <0 0xe6560000 0 96>; + interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 518>, + <&cpg CPG_CORE R8A7796_CLK_S3D1>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + status = "disabled"; + }; + + hscif3: serial@e66a0000 { + compatible = "renesas,hscif-r8a7796", + "renesas,rcar-gen3-hscif", + "renesas,hscif"; + reg = <0 0xe66a0000 0 96>; + interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 517>, + <&cpg CPG_CORE R8A7796_CLK_S3D1>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + status = "disabled"; + }; + + hscif4: serial@e66b0000 { + compatible = "renesas,hscif-r8a7796", + "renesas,rcar-gen3-hscif", + "renesas,hscif"; + reg = <0 0xe66b0000 0 96>; + interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 516>, + <&cpg CPG_CORE R8A7796_CLK_S3D1>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + status = "disabled"; + }; + scif2: serial@e6e88000 { compatible = "renesas,scif-r8a7796", "renesas,rcar-gen3-scif", "renesas,scif"; -- 2.7.4 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH v2 3/4] arm64: renesas: r8a7796 dtsi: Add all HSCIF nodes 2016-12-07 16:44 ` [PATCH v2 3/4] arm64: renesas: r8a7796 dtsi: Add all HSCIF nodes Ulrich Hecht @ 2016-12-08 9:09 ` Sergei Shtylyov 2017-02-13 12:01 ` Simon Horman 0 siblings, 1 reply; 15+ messages in thread From: Sergei Shtylyov @ 2016-12-08 9:09 UTC (permalink / raw) To: Ulrich Hecht, linux-renesas-soc, horms, geert; +Cc: magnus.damm On 12/7/2016 7:44 PM, Ulrich Hecht wrote: > Add the device nodes for all HSCIF serial ports, incl. clocks, and > clock domain. Not power domain? > Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> > --- > arch/arm64/boot/dts/renesas/r8a7796.dtsi | 70 ++++++++++++++++++++++++++++++++ > 1 file changed, 70 insertions(+) > > diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi > index 7bf0f2f..c508e0f 100644 > --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi > @@ -421,6 +421,76 @@ > }; > }; > > + hscif0: serial@e6540000 { > + compatible = "renesas,hscif-r8a7796", > + "renesas,rcar-gen3-hscif", > + "renesas,hscif"; > + reg = <0 0xe6540000 0 96>; 0xc0? > + interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cpg CPG_MOD 520>, > + <&cpg CPG_CORE R8A7796_CLK_S3D1>, > + <&scif_clk>; > + clock-names = "fck", "brg_int", "scif_clk"; > + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; > + status = "disabled"; > + }; > + > + hscif1: serial@e6550000 { > + compatible = "renesas,hscif-r8a7796", > + "renesas,rcar-gen3-hscif", > + "renesas,hscif"; > + reg = <0 0xe6550000 0 96>; Here as well? > + interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cpg CPG_MOD 519>, > + <&cpg CPG_CORE R8A7796_CLK_S3D1>, > + <&scif_clk>; > + clock-names = "fck", "brg_int", "scif_clk"; > + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; > + status = "disabled"; > + }; > + > + hscif2: serial@e6560000 { > + compatible = "renesas,hscif-r8a7796", > + "renesas,rcar-gen3-hscif", > + "renesas,hscif"; > + reg = <0 0xe6560000 0 96>; And here... > + interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cpg CPG_MOD 518>, > + <&cpg CPG_CORE R8A7796_CLK_S3D1>, > + <&scif_clk>; > + clock-names = "fck", "brg_int", "scif_clk"; > + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; > + status = "disabled"; > + }; > + > + hscif3: serial@e66a0000 { > + compatible = "renesas,hscif-r8a7796", > + "renesas,rcar-gen3-hscif", > + "renesas,hscif"; > + reg = <0 0xe66a0000 0 96>; And here... > + interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cpg CPG_MOD 517>, > + <&cpg CPG_CORE R8A7796_CLK_S3D1>, > + <&scif_clk>; > + clock-names = "fck", "brg_int", "scif_clk"; > + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; > + status = "disabled"; > + }; > + > + hscif4: serial@e66b0000 { > + compatible = "renesas,hscif-r8a7796", > + "renesas,rcar-gen3-hscif", > + "renesas,hscif"; > + reg = <0 0xe66b0000 0 96>; And here... > + interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cpg CPG_MOD 516>, > + <&cpg CPG_CORE R8A7796_CLK_S3D1>, > + <&scif_clk>; > + clock-names = "fck", "brg_int", "scif_clk"; > + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; > + status = "disabled"; > + }; > + > scif2: serial@e6e88000 { > compatible = "renesas,scif-r8a7796", > "renesas,rcar-gen3-scif", "renesas,scif"; MBR, Sergei ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v2 3/4] arm64: renesas: r8a7796 dtsi: Add all HSCIF nodes 2016-12-08 9:09 ` Sergei Shtylyov @ 2017-02-13 12:01 ` Simon Horman 2017-02-13 12:06 ` Sergei Shtylyov 0 siblings, 1 reply; 15+ messages in thread From: Simon Horman @ 2017-02-13 12:01 UTC (permalink / raw) To: Sergei Shtylyov; +Cc: Ulrich Hecht, linux-renesas-soc, geert, magnus.damm On Thu, Dec 08, 2016 at 12:09:02PM +0300, Sergei Shtylyov wrote: > On 12/7/2016 7:44 PM, Ulrich Hecht wrote: > > >Add the device nodes for all HSCIF serial ports, incl. clocks, and > >clock domain. > > Not power domain? > > >Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> > >Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> > >--- > > arch/arm64/boot/dts/renesas/r8a7796.dtsi | 70 ++++++++++++++++++++++++++++++++ > > 1 file changed, 70 insertions(+) > > > >diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi > >index 7bf0f2f..c508e0f 100644 > >--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi > >+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi > >@@ -421,6 +421,76 @@ > > }; > > }; > > > >+ hscif0: serial@e6540000 { > >+ compatible = "renesas,hscif-r8a7796", > >+ "renesas,rcar-gen3-hscif", > >+ "renesas,hscif"; > >+ reg = <0 0xe6540000 0 96>; > > 0xc0? Do you mean 96 should be 0xc0 (= 192 = 2 * 96) ? If so, perhaps the r8a7795 needs updating too? ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v2 3/4] arm64: renesas: r8a7796 dtsi: Add all HSCIF nodes 2017-02-13 12:01 ` Simon Horman @ 2017-02-13 12:06 ` Sergei Shtylyov 2017-02-13 13:03 ` Simon Horman 0 siblings, 1 reply; 15+ messages in thread From: Sergei Shtylyov @ 2017-02-13 12:06 UTC (permalink / raw) To: Simon Horman; +Cc: Ulrich Hecht, linux-renesas-soc, geert, magnus.damm Hello! On 2/13/2017 3:01 PM, Simon Horman wrote: >>> Add the device nodes for all HSCIF serial ports, incl. clocks, and >>> clock domain. >> >> Not power domain? >> >>> Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> >>> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> >>> --- >>> arch/arm64/boot/dts/renesas/r8a7796.dtsi | 70 ++++++++++++++++++++++++++++++++ >>> 1 file changed, 70 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi >>> index 7bf0f2f..c508e0f 100644 >>> --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi >>> +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi >>> @@ -421,6 +421,76 @@ >>> }; >>> }; >>> >>> + hscif0: serial@e6540000 { >>> + compatible = "renesas,hscif-r8a7796", >>> + "renesas,rcar-gen3-hscif", >>> + "renesas,hscif"; >>> + reg = <0 0xe6540000 0 96>; >> >> 0xc0? > > Do you mean 96 should be 0xc0 (= 192 = 2 * 96) ? Oops! 0x60, of course. > If so, perhaps the r8a7795 needs updating too? Probably. MBR, Sergei ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v2 3/4] arm64: renesas: r8a7796 dtsi: Add all HSCIF nodes 2017-02-13 12:06 ` Sergei Shtylyov @ 2017-02-13 13:03 ` Simon Horman 0 siblings, 0 replies; 15+ messages in thread From: Simon Horman @ 2017-02-13 13:03 UTC (permalink / raw) To: Sergei Shtylyov; +Cc: Ulrich Hecht, linux-renesas-soc, geert, magnus.damm On Mon, Feb 13, 2017 at 03:06:21PM +0300, Sergei Shtylyov wrote: > Hello! > > On 2/13/2017 3:01 PM, Simon Horman wrote: > > >>>Add the device nodes for all HSCIF serial ports, incl. clocks, and > >>>clock domain. > >> > >> Not power domain? > >> > >>>Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> > >>>Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> > >>>--- > >>>arch/arm64/boot/dts/renesas/r8a7796.dtsi | 70 ++++++++++++++++++++++++++++++++ > >>>1 file changed, 70 insertions(+) > >>> > >>>diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi > >>>index 7bf0f2f..c508e0f 100644 > >>>--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi > >>>+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi > >>>@@ -421,6 +421,76 @@ > >>> }; > >>> }; > >>> > >>>+ hscif0: serial@e6540000 { > >>>+ compatible = "renesas,hscif-r8a7796", > >>>+ "renesas,rcar-gen3-hscif", > >>>+ "renesas,hscif"; > >>>+ reg = <0 0xe6540000 0 96>; > >> > >> 0xc0? > > > >Do you mean 96 should be 0xc0 (= 192 = 2 * 96) ? > > Oops! 0x60, of course. Thanks, I queued up this patch after - s/clock domain/power domain/ in changelog - Updating to use 0x60 as you suggest above. > >If so, perhaps the r8a7795 needs updating too? Thanks, I'll see about sending an update. ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v2 4/4] arm64: renesas: r8a7796: Enable HSCIF DMA 2016-12-07 16:44 [PATCH v2 0/4] r8a7796 HSCIF integration Ulrich Hecht ` (2 preceding siblings ...) 2016-12-07 16:44 ` [PATCH v2 3/4] arm64: renesas: r8a7796 dtsi: Add all HSCIF nodes Ulrich Hecht @ 2016-12-07 16:44 ` Ulrich Hecht 2016-12-09 9:58 ` Geert Uytterhoeven 2016-12-08 13:36 ` [PATCH v2 0/4] r8a7796 HSCIF integration Simon Horman 4 siblings, 1 reply; 15+ messages in thread From: Ulrich Hecht @ 2016-12-07 16:44 UTC (permalink / raw) To: linux-renesas-soc, horms, geert; +Cc: magnus.damm, Ulrich Hecht Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> --- arch/arm64/boot/dts/renesas/r8a7796.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi index c508e0f..748a2c2 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi @@ -431,6 +431,9 @@ <&cpg CPG_CORE R8A7796_CLK_S3D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac1 0x31>, <&dmac1 0x30>, + <&dmac2 0x31>, <&dmac2 0x30>; + dma-names = "tx", "rx", "tx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; status = "disabled"; }; @@ -445,6 +448,9 @@ <&cpg CPG_CORE R8A7796_CLK_S3D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac1 0x33>, <&dmac1 0x32>, + <&dmac2 0x33>, <&dmac2 0x32>; + dma-names = "tx", "rx", "tx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; status = "disabled"; }; @@ -459,6 +465,9 @@ <&cpg CPG_CORE R8A7796_CLK_S3D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac1 0x35>, <&dmac1 0x34>, + <&dmac2 0x35>, <&dmac2 0x34>; + dma-names = "tx", "rx", "tx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; status = "disabled"; }; @@ -473,6 +482,8 @@ <&cpg CPG_CORE R8A7796_CLK_S3D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac0 0x37>, <&dmac0 0x36>; + dma-names = "tx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; status = "disabled"; }; @@ -487,6 +498,8 @@ <&cpg CPG_CORE R8A7796_CLK_S3D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac0 0x39>, <&dmac0 0x38>; + dma-names = "tx", "rx"; power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; status = "disabled"; }; -- 2.7.4 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH v2 4/4] arm64: renesas: r8a7796: Enable HSCIF DMA 2016-12-07 16:44 ` [PATCH v2 4/4] arm64: renesas: r8a7796: Enable HSCIF DMA Ulrich Hecht @ 2016-12-09 9:58 ` Geert Uytterhoeven 2017-03-02 15:05 ` Simon Horman 0 siblings, 1 reply; 15+ messages in thread From: Geert Uytterhoeven @ 2016-12-09 9:58 UTC (permalink / raw) To: Ulrich Hecht; +Cc: Linux-Renesas, Simon Horman, Magnus Damm On Wed, Dec 7, 2016 at 5:44 PM, Ulrich Hecht <ulrich.hecht+renesas@gmail.com> wrote: > Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v2 4/4] arm64: renesas: r8a7796: Enable HSCIF DMA 2016-12-09 9:58 ` Geert Uytterhoeven @ 2017-03-02 15:05 ` Simon Horman 0 siblings, 0 replies; 15+ messages in thread From: Simon Horman @ 2017-03-02 15:05 UTC (permalink / raw) To: Geert Uytterhoeven; +Cc: Ulrich Hecht, Linux-Renesas, Magnus Damm On Fri, Dec 09, 2016 at 10:58:25AM +0100, Geert Uytterhoeven wrote: > On Wed, Dec 7, 2016 at 5:44 PM, Ulrich Hecht > <ulrich.hecht+renesas@gmail.com> wrote: > > Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Thanks, I have queued this up for v4.12. ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v2 0/4] r8a7796 HSCIF integration 2016-12-07 16:44 [PATCH v2 0/4] r8a7796 HSCIF integration Ulrich Hecht ` (3 preceding siblings ...) 2016-12-07 16:44 ` [PATCH v2 4/4] arm64: renesas: r8a7796: Enable HSCIF DMA Ulrich Hecht @ 2016-12-08 13:36 ` Simon Horman 4 siblings, 0 replies; 15+ messages in thread From: Simon Horman @ 2016-12-08 13:36 UTC (permalink / raw) To: Ulrich Hecht; +Cc: linux-renesas-soc, geert, magnus.damm, Sergei Shtylyov On Wed, Dec 07, 2016 at 05:44:44PM +0100, Ulrich Hecht wrote: > Hi! > > This revision adds dmac2 references and Reviewed-bys where appropriate, plus > the missing C pin group for HSCIF2. > > (Unlike the SCIF series, the DMA assignments in this one are not completely > bogus. Go figure.) > > Based on renesas-devel-20161207-v4.9-rc8. Hi Ulrich, please consider addressing Sergei's review of patch #4 and reposting as appropriate. ^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2017-03-02 15:07 UTC | newest] Thread overview: 15+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2016-12-07 16:44 [PATCH v2 0/4] r8a7796 HSCIF integration Ulrich Hecht 2016-12-07 16:44 ` [PATCH v2 1/4] clk: shmobile: r8a7796: Add HSCIF clocks Ulrich Hecht 2016-12-09 8:59 ` Geert Uytterhoeven 2016-12-07 16:44 ` [PATCH v2 2/4] pinctrl: sh-pfc: r8a7796: Add HSCIF pins, groups, and functions Ulrich Hecht 2016-12-09 9:56 ` Geert Uytterhoeven 2016-12-13 9:40 ` Geert Uytterhoeven 2016-12-07 16:44 ` [PATCH v2 3/4] arm64: renesas: r8a7796 dtsi: Add all HSCIF nodes Ulrich Hecht 2016-12-08 9:09 ` Sergei Shtylyov 2017-02-13 12:01 ` Simon Horman 2017-02-13 12:06 ` Sergei Shtylyov 2017-02-13 13:03 ` Simon Horman 2016-12-07 16:44 ` [PATCH v2 4/4] arm64: renesas: r8a7796: Enable HSCIF DMA Ulrich Hecht 2016-12-09 9:58 ` Geert Uytterhoeven 2017-03-02 15:05 ` Simon Horman 2016-12-08 13:36 ` [PATCH v2 0/4] r8a7796 HSCIF integration Simon Horman
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