From: Shawn Guo <shawnguo@kernel.org>
To: Scott Wood <oss@buserror.net>
Cc: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@codeaurora.org>,
"Z.Q. Hou" <zhiqiang.hou@nxp.com>,
"Y.T. Tang" <yuantian.tang@nxp.com>,
"Y.B. Lu" <yangbo.lu@nxp.com>,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 2/3] arm64: dts: ls1012a: Add coreclk
Date: Sat, 28 Jan 2017 09:36:44 +0800 [thread overview]
Message-ID: <20170128013642.GF5662@dragon> (raw)
In-Reply-To: <1485332363-8434-2-git-send-email-oss@buserror.net>
On Wed, Jan 25, 2017 at 02:19:22AM -0600, Scott Wood wrote:
> ls1012a has separate input root clocks for core PLLs versus the platform
> PLL, with the latter described as sysclk in the hw docs.
>
> Signed-off-by: Scott Wood <oss@buserror.net>
> ---
> Note that current versions of U-Boot are blindly updating the frequency
> of all fixed-clock nodes. That needs to be fixed for the split input
> frequency to work properly, but until U-Boot is fixed this change doesn't
> make anything worse than it already was.
>
> arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 12 ++++++++++--
> 1 file changed, 10 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> index cffebb4..515f8488 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> @@ -66,10 +66,17 @@
> sysclk: sysclk {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> - clock-frequency = <100000000>;
> + clock-frequency = <125000000>;
Should we mention this change a bit in the commit log?
Shawn
> clock-output-names = "sysclk";
> };
>
> + coreclk: coreclk {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <100000000>;
> + clock-output-names = "coreclk";
> + };
> +
> timer {
> compatible = "arm,armv8-timer";
> interrupts = <1 13 IRQ_TYPE_LEVEL_LOW>,/* Physical Secure PPI */
> @@ -124,7 +131,8 @@
> compatible = "fsl,ls1012a-clockgen";
> reg = <0x0 0x1ee1000 0x0 0x1000>;
> #clock-cells = <2>;
> - clocks = <&sysclk>;
> + clocks = <&sysclk &coreclk>;
> + clock-names = "sysclk", "coreclk";
> };
>
> i2c0: i2c@2180000 {
> --
> 2.7.4
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: shawnguo@kernel.org (Shawn Guo)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/3] arm64: dts: ls1012a: Add coreclk
Date: Sat, 28 Jan 2017 09:36:44 +0800 [thread overview]
Message-ID: <20170128013642.GF5662@dragon> (raw)
In-Reply-To: <1485332363-8434-2-git-send-email-oss@buserror.net>
On Wed, Jan 25, 2017 at 02:19:22AM -0600, Scott Wood wrote:
> ls1012a has separate input root clocks for core PLLs versus the platform
> PLL, with the latter described as sysclk in the hw docs.
>
> Signed-off-by: Scott Wood <oss@buserror.net>
> ---
> Note that current versions of U-Boot are blindly updating the frequency
> of all fixed-clock nodes. That needs to be fixed for the split input
> frequency to work properly, but until U-Boot is fixed this change doesn't
> make anything worse than it already was.
>
> arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 12 ++++++++++--
> 1 file changed, 10 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> index cffebb4..515f8488 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
> @@ -66,10 +66,17 @@
> sysclk: sysclk {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> - clock-frequency = <100000000>;
> + clock-frequency = <125000000>;
Should we mention this change a bit in the commit log?
Shawn
> clock-output-names = "sysclk";
> };
>
> + coreclk: coreclk {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <100000000>;
> + clock-output-names = "coreclk";
> + };
> +
> timer {
> compatible = "arm,armv8-timer";
> interrupts = <1 13 IRQ_TYPE_LEVEL_LOW>,/* Physical Secure PPI */
> @@ -124,7 +131,8 @@
> compatible = "fsl,ls1012a-clockgen";
> reg = <0x0 0x1ee1000 0x0 0x1000>;
> #clock-cells = <2>;
> - clocks = <&sysclk>;
> + clocks = <&sysclk &coreclk>;
> + clock-names = "sysclk", "coreclk";
> };
>
> i2c0: i2c at 2180000 {
> --
> 2.7.4
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2017-01-28 1:36 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-25 8:19 [PATCH 1/3] dt-bindings: qoriq-clock: Add coreclk Scott Wood
2017-01-25 8:19 ` Scott Wood
2017-01-25 8:19 ` [PATCH 2/3] arm64: dts: ls1012a: " Scott Wood
2017-01-25 8:19 ` Scott Wood
2017-01-28 1:36 ` Shawn Guo [this message]
2017-01-28 1:36 ` Shawn Guo
2017-01-25 8:19 ` [PATCH 3/3] clk: qoriq: Separate root input clock for core PLLs on ls1012a Scott Wood
2017-01-25 8:19 ` Scott Wood
2017-01-27 22:38 ` [PATCH 1/3] dt-bindings: qoriq-clock: Add coreclk Rob Herring
2017-01-27 22:38 ` Rob Herring
2017-01-27 23:51 ` Scott Wood
2017-01-27 23:51 ` Scott Wood
2017-01-27 23:51 ` Scott Wood
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