From: Scott Wood <oss@buserror.net>
To: Rob Herring <robh@kernel.org>
Cc: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@codeaurora.org>,
Shawn Guo <shawnguo@kernel.org>,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
"Y.B. Lu" <yangbo.lu@nxp.com>, "Z.Q. Hou" <zhiqiang.hou@nxp.com>,
"Y.T. Tang" <yuantian.tang@nxp.com>,
devicetree@vger.kernel.org
Subject: Re: [PATCH 1/3] dt-bindings: qoriq-clock: Add coreclk
Date: Fri, 27 Jan 2017 17:51:42 -0600 [thread overview]
Message-ID: <1485561102.9266.8.camel@buserror.net> (raw)
In-Reply-To: <20170127223819.mzovhnnpths5t5w2@rob-hp-laptop>
On Fri, 2017-01-27 at 16:38 -0600, Rob Herring wrote:
> On Wed, Jan 25, 2017 at 02:19:21AM -0600, Scott Wood wrote:
> >
> > ls1012a has separate input root clocks for core PLLs versus the platform
> > PLL, with the latter described as sysclk in the hw docs.
> >
> > Update the qoriq-clock binding to allow a second input clock, named
> > "coreclk". If present, this clock will be used for the core PLLs.
> >
> > Signed-off-by: Scott Wood <oss@buserror.net>
> > Cc: devicetree@vger.kernel.org
> > ---
> > Documentation/devicetree/bindings/clock/qoriq-clock.txt | 6 ++++++
> > 1 file changed, 6 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> > b/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> > index df9cb5a..97a9666 100644
> > --- a/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> > +++ b/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> > @@ -55,6 +55,11 @@ Optional properties:
> > - clocks: If clock-frequency is not specified, sysclk may be provided
> > as an input clock. Either clock-frequency or clocks must be
> > provided.
> > + A second input clock, called "coreclk", may be provided if
> > + core PLLs are based on a different input clock from the
> > + platform PLL.
> > +- clock-names: Required if a coreclk is present. Valid names are
> > + "sysclk" and "coreclk".
> 'clk' part is redundant.
"sysclk" is a term used by the hardware documentation and I'd rather leave it
intact. "coreclk" isn't named (only described) by the hardware documentation
but it is a special variant of sysclk and having similar naming helps make
that clear.
-Scott
WARNING: multiple messages have this Message-ID (diff)
From: oss@buserror.net (Scott Wood)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/3] dt-bindings: qoriq-clock: Add coreclk
Date: Fri, 27 Jan 2017 17:51:42 -0600 [thread overview]
Message-ID: <1485561102.9266.8.camel@buserror.net> (raw)
In-Reply-To: <20170127223819.mzovhnnpths5t5w2@rob-hp-laptop>
On Fri, 2017-01-27 at 16:38 -0600, Rob Herring wrote:
> On Wed, Jan 25, 2017 at 02:19:21AM -0600, Scott Wood wrote:
> >
> > ls1012a has separate input root clocks for core PLLs versus the platform
> > PLL, with the latter described as sysclk in the hw docs.
> >
> > Update the qoriq-clock binding to allow a second input clock, named
> > "coreclk".??If present, this clock will be used for the core PLLs.
> >
> > Signed-off-by: Scott Wood <oss@buserror.net>
> > Cc: devicetree at vger.kernel.org
> > ---
> > ?Documentation/devicetree/bindings/clock/qoriq-clock.txt | 6 ++++++
> > ?1 file changed, 6 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> > b/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> > index df9cb5a..97a9666 100644
> > --- a/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> > +++ b/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> > @@ -55,6 +55,11 @@ Optional properties:
> > ?- clocks: If clock-frequency is not specified, sysclk may be provided
> > ? as an input clock.??Either clock-frequency or clocks must be
> > ? provided.
> > + A second input clock, called "coreclk", may be provided if
> > + core PLLs are based on a different input clock from the
> > + platform PLL.
> > +- clock-names: Required if a coreclk is present.??Valid names are
> > + "sysclk" and "coreclk".
> 'clk' part is redundant.
"sysclk" is a term used by the hardware documentation and I'd rather leave it
intact. ?"coreclk" isn't named (only described) by the hardware documentation
but it is a special variant of sysclk and having similar naming helps make
that clear.
-Scott
WARNING: multiple messages have this Message-ID (diff)
From: Scott Wood <oss@buserror.net>
To: Rob Herring <robh@kernel.org>
Cc: devicetree@vger.kernel.org, "Z.Q. Hou" <zhiqiang.hou@nxp.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@codeaurora.org>,
"Y.T. Tang" <yuantian.tang@nxp.com>,
"Y.B. Lu" <yangbo.lu@nxp.com>, Shawn Guo <shawnguo@kernel.org>,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 1/3] dt-bindings: qoriq-clock: Add coreclk
Date: Fri, 27 Jan 2017 17:51:42 -0600 [thread overview]
Message-ID: <1485561102.9266.8.camel@buserror.net> (raw)
In-Reply-To: <20170127223819.mzovhnnpths5t5w2@rob-hp-laptop>
On Fri, 2017-01-27 at 16:38 -0600, Rob Herring wrote:
> On Wed, Jan 25, 2017 at 02:19:21AM -0600, Scott Wood wrote:
> >
> > ls1012a has separate input root clocks for core PLLs versus the platform
> > PLL, with the latter described as sysclk in the hw docs.
> >
> > Update the qoriq-clock binding to allow a second input clock, named
> > "coreclk". If present, this clock will be used for the core PLLs.
> >
> > Signed-off-by: Scott Wood <oss@buserror.net>
> > Cc: devicetree@vger.kernel.org
> > ---
> > Documentation/devicetree/bindings/clock/qoriq-clock.txt | 6 ++++++
> > 1 file changed, 6 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> > b/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> > index df9cb5a..97a9666 100644
> > --- a/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> > +++ b/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> > @@ -55,6 +55,11 @@ Optional properties:
> > - clocks: If clock-frequency is not specified, sysclk may be provided
> > as an input clock. Either clock-frequency or clocks must be
> > provided.
> > + A second input clock, called "coreclk", may be provided if
> > + core PLLs are based on a different input clock from the
> > + platform PLL.
> > +- clock-names: Required if a coreclk is present. Valid names are
> > + "sysclk" and "coreclk".
> 'clk' part is redundant.
"sysclk" is a term used by the hardware documentation and I'd rather leave it
intact. "coreclk" isn't named (only described) by the hardware documentation
but it is a special variant of sysclk and having similar naming helps make
that clear.
-Scott
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next prev parent reply other threads:[~2017-01-27 23:51 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-25 8:19 [PATCH 1/3] dt-bindings: qoriq-clock: Add coreclk Scott Wood
2017-01-25 8:19 ` Scott Wood
2017-01-25 8:19 ` [PATCH 2/3] arm64: dts: ls1012a: " Scott Wood
2017-01-25 8:19 ` Scott Wood
2017-01-28 1:36 ` Shawn Guo
2017-01-28 1:36 ` Shawn Guo
2017-01-25 8:19 ` [PATCH 3/3] clk: qoriq: Separate root input clock for core PLLs on ls1012a Scott Wood
2017-01-25 8:19 ` Scott Wood
2017-01-27 22:38 ` [PATCH 1/3] dt-bindings: qoriq-clock: Add coreclk Rob Herring
2017-01-27 22:38 ` Rob Herring
2017-01-27 23:51 ` Scott Wood [this message]
2017-01-27 23:51 ` Scott Wood
2017-01-27 23:51 ` Scott Wood
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