* [PATCH 01/15] ARM: dts: alpine: fix PCIe node name @ 2017-03-22 2:02 ` Rob Herring 0 siblings, 0 replies; 78+ messages in thread From: Rob Herring @ 2017-03-22 2:02 UTC (permalink / raw) To: linux-arm-kernel PCIe bridges should have a node name of 'pcie'. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Tsahee Zidenberg <tsahee@annapurnalabs.com> Cc: Antoine Tenart <antoine.tenart@free-electrons.com> --- Sub-arch maintainers, please apply to your trees unless arm-soc wants to take the whole lot. arch/arm/boot/dts/alpine.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/alpine.dtsi b/arch/arm/boot/dts/alpine.dtsi index d0eefc3b886c..f09f9c8e178a 100644 --- a/arch/arm/boot/dts/alpine.dtsi +++ b/arch/arm/boot/dts/alpine.dtsi @@ -139,7 +139,7 @@ }; /* Internal PCIe Controller */ - pcie-internal at 0xfbc00000 { + pcie at fbc00000 { compatible = "pci-host-ecam-generic"; device_type = "pci"; #size-cells = <2>; -- 2.10.1 ^ permalink raw reply related [flat|nested] 78+ messages in thread
* [PATCH 01/15] ARM: dts: alpine: fix PCIe node name @ 2017-03-22 2:02 ` Rob Herring 0 siblings, 0 replies; 78+ messages in thread From: Rob Herring @ 2017-03-22 2:02 UTC (permalink / raw) To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, devicetree-u79uwXL29TY76Z2rM5mHXA Cc: arm-DgEjT+Ai2ygdnm+yROfE0A, Tsahee Zidenberg, Antoine Tenart PCIe bridges should have a node name of 'pcie'. Signed-off-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> Cc: Tsahee Zidenberg <tsahee-IEYhy/pPZWng2XuLRlxkFAC/G2K4zDHf@public.gmane.org> Cc: Antoine Tenart <antoine.tenart-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> --- Sub-arch maintainers, please apply to your trees unless arm-soc wants to take the whole lot. arch/arm/boot/dts/alpine.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/alpine.dtsi b/arch/arm/boot/dts/alpine.dtsi index d0eefc3b886c..f09f9c8e178a 100644 --- a/arch/arm/boot/dts/alpine.dtsi +++ b/arch/arm/boot/dts/alpine.dtsi @@ -139,7 +139,7 @@ }; /* Internal PCIe Controller */ - pcie-internal@0xfbc00000 { + pcie@fbc00000 { compatible = "pci-host-ecam-generic"; device_type = "pci"; #size-cells = <2>; -- 2.10.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply related [flat|nested] 78+ messages in thread
* [PATCH 02/15] ARM: dts: marvell: fix PCI bus dtc warnings [not found] ` <20170322020313.24338-1-robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> @ 2017-03-22 2:03 ` Rob Herring 2017-03-22 2:03 ` Rob Herring 2017-03-22 2:03 ` Rob Herring 2 siblings, 0 replies; 78+ messages in thread From: Rob Herring @ 2017-03-22 2:03 UTC (permalink / raw) To: linux-arm-kernel dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Gregory Clement <gregory.clement@free-electrons.com> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> --- Sub-arch maintainers, please apply to your trees unless arm-soc wants to take the whole lot. Documentation/devicetree/bindings/pci/mvebu-pci.txt | 2 +- arch/arm/boot/dts/armada-370.dtsi | 4 +++- arch/arm/boot/dts/armada-375.dtsi | 4 +++- arch/arm/boot/dts/armada-380.dtsi | 5 ++++- arch/arm/boot/dts/armada-385-db-ap.dts | 2 +- arch/arm/boot/dts/armada-385-linksys.dtsi | 2 +- arch/arm/boot/dts/armada-385-turris-omnia.dts | 2 +- arch/arm/boot/dts/armada-385.dtsi | 6 +++++- arch/arm/boot/dts/armada-388-clearfog.dts | 2 +- arch/arm/boot/dts/armada-388-clearfog.dtsi | 2 +- arch/arm/boot/dts/armada-388-db.dts | 2 +- arch/arm/boot/dts/armada-388-gp.dts | 2 +- arch/arm/boot/dts/armada-388-rd.dts | 2 +- arch/arm/boot/dts/armada-390-db.dts | 2 +- arch/arm/boot/dts/armada-395-gp.dts | 2 +- arch/arm/boot/dts/armada-398-db.dts | 2 +- arch/arm/boot/dts/armada-39x.dtsi | 6 +++++- arch/arm/boot/dts/armada-xp-98dx3236.dtsi | 3 ++- arch/arm/boot/dts/armada-xp-db.dts | 2 +- arch/arm/boot/dts/armada-xp-gp.dts | 2 +- arch/arm/boot/dts/armada-xp-mv78230.dtsi | 7 ++++++- arch/arm/boot/dts/armada-xp-mv78260.dtsi | 11 ++++++++++- arch/arm/boot/dts/armada-xp-mv78460.dtsi | 14 ++++++++++++-- arch/arm/boot/dts/dove-d3plug.dts | 4 ++-- arch/arm/boot/dts/dove.dtsi | 8 +++++--- arch/arm/boot/dts/kirkwood-6192.dtsi | 3 ++- arch/arm/boot/dts/kirkwood-6281.dtsi | 3 ++- arch/arm/boot/dts/kirkwood-6282.dtsi | 4 +++- arch/arm/boot/dts/kirkwood-98dx4122.dtsi | 3 ++- 29 files changed, 80 insertions(+), 33 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/mvebu-pci.txt b/Documentation/devicetree/bindings/pci/mvebu-pci.txt index 2de6f65ecfb1..e5af2e8461cf 100644 --- a/Documentation/devicetree/bindings/pci/mvebu-pci.txt +++ b/Documentation/devicetree/bindings/pci/mvebu-pci.txt @@ -286,7 +286,7 @@ pcie-controller { status = "disabled"; }; - pcie at 10,0 { + pcie at a,0 { device_type = "pci"; assigned-addresses = <0x82005000 0 0x82000 0 0x2000>; reg = <0x5000 0 0 0 0>; diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi index cc011c8bc36b..b9af7b22f0a0 100644 --- a/arch/arm/boot/dts/armada-370.dtsi +++ b/arch/arm/boot/dts/armada-370.dtsi @@ -72,7 +72,7 @@ reg = <MBUS_ID(0x01, 0xe0) 0 0x100000>; }; - pciec: pcie-controller at 82000000 { + pciec: pcie at 82000000 { compatible = "marvell,armada-370-pcie"; status = "disabled"; device_type = "pci"; @@ -100,6 +100,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 58>; marvell,pcie-port = <0>; @@ -117,6 +118,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 0x81000000 0 0 0x81000000 0x2 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 62>; marvell,pcie-port = <1>; diff --git a/arch/arm/boot/dts/armada-375.dtsi b/arch/arm/boot/dts/armada-375.dtsi index 50c5e8417802..7225c7ce9a8d 100644 --- a/arch/arm/boot/dts/armada-375.dtsi +++ b/arch/arm/boot/dts/armada-375.dtsi @@ -582,7 +582,7 @@ }; }; - pciec: pcie-controller at 82000000 { + pciec: pcie at 82000000 { compatible = "marvell,armada-370-pcie"; status = "disabled"; device_type = "pci"; @@ -610,6 +610,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; marvell,pcie-port = <0>; @@ -627,6 +628,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 0x81000000 0 0 0x81000000 0x2 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; marvell,pcie-port = <0>; diff --git a/arch/arm/boot/dts/armada-380.dtsi b/arch/arm/boot/dts/armada-380.dtsi index e392f6036f39..132596fd0860 100644 --- a/arch/arm/boot/dts/armada-380.dtsi +++ b/arch/arm/boot/dts/armada-380.dtsi @@ -71,7 +71,7 @@ }; }; - pcie-controller { + pcie { compatible = "marvell,armada-370-pcie"; status = "disabled"; device_type = "pci"; @@ -104,6 +104,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; marvell,pcie-port = <0>; @@ -122,6 +123,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 0x81000000 0 0 0x81000000 0x2 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; marvell,pcie-port = <1>; @@ -140,6 +142,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 0x81000000 0 0 0x81000000 0x3 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; marvell,pcie-port = <2>; diff --git a/arch/arm/boot/dts/armada-385-db-ap.dts b/arch/arm/boot/dts/armada-385-db-ap.dts index db5b9f6b615d..25d2d720dc0e 100644 --- a/arch/arm/boot/dts/armada-385-db-ap.dts +++ b/arch/arm/boot/dts/armada-385-db-ap.dts @@ -209,7 +209,7 @@ status = "okay"; }; - pcie-controller { + pcie { status = "okay"; /* diff --git a/arch/arm/boot/dts/armada-385-linksys.dtsi b/arch/arm/boot/dts/armada-385-linksys.dtsi index df47bf1ea5eb..39f62d5ef528 100644 --- a/arch/arm/boot/dts/armada-385-linksys.dtsi +++ b/arch/arm/boot/dts/armada-385-linksys.dtsi @@ -241,7 +241,7 @@ }; }; - pcie-controller { + pcie { status = "okay"; pcie at 1,0 { diff --git a/arch/arm/boot/dts/armada-385-turris-omnia.dts b/arch/arm/boot/dts/armada-385-turris-omnia.dts index 28eede180e4f..5511c84849ee 100644 --- a/arch/arm/boot/dts/armada-385-turris-omnia.dts +++ b/arch/arm/boot/dts/armada-385-turris-omnia.dts @@ -96,7 +96,7 @@ }; }; - pcie-controller { + pcie { status = "okay"; pcie at 1,0 { diff --git a/arch/arm/boot/dts/armada-385.dtsi b/arch/arm/boot/dts/armada-385.dtsi index 8e63be33472e..534bde3fc579 100644 --- a/arch/arm/boot/dts/armada-385.dtsi +++ b/arch/arm/boot/dts/armada-385.dtsi @@ -76,7 +76,7 @@ }; }; - pcie-controller { + pcie { compatible = "marvell,armada-370-pcie"; status = "disabled"; device_type = "pci"; @@ -115,6 +115,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; marvell,pcie-port = <0>; @@ -133,6 +134,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 0x81000000 0 0 0x81000000 0x2 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; marvell,pcie-port = <1>; @@ -151,6 +153,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 0x81000000 0 0 0x81000000 0x3 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; marvell,pcie-port = <2>; @@ -172,6 +175,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0 0x81000000 0 0 0x81000000 0x4 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; marvell,pcie-port = <3>; diff --git a/arch/arm/boot/dts/armada-388-clearfog.dts b/arch/arm/boot/dts/armada-388-clearfog.dts index 2745b7416313..df981c34aff6 100644 --- a/arch/arm/boot/dts/armada-388-clearfog.dts +++ b/arch/arm/boot/dts/armada-388-clearfog.dts @@ -62,7 +62,7 @@ }; }; - pcie-controller { + pcie { pcie at 3,0 { /* Port 2, Lane 0. CON2, nearest CPU. */ reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/armada-388-clearfog.dtsi b/arch/arm/boot/dts/armada-388-clearfog.dtsi index 0f5938bede53..68acfc968706 100644 --- a/arch/arm/boot/dts/armada-388-clearfog.dtsi +++ b/arch/arm/boot/dts/armada-388-clearfog.dtsi @@ -104,7 +104,7 @@ }; }; - pcie-controller { + pcie { status = "okay"; /* * The two PCIe units are accessible through diff --git a/arch/arm/boot/dts/armada-388-db.dts b/arch/arm/boot/dts/armada-388-db.dts index 1ac923826445..a4ec1fa37529 100644 --- a/arch/arm/boot/dts/armada-388-db.dts +++ b/arch/arm/boot/dts/armada-388-db.dts @@ -172,7 +172,7 @@ status = "okay"; }; - pcie-controller { + pcie { status = "okay"; /* * The two PCIe units are accessible through diff --git a/arch/arm/boot/dts/armada-388-gp.dts b/arch/arm/boot/dts/armada-388-gp.dts index 895fa6cfa15a..f2eb5464af1f 100644 --- a/arch/arm/boot/dts/armada-388-gp.dts +++ b/arch/arm/boot/dts/armada-388-gp.dts @@ -240,7 +240,7 @@ status = "okay"; }; - pcie-controller { + pcie { status = "okay"; /* * One PCIe units is accessible through diff --git a/arch/arm/boot/dts/armada-388-rd.dts b/arch/arm/boot/dts/armada-388-rd.dts index af82f275eac2..9cc3ca0376b9 100644 --- a/arch/arm/boot/dts/armada-388-rd.dts +++ b/arch/arm/boot/dts/armada-388-rd.dts @@ -117,7 +117,7 @@ }; }; - pcie-controller { + pcie { status = "okay"; /* * One PCIe units is accessible through diff --git a/arch/arm/boot/dts/armada-390-db.dts b/arch/arm/boot/dts/armada-390-db.dts index 2afed2ce4741..c718a5242595 100644 --- a/arch/arm/boot/dts/armada-390-db.dts +++ b/arch/arm/boot/dts/armada-390-db.dts @@ -123,7 +123,7 @@ }; }; - pcie-controller { + pcie { status = "okay"; /* CON30 */ diff --git a/arch/arm/boot/dts/armada-395-gp.dts b/arch/arm/boot/dts/armada-395-gp.dts index 2cdbba804c1e..ef491b524fd6 100644 --- a/arch/arm/boot/dts/armada-395-gp.dts +++ b/arch/arm/boot/dts/armada-395-gp.dts @@ -139,7 +139,7 @@ }; }; - pcie-controller { + pcie { status = "okay"; /* diff --git a/arch/arm/boot/dts/armada-398-db.dts b/arch/arm/boot/dts/armada-398-db.dts index e8604281c3c9..f0e0379f7619 100644 --- a/arch/arm/boot/dts/armada-398-db.dts +++ b/arch/arm/boot/dts/armada-398-db.dts @@ -118,7 +118,7 @@ }; }; - pcie-controller { + pcie { status = "okay"; pcie at 1,0 { diff --git a/arch/arm/boot/dts/armada-39x.dtsi b/arch/arm/boot/dts/armada-39x.dtsi index 60fbfd5907c7..ea657071e278 100644 --- a/arch/arm/boot/dts/armada-39x.dtsi +++ b/arch/arm/boot/dts/armada-39x.dtsi @@ -442,7 +442,7 @@ }; }; - pcie-controller { + pcie { compatible = "marvell,armada-370-pcie"; status = "disabled"; device_type = "pci"; @@ -481,6 +481,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; marvell,pcie-port = <0>; @@ -499,6 +500,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 0x81000000 0 0 0x81000000 0x2 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; marvell,pcie-port = <1>; @@ -517,6 +519,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 0x81000000 0 0 0x81000000 0x3 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; marvell,pcie-port = <2>; @@ -538,6 +541,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0 0x81000000 0 0 0x81000000 0x4 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; marvell,pcie-port = <3>; diff --git a/arch/arm/boot/dts/armada-xp-98dx3236.dtsi b/arch/arm/boot/dts/armada-xp-98dx3236.dtsi index f6a03dcee5ef..d79c66cd7ce5 100644 --- a/arch/arm/boot/dts/armada-xp-98dx3236.dtsi +++ b/arch/arm/boot/dts/armada-xp-98dx3236.dtsi @@ -81,7 +81,7 @@ /* * 98DX3236 has 1 x1 PCIe unit Gen2.0 */ - pciec: pcie-controller at 82000000 { + pciec: pcie at 82000000 { compatible = "marvell,armada-xp-pcie"; status = "disabled"; device_type = "pci"; @@ -107,6 +107,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 58>; marvell,pcie-port = <0>; diff --git a/arch/arm/boot/dts/armada-xp-db.dts b/arch/arm/boot/dts/armada-xp-db.dts index a33974254d8c..065282c21789 100644 --- a/arch/arm/boot/dts/armada-xp-db.dts +++ b/arch/arm/boot/dts/armada-xp-db.dts @@ -242,7 +242,7 @@ /* Port 2, Lane 0 */ status = "okay"; }; - pcie at 10,0 { + pcie at a,0 { /* Port 3, Lane 0 */ status = "okay"; }; diff --git a/arch/arm/boot/dts/armada-xp-gp.dts b/arch/arm/boot/dts/armada-xp-gp.dts index d62bf7bea1df..ac9eab8ac186 100644 --- a/arch/arm/boot/dts/armada-xp-gp.dts +++ b/arch/arm/boot/dts/armada-xp-gp.dts @@ -227,7 +227,7 @@ /* Port 2, Lane 0 */ status = "okay"; }; - pcie at 10,0 { + pcie at a,0 { /* Port 3, Lane 0 */ status = "okay"; }; diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi index 07c5090ecd29..9fef63d02b0a 100644 --- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi @@ -86,7 +86,7 @@ * configured as x4 or quad x1 lanes. One unit is * x1 only. */ - pciec: pcie-controller at 82000000 { + pciec: pcie at 82000000 { compatible = "marvell,armada-xp-pcie"; status = "disabled"; device_type = "pci"; @@ -123,6 +123,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 58>; marvell,pcie-port = <0>; @@ -140,6 +141,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 0x81000000 0 0 0x81000000 0x2 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 59>; marvell,pcie-port = <0>; @@ -157,6 +159,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 0x81000000 0 0 0x81000000 0x3 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 60>; marvell,pcie-port = <0>; @@ -174,6 +177,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0 0x81000000 0 0 0x81000000 0x4 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 61>; marvell,pcie-port = <0>; @@ -191,6 +195,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0 0x81000000 0 0 0x81000000 0x5 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 62>; marvell,pcie-port = <1>; diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi index 64e936ae7b22..c753ebd86d23 100644 --- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi @@ -87,7 +87,7 @@ * configured as x4 or quad x1 lanes. One unit is * x4 only. */ - pciec: pcie-controller at 82000000 { + pciec: pcie at 82000000 { compatible = "marvell,armada-xp-pcie"; status = "disabled"; device_type = "pci"; @@ -138,6 +138,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 58>; marvell,pcie-port = <0>; @@ -155,6 +156,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 0x81000000 0 0 0x81000000 0x2 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 59>; marvell,pcie-port = <0>; @@ -172,6 +174,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 0x81000000 0 0 0x81000000 0x3 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 60>; marvell,pcie-port = <0>; @@ -189,6 +192,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0 0x81000000 0 0 0x81000000 0x4 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 61>; marvell,pcie-port = <0>; @@ -206,6 +210,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0 0x81000000 0 0 0x81000000 0x5 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 62>; marvell,pcie-port = <1>; @@ -223,6 +228,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x6 0 1 0 0x81000000 0 0 0x81000000 0x6 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 63>; marvell,pcie-port = <1>; @@ -240,6 +246,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x7 0 1 0 0x81000000 0 0 0x81000000 0x7 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 64>; marvell,pcie-port = <1>; @@ -257,6 +264,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x8 0 1 0 0x81000000 0 0 0x81000000 0x8 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 65>; marvell,pcie-port = <1>; @@ -274,6 +282,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0 0x81000000 0 0 0x81000000 0x9 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 99>; marvell,pcie-port = <2>; diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi index d1383dde43eb..d294f27540ec 100644 --- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi @@ -104,7 +104,7 @@ * configured as x4 or quad x1 lanes. Two units are * x4/x1. */ - pciec: pcie-controller at 82000000 { + pciec: pcie at 82000000 { compatible = "marvell,armada-xp-pcie"; status = "disabled"; device_type = "pci"; @@ -159,6 +159,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 58>; marvell,pcie-port = <0>; @@ -176,6 +177,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 0x81000000 0 0 0x81000000 0x2 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 59>; marvell,pcie-port = <0>; @@ -193,6 +195,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 0x81000000 0 0 0x81000000 0x3 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 60>; marvell,pcie-port = <0>; @@ -210,6 +213,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0 0x81000000 0 0 0x81000000 0x4 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 61>; marvell,pcie-port = <0>; @@ -227,6 +231,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0 0x81000000 0 0 0x81000000 0x5 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 62>; marvell,pcie-port = <1>; @@ -244,6 +249,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x6 0 1 0 0x81000000 0 0 0x81000000 0x6 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 63>; marvell,pcie-port = <1>; @@ -261,6 +267,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x7 0 1 0 0x81000000 0 0 0x81000000 0x7 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 64>; marvell,pcie-port = <1>; @@ -278,6 +285,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x8 0 1 0 0x81000000 0 0 0x81000000 0x8 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 65>; marvell,pcie-port = <1>; @@ -295,6 +303,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0 0x81000000 0 0 0x81000000 0x9 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 99>; marvell,pcie-port = <2>; @@ -303,7 +312,7 @@ status = "disabled"; }; - pcie10: pcie at 10,0 { + pcie10: pcie at a,0 { device_type = "pci"; assigned-addresses = <0x82005000 0 0x82000 0 0x2000>; reg = <0x5000 0 0 0 0>; @@ -312,6 +321,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0xa 0 1 0 0x81000000 0 0 0x81000000 0xa 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 103>; marvell,pcie-port = <3>; diff --git a/arch/arm/boot/dts/dove-d3plug.dts b/arch/arm/boot/dts/dove-d3plug.dts index f5f59bb5a534..e88ff83f1dec 100644 --- a/arch/arm/boot/dts/dove-d3plug.dts +++ b/arch/arm/boot/dts/dove-d3plug.dts @@ -88,7 +88,7 @@ &pcie { status = "okay"; /* Fresco Logic USB3.0 xHCI controller */ - pcie-port at 0 { + pcie at 1 { status = "okay"; reset-gpios = <&gpio0 26 1>; reset-delay-us = <20000>; @@ -96,7 +96,7 @@ pinctrl-names = "default"; }; /* Mini-PCIe slot */ - pcie-port at 1 { + pcie at 2 { status = "okay"; reset-gpios = <&gpio0 25 1>; }; diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi index 698d58cea20d..1475d3672e56 100644 --- a/arch/arm/boot/dts/dove.dtsi +++ b/arch/arm/boot/dts/dove.dtsi @@ -89,7 +89,7 @@ MBUS_ID(0x03, 0x01) 0 0xc8000000 0x0100000 /* CESA SRAM 1M */ MBUS_ID(0x0d, 0x00) 0 0xf0000000 0x0100000>; /* PMU SRAM 1M */ - pcie: pcie-controller { + pcie: pcie { compatible = "marvell,dove-pcie"; status = "disabled"; device_type = "pci"; @@ -106,7 +106,7 @@ 0x82000000 0x2 0x0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 Mem */ 0x81000000 0x2 0x0 MBUS_ID(0x08, 0xe0) 0 1 0>; /* Port 1.0 I/O */ - pcie0: pcie-port at 0 { + pcie0: pcie at 1 { device_type = "pci"; status = "disabled"; assigned-addresses = <0x82000800 0 0x40000 0 0x2000>; @@ -118,13 +118,14 @@ #size-cells = <2>; ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; + bus-range = <0x00 0xff>; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &intc 16>; }; - pcie1: pcie-port at 1 { + pcie1: pcie at 2 { device_type = "pci"; status = "disabled"; assigned-addresses = <0x82002800 0 0x80000 0 0x2000>; @@ -136,6 +137,7 @@ #size-cells = <2>; ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 0x81000000 0 0 0x81000000 0x2 0 1 0>; + bus-range = <0x00 0xff>; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0>; diff --git a/arch/arm/boot/dts/kirkwood-6192.dtsi b/arch/arm/boot/dts/kirkwood-6192.dtsi index d573e03f3134..f003f3f1bd65 100644 --- a/arch/arm/boot/dts/kirkwood-6192.dtsi +++ b/arch/arm/boot/dts/kirkwood-6192.dtsi @@ -1,6 +1,6 @@ / { mbus at f1000000 { - pciec: pcie-controller at 82000000 { + pciec: pcie at 82000000 { compatible = "marvell,kirkwood-pcie"; status = "disabled"; device_type = "pci"; @@ -24,6 +24,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &intc 9>; marvell,pcie-port = <0>; diff --git a/arch/arm/boot/dts/kirkwood-6281.dtsi b/arch/arm/boot/dts/kirkwood-6281.dtsi index 748d0b62f233..47d4b3d3d9e9 100644 --- a/arch/arm/boot/dts/kirkwood-6281.dtsi +++ b/arch/arm/boot/dts/kirkwood-6281.dtsi @@ -1,6 +1,6 @@ / { mbus at f1000000 { - pciec: pcie-controller at 82000000 { + pciec: pcie at 82000000 { compatible = "marvell,kirkwood-pcie"; status = "disabled"; device_type = "pci"; @@ -24,6 +24,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &intc 9>; marvell,pcie-port = <0>; diff --git a/arch/arm/boot/dts/kirkwood-6282.dtsi b/arch/arm/boot/dts/kirkwood-6282.dtsi index bb63d2d50fc5..a13dad0a7c08 100644 --- a/arch/arm/boot/dts/kirkwood-6282.dtsi +++ b/arch/arm/boot/dts/kirkwood-6282.dtsi @@ -1,6 +1,6 @@ / { mbus at f1000000 { - pciec: pcie-controller at 82000000 { + pciec: pcie at 82000000 { compatible = "marvell,kirkwood-pcie"; status = "disabled"; device_type = "pci"; @@ -28,6 +28,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &intc 9>; marvell,pcie-port = <0>; @@ -45,6 +46,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 0x81000000 0 0 0x81000000 0x2 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &intc 10>; marvell,pcie-port = <1>; diff --git a/arch/arm/boot/dts/kirkwood-98dx4122.dtsi b/arch/arm/boot/dts/kirkwood-98dx4122.dtsi index 720c210d491d..90d4d71b6683 100644 --- a/arch/arm/boot/dts/kirkwood-98dx4122.dtsi +++ b/arch/arm/boot/dts/kirkwood-98dx4122.dtsi @@ -1,6 +1,6 @@ / { mbus at f1000000 { - pciec: pcie-controller at 82000000 { + pciec: pcie at 82000000 { compatible = "marvell,kirkwood-pcie"; status = "disabled"; device_type = "pci"; @@ -24,6 +24,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &intc 9>; marvell,pcie-port = <0>; -- 2.10.1 ^ permalink raw reply related [flat|nested] 78+ messages in thread
* [PATCH 02/15] ARM: dts: marvell: fix PCI bus dtc warnings @ 2017-03-22 2:03 ` Rob Herring 0 siblings, 0 replies; 78+ messages in thread From: Rob Herring @ 2017-03-22 2:03 UTC (permalink / raw) To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, devicetree-u79uwXL29TY76Z2rM5mHXA Cc: arm-DgEjT+Ai2ygdnm+yROfE0A, Bjorn Helgaas, Jason Cooper, Andrew Lunn, Gregory Clement, Sebastian Hesselbarth dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> Cc: Bjorn Helgaas <bhelgaas-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org> Cc: Jason Cooper <jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org> Cc: Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org> Cc: Gregory Clement <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> Cc: Sebastian Hesselbarth <sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> --- Sub-arch maintainers, please apply to your trees unless arm-soc wants to take the whole lot. Documentation/devicetree/bindings/pci/mvebu-pci.txt | 2 +- arch/arm/boot/dts/armada-370.dtsi | 4 +++- arch/arm/boot/dts/armada-375.dtsi | 4 +++- arch/arm/boot/dts/armada-380.dtsi | 5 ++++- arch/arm/boot/dts/armada-385-db-ap.dts | 2 +- arch/arm/boot/dts/armada-385-linksys.dtsi | 2 +- arch/arm/boot/dts/armada-385-turris-omnia.dts | 2 +- arch/arm/boot/dts/armada-385.dtsi | 6 +++++- arch/arm/boot/dts/armada-388-clearfog.dts | 2 +- arch/arm/boot/dts/armada-388-clearfog.dtsi | 2 +- arch/arm/boot/dts/armada-388-db.dts | 2 +- arch/arm/boot/dts/armada-388-gp.dts | 2 +- arch/arm/boot/dts/armada-388-rd.dts | 2 +- arch/arm/boot/dts/armada-390-db.dts | 2 +- arch/arm/boot/dts/armada-395-gp.dts | 2 +- arch/arm/boot/dts/armada-398-db.dts | 2 +- arch/arm/boot/dts/armada-39x.dtsi | 6 +++++- arch/arm/boot/dts/armada-xp-98dx3236.dtsi | 3 ++- arch/arm/boot/dts/armada-xp-db.dts | 2 +- arch/arm/boot/dts/armada-xp-gp.dts | 2 +- arch/arm/boot/dts/armada-xp-mv78230.dtsi | 7 ++++++- arch/arm/boot/dts/armada-xp-mv78260.dtsi | 11 ++++++++++- arch/arm/boot/dts/armada-xp-mv78460.dtsi | 14 ++++++++++++-- arch/arm/boot/dts/dove-d3plug.dts | 4 ++-- arch/arm/boot/dts/dove.dtsi | 8 +++++--- arch/arm/boot/dts/kirkwood-6192.dtsi | 3 ++- arch/arm/boot/dts/kirkwood-6281.dtsi | 3 ++- arch/arm/boot/dts/kirkwood-6282.dtsi | 4 +++- arch/arm/boot/dts/kirkwood-98dx4122.dtsi | 3 ++- 29 files changed, 80 insertions(+), 33 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/mvebu-pci.txt b/Documentation/devicetree/bindings/pci/mvebu-pci.txt index 2de6f65ecfb1..e5af2e8461cf 100644 --- a/Documentation/devicetree/bindings/pci/mvebu-pci.txt +++ b/Documentation/devicetree/bindings/pci/mvebu-pci.txt @@ -286,7 +286,7 @@ pcie-controller { status = "disabled"; }; - pcie@10,0 { + pcie@a,0 { device_type = "pci"; assigned-addresses = <0x82005000 0 0x82000 0 0x2000>; reg = <0x5000 0 0 0 0>; diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi index cc011c8bc36b..b9af7b22f0a0 100644 --- a/arch/arm/boot/dts/armada-370.dtsi +++ b/arch/arm/boot/dts/armada-370.dtsi @@ -72,7 +72,7 @@ reg = <MBUS_ID(0x01, 0xe0) 0 0x100000>; }; - pciec: pcie-controller@82000000 { + pciec: pcie@82000000 { compatible = "marvell,armada-370-pcie"; status = "disabled"; device_type = "pci"; @@ -100,6 +100,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 58>; marvell,pcie-port = <0>; @@ -117,6 +118,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 0x81000000 0 0 0x81000000 0x2 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 62>; marvell,pcie-port = <1>; diff --git a/arch/arm/boot/dts/armada-375.dtsi b/arch/arm/boot/dts/armada-375.dtsi index 50c5e8417802..7225c7ce9a8d 100644 --- a/arch/arm/boot/dts/armada-375.dtsi +++ b/arch/arm/boot/dts/armada-375.dtsi @@ -582,7 +582,7 @@ }; }; - pciec: pcie-controller@82000000 { + pciec: pcie@82000000 { compatible = "marvell,armada-370-pcie"; status = "disabled"; device_type = "pci"; @@ -610,6 +610,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; marvell,pcie-port = <0>; @@ -627,6 +628,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 0x81000000 0 0 0x81000000 0x2 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; marvell,pcie-port = <0>; diff --git a/arch/arm/boot/dts/armada-380.dtsi b/arch/arm/boot/dts/armada-380.dtsi index e392f6036f39..132596fd0860 100644 --- a/arch/arm/boot/dts/armada-380.dtsi +++ b/arch/arm/boot/dts/armada-380.dtsi @@ -71,7 +71,7 @@ }; }; - pcie-controller { + pcie { compatible = "marvell,armada-370-pcie"; status = "disabled"; device_type = "pci"; @@ -104,6 +104,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; marvell,pcie-port = <0>; @@ -122,6 +123,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 0x81000000 0 0 0x81000000 0x2 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; marvell,pcie-port = <1>; @@ -140,6 +142,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 0x81000000 0 0 0x81000000 0x3 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; marvell,pcie-port = <2>; diff --git a/arch/arm/boot/dts/armada-385-db-ap.dts b/arch/arm/boot/dts/armada-385-db-ap.dts index db5b9f6b615d..25d2d720dc0e 100644 --- a/arch/arm/boot/dts/armada-385-db-ap.dts +++ b/arch/arm/boot/dts/armada-385-db-ap.dts @@ -209,7 +209,7 @@ status = "okay"; }; - pcie-controller { + pcie { status = "okay"; /* diff --git a/arch/arm/boot/dts/armada-385-linksys.dtsi b/arch/arm/boot/dts/armada-385-linksys.dtsi index df47bf1ea5eb..39f62d5ef528 100644 --- a/arch/arm/boot/dts/armada-385-linksys.dtsi +++ b/arch/arm/boot/dts/armada-385-linksys.dtsi @@ -241,7 +241,7 @@ }; }; - pcie-controller { + pcie { status = "okay"; pcie@1,0 { diff --git a/arch/arm/boot/dts/armada-385-turris-omnia.dts b/arch/arm/boot/dts/armada-385-turris-omnia.dts index 28eede180e4f..5511c84849ee 100644 --- a/arch/arm/boot/dts/armada-385-turris-omnia.dts +++ b/arch/arm/boot/dts/armada-385-turris-omnia.dts @@ -96,7 +96,7 @@ }; }; - pcie-controller { + pcie { status = "okay"; pcie@1,0 { diff --git a/arch/arm/boot/dts/armada-385.dtsi b/arch/arm/boot/dts/armada-385.dtsi index 8e63be33472e..534bde3fc579 100644 --- a/arch/arm/boot/dts/armada-385.dtsi +++ b/arch/arm/boot/dts/armada-385.dtsi @@ -76,7 +76,7 @@ }; }; - pcie-controller { + pcie { compatible = "marvell,armada-370-pcie"; status = "disabled"; device_type = "pci"; @@ -115,6 +115,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; marvell,pcie-port = <0>; @@ -133,6 +134,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 0x81000000 0 0 0x81000000 0x2 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; marvell,pcie-port = <1>; @@ -151,6 +153,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 0x81000000 0 0 0x81000000 0x3 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; marvell,pcie-port = <2>; @@ -172,6 +175,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0 0x81000000 0 0 0x81000000 0x4 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; marvell,pcie-port = <3>; diff --git a/arch/arm/boot/dts/armada-388-clearfog.dts b/arch/arm/boot/dts/armada-388-clearfog.dts index 2745b7416313..df981c34aff6 100644 --- a/arch/arm/boot/dts/armada-388-clearfog.dts +++ b/arch/arm/boot/dts/armada-388-clearfog.dts @@ -62,7 +62,7 @@ }; }; - pcie-controller { + pcie { pcie@3,0 { /* Port 2, Lane 0. CON2, nearest CPU. */ reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/armada-388-clearfog.dtsi b/arch/arm/boot/dts/armada-388-clearfog.dtsi index 0f5938bede53..68acfc968706 100644 --- a/arch/arm/boot/dts/armada-388-clearfog.dtsi +++ b/arch/arm/boot/dts/armada-388-clearfog.dtsi @@ -104,7 +104,7 @@ }; }; - pcie-controller { + pcie { status = "okay"; /* * The two PCIe units are accessible through diff --git a/arch/arm/boot/dts/armada-388-db.dts b/arch/arm/boot/dts/armada-388-db.dts index 1ac923826445..a4ec1fa37529 100644 --- a/arch/arm/boot/dts/armada-388-db.dts +++ b/arch/arm/boot/dts/armada-388-db.dts @@ -172,7 +172,7 @@ status = "okay"; }; - pcie-controller { + pcie { status = "okay"; /* * The two PCIe units are accessible through diff --git a/arch/arm/boot/dts/armada-388-gp.dts b/arch/arm/boot/dts/armada-388-gp.dts index 895fa6cfa15a..f2eb5464af1f 100644 --- a/arch/arm/boot/dts/armada-388-gp.dts +++ b/arch/arm/boot/dts/armada-388-gp.dts @@ -240,7 +240,7 @@ status = "okay"; }; - pcie-controller { + pcie { status = "okay"; /* * One PCIe units is accessible through diff --git a/arch/arm/boot/dts/armada-388-rd.dts b/arch/arm/boot/dts/armada-388-rd.dts index af82f275eac2..9cc3ca0376b9 100644 --- a/arch/arm/boot/dts/armada-388-rd.dts +++ b/arch/arm/boot/dts/armada-388-rd.dts @@ -117,7 +117,7 @@ }; }; - pcie-controller { + pcie { status = "okay"; /* * One PCIe units is accessible through diff --git a/arch/arm/boot/dts/armada-390-db.dts b/arch/arm/boot/dts/armada-390-db.dts index 2afed2ce4741..c718a5242595 100644 --- a/arch/arm/boot/dts/armada-390-db.dts +++ b/arch/arm/boot/dts/armada-390-db.dts @@ -123,7 +123,7 @@ }; }; - pcie-controller { + pcie { status = "okay"; /* CON30 */ diff --git a/arch/arm/boot/dts/armada-395-gp.dts b/arch/arm/boot/dts/armada-395-gp.dts index 2cdbba804c1e..ef491b524fd6 100644 --- a/arch/arm/boot/dts/armada-395-gp.dts +++ b/arch/arm/boot/dts/armada-395-gp.dts @@ -139,7 +139,7 @@ }; }; - pcie-controller { + pcie { status = "okay"; /* diff --git a/arch/arm/boot/dts/armada-398-db.dts b/arch/arm/boot/dts/armada-398-db.dts index e8604281c3c9..f0e0379f7619 100644 --- a/arch/arm/boot/dts/armada-398-db.dts +++ b/arch/arm/boot/dts/armada-398-db.dts @@ -118,7 +118,7 @@ }; }; - pcie-controller { + pcie { status = "okay"; pcie@1,0 { diff --git a/arch/arm/boot/dts/armada-39x.dtsi b/arch/arm/boot/dts/armada-39x.dtsi index 60fbfd5907c7..ea657071e278 100644 --- a/arch/arm/boot/dts/armada-39x.dtsi +++ b/arch/arm/boot/dts/armada-39x.dtsi @@ -442,7 +442,7 @@ }; }; - pcie-controller { + pcie { compatible = "marvell,armada-370-pcie"; status = "disabled"; device_type = "pci"; @@ -481,6 +481,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; marvell,pcie-port = <0>; @@ -499,6 +500,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 0x81000000 0 0 0x81000000 0x2 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; marvell,pcie-port = <1>; @@ -517,6 +519,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 0x81000000 0 0 0x81000000 0x3 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; marvell,pcie-port = <2>; @@ -538,6 +541,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0 0x81000000 0 0 0x81000000 0x4 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; marvell,pcie-port = <3>; diff --git a/arch/arm/boot/dts/armada-xp-98dx3236.dtsi b/arch/arm/boot/dts/armada-xp-98dx3236.dtsi index f6a03dcee5ef..d79c66cd7ce5 100644 --- a/arch/arm/boot/dts/armada-xp-98dx3236.dtsi +++ b/arch/arm/boot/dts/armada-xp-98dx3236.dtsi @@ -81,7 +81,7 @@ /* * 98DX3236 has 1 x1 PCIe unit Gen2.0 */ - pciec: pcie-controller@82000000 { + pciec: pcie@82000000 { compatible = "marvell,armada-xp-pcie"; status = "disabled"; device_type = "pci"; @@ -107,6 +107,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 58>; marvell,pcie-port = <0>; diff --git a/arch/arm/boot/dts/armada-xp-db.dts b/arch/arm/boot/dts/armada-xp-db.dts index a33974254d8c..065282c21789 100644 --- a/arch/arm/boot/dts/armada-xp-db.dts +++ b/arch/arm/boot/dts/armada-xp-db.dts @@ -242,7 +242,7 @@ /* Port 2, Lane 0 */ status = "okay"; }; - pcie@10,0 { + pcie@a,0 { /* Port 3, Lane 0 */ status = "okay"; }; diff --git a/arch/arm/boot/dts/armada-xp-gp.dts b/arch/arm/boot/dts/armada-xp-gp.dts index d62bf7bea1df..ac9eab8ac186 100644 --- a/arch/arm/boot/dts/armada-xp-gp.dts +++ b/arch/arm/boot/dts/armada-xp-gp.dts @@ -227,7 +227,7 @@ /* Port 2, Lane 0 */ status = "okay"; }; - pcie@10,0 { + pcie@a,0 { /* Port 3, Lane 0 */ status = "okay"; }; diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi index 07c5090ecd29..9fef63d02b0a 100644 --- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi @@ -86,7 +86,7 @@ * configured as x4 or quad x1 lanes. One unit is * x1 only. */ - pciec: pcie-controller@82000000 { + pciec: pcie@82000000 { compatible = "marvell,armada-xp-pcie"; status = "disabled"; device_type = "pci"; @@ -123,6 +123,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 58>; marvell,pcie-port = <0>; @@ -140,6 +141,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 0x81000000 0 0 0x81000000 0x2 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 59>; marvell,pcie-port = <0>; @@ -157,6 +159,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 0x81000000 0 0 0x81000000 0x3 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 60>; marvell,pcie-port = <0>; @@ -174,6 +177,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0 0x81000000 0 0 0x81000000 0x4 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 61>; marvell,pcie-port = <0>; @@ -191,6 +195,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0 0x81000000 0 0 0x81000000 0x5 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 62>; marvell,pcie-port = <1>; diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi index 64e936ae7b22..c753ebd86d23 100644 --- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi @@ -87,7 +87,7 @@ * configured as x4 or quad x1 lanes. One unit is * x4 only. */ - pciec: pcie-controller@82000000 { + pciec: pcie@82000000 { compatible = "marvell,armada-xp-pcie"; status = "disabled"; device_type = "pci"; @@ -138,6 +138,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 58>; marvell,pcie-port = <0>; @@ -155,6 +156,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 0x81000000 0 0 0x81000000 0x2 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 59>; marvell,pcie-port = <0>; @@ -172,6 +174,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 0x81000000 0 0 0x81000000 0x3 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 60>; marvell,pcie-port = <0>; @@ -189,6 +192,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0 0x81000000 0 0 0x81000000 0x4 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 61>; marvell,pcie-port = <0>; @@ -206,6 +210,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0 0x81000000 0 0 0x81000000 0x5 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 62>; marvell,pcie-port = <1>; @@ -223,6 +228,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x6 0 1 0 0x81000000 0 0 0x81000000 0x6 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 63>; marvell,pcie-port = <1>; @@ -240,6 +246,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x7 0 1 0 0x81000000 0 0 0x81000000 0x7 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 64>; marvell,pcie-port = <1>; @@ -257,6 +264,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x8 0 1 0 0x81000000 0 0 0x81000000 0x8 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 65>; marvell,pcie-port = <1>; @@ -274,6 +282,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0 0x81000000 0 0 0x81000000 0x9 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 99>; marvell,pcie-port = <2>; diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi index d1383dde43eb..d294f27540ec 100644 --- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi @@ -104,7 +104,7 @@ * configured as x4 or quad x1 lanes. Two units are * x4/x1. */ - pciec: pcie-controller@82000000 { + pciec: pcie@82000000 { compatible = "marvell,armada-xp-pcie"; status = "disabled"; device_type = "pci"; @@ -159,6 +159,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 58>; marvell,pcie-port = <0>; @@ -176,6 +177,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 0x81000000 0 0 0x81000000 0x2 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 59>; marvell,pcie-port = <0>; @@ -193,6 +195,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 0x81000000 0 0 0x81000000 0x3 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 60>; marvell,pcie-port = <0>; @@ -210,6 +213,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0 0x81000000 0 0 0x81000000 0x4 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 61>; marvell,pcie-port = <0>; @@ -227,6 +231,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0 0x81000000 0 0 0x81000000 0x5 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 62>; marvell,pcie-port = <1>; @@ -244,6 +249,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x6 0 1 0 0x81000000 0 0 0x81000000 0x6 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 63>; marvell,pcie-port = <1>; @@ -261,6 +267,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x7 0 1 0 0x81000000 0 0 0x81000000 0x7 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 64>; marvell,pcie-port = <1>; @@ -278,6 +285,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x8 0 1 0 0x81000000 0 0 0x81000000 0x8 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 65>; marvell,pcie-port = <1>; @@ -295,6 +303,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0 0x81000000 0 0 0x81000000 0x9 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 99>; marvell,pcie-port = <2>; @@ -303,7 +312,7 @@ status = "disabled"; }; - pcie10: pcie@10,0 { + pcie10: pcie@a,0 { device_type = "pci"; assigned-addresses = <0x82005000 0 0x82000 0 0x2000>; reg = <0x5000 0 0 0 0>; @@ -312,6 +321,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0xa 0 1 0 0x81000000 0 0 0x81000000 0xa 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &mpic 103>; marvell,pcie-port = <3>; diff --git a/arch/arm/boot/dts/dove-d3plug.dts b/arch/arm/boot/dts/dove-d3plug.dts index f5f59bb5a534..e88ff83f1dec 100644 --- a/arch/arm/boot/dts/dove-d3plug.dts +++ b/arch/arm/boot/dts/dove-d3plug.dts @@ -88,7 +88,7 @@ &pcie { status = "okay"; /* Fresco Logic USB3.0 xHCI controller */ - pcie-port@0 { + pcie@1 { status = "okay"; reset-gpios = <&gpio0 26 1>; reset-delay-us = <20000>; @@ -96,7 +96,7 @@ pinctrl-names = "default"; }; /* Mini-PCIe slot */ - pcie-port@1 { + pcie@2 { status = "okay"; reset-gpios = <&gpio0 25 1>; }; diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi index 698d58cea20d..1475d3672e56 100644 --- a/arch/arm/boot/dts/dove.dtsi +++ b/arch/arm/boot/dts/dove.dtsi @@ -89,7 +89,7 @@ MBUS_ID(0x03, 0x01) 0 0xc8000000 0x0100000 /* CESA SRAM 1M */ MBUS_ID(0x0d, 0x00) 0 0xf0000000 0x0100000>; /* PMU SRAM 1M */ - pcie: pcie-controller { + pcie: pcie { compatible = "marvell,dove-pcie"; status = "disabled"; device_type = "pci"; @@ -106,7 +106,7 @@ 0x82000000 0x2 0x0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 Mem */ 0x81000000 0x2 0x0 MBUS_ID(0x08, 0xe0) 0 1 0>; /* Port 1.0 I/O */ - pcie0: pcie-port@0 { + pcie0: pcie@1 { device_type = "pci"; status = "disabled"; assigned-addresses = <0x82000800 0 0x40000 0 0x2000>; @@ -118,13 +118,14 @@ #size-cells = <2>; ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; + bus-range = <0x00 0xff>; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &intc 16>; }; - pcie1: pcie-port@1 { + pcie1: pcie@2 { device_type = "pci"; status = "disabled"; assigned-addresses = <0x82002800 0 0x80000 0 0x2000>; @@ -136,6 +137,7 @@ #size-cells = <2>; ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 0x81000000 0 0 0x81000000 0x2 0 1 0>; + bus-range = <0x00 0xff>; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0>; diff --git a/arch/arm/boot/dts/kirkwood-6192.dtsi b/arch/arm/boot/dts/kirkwood-6192.dtsi index d573e03f3134..f003f3f1bd65 100644 --- a/arch/arm/boot/dts/kirkwood-6192.dtsi +++ b/arch/arm/boot/dts/kirkwood-6192.dtsi @@ -1,6 +1,6 @@ / { mbus@f1000000 { - pciec: pcie-controller@82000000 { + pciec: pcie@82000000 { compatible = "marvell,kirkwood-pcie"; status = "disabled"; device_type = "pci"; @@ -24,6 +24,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &intc 9>; marvell,pcie-port = <0>; diff --git a/arch/arm/boot/dts/kirkwood-6281.dtsi b/arch/arm/boot/dts/kirkwood-6281.dtsi index 748d0b62f233..47d4b3d3d9e9 100644 --- a/arch/arm/boot/dts/kirkwood-6281.dtsi +++ b/arch/arm/boot/dts/kirkwood-6281.dtsi @@ -1,6 +1,6 @@ / { mbus@f1000000 { - pciec: pcie-controller@82000000 { + pciec: pcie@82000000 { compatible = "marvell,kirkwood-pcie"; status = "disabled"; device_type = "pci"; @@ -24,6 +24,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &intc 9>; marvell,pcie-port = <0>; diff --git a/arch/arm/boot/dts/kirkwood-6282.dtsi b/arch/arm/boot/dts/kirkwood-6282.dtsi index bb63d2d50fc5..a13dad0a7c08 100644 --- a/arch/arm/boot/dts/kirkwood-6282.dtsi +++ b/arch/arm/boot/dts/kirkwood-6282.dtsi @@ -1,6 +1,6 @@ / { mbus@f1000000 { - pciec: pcie-controller@82000000 { + pciec: pcie@82000000 { compatible = "marvell,kirkwood-pcie"; status = "disabled"; device_type = "pci"; @@ -28,6 +28,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &intc 9>; marvell,pcie-port = <0>; @@ -45,6 +46,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 0x81000000 0 0 0x81000000 0x2 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &intc 10>; marvell,pcie-port = <1>; diff --git a/arch/arm/boot/dts/kirkwood-98dx4122.dtsi b/arch/arm/boot/dts/kirkwood-98dx4122.dtsi index 720c210d491d..90d4d71b6683 100644 --- a/arch/arm/boot/dts/kirkwood-98dx4122.dtsi +++ b/arch/arm/boot/dts/kirkwood-98dx4122.dtsi @@ -1,6 +1,6 @@ / { mbus@f1000000 { - pciec: pcie-controller@82000000 { + pciec: pcie@82000000 { compatible = "marvell,kirkwood-pcie"; status = "disabled"; device_type = "pci"; @@ -24,6 +24,7 @@ #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &intc 9>; marvell,pcie-port = <0>; -- 2.10.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply related [flat|nested] 78+ messages in thread
* [PATCH 02/15] ARM: dts: marvell: fix PCI bus dtc warnings 2017-03-22 2:03 ` Rob Herring @ 2017-03-24 14:17 ` Gregory CLEMENT -1 siblings, 0 replies; 78+ messages in thread From: Gregory CLEMENT @ 2017-03-24 14:17 UTC (permalink / raw) To: linux-arm-kernel Hi Rob, On mer., mars 22 2017, Rob Herring <robh@kernel.org> wrote: > dtc recently added PCI bus checks. Fix these warnings. Could you rebase your patch on mvebu/dt or linux-next because it doesn't apply as is. Thanks, Gregory > > Signed-off-by: Rob Herring <robh@kernel.org> > Cc: Bjorn Helgaas <bhelgaas@google.com> > Cc: Jason Cooper <jason@lakedaemon.net> > Cc: Andrew Lunn <andrew@lunn.ch> > Cc: Gregory Clement <gregory.clement@free-electrons.com> > Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> > --- > Sub-arch maintainers, please apply to your trees unless arm-soc wants > to take the whole lot. > > Documentation/devicetree/bindings/pci/mvebu-pci.txt | 2 +- > arch/arm/boot/dts/armada-370.dtsi | 4 +++- > arch/arm/boot/dts/armada-375.dtsi | 4 +++- > arch/arm/boot/dts/armada-380.dtsi | 5 ++++- > arch/arm/boot/dts/armada-385-db-ap.dts | 2 +- > arch/arm/boot/dts/armada-385-linksys.dtsi | 2 +- > arch/arm/boot/dts/armada-385-turris-omnia.dts | 2 +- > arch/arm/boot/dts/armada-385.dtsi | 6 +++++- > arch/arm/boot/dts/armada-388-clearfog.dts | 2 +- > arch/arm/boot/dts/armada-388-clearfog.dtsi | 2 +- > arch/arm/boot/dts/armada-388-db.dts | 2 +- > arch/arm/boot/dts/armada-388-gp.dts | 2 +- > arch/arm/boot/dts/armada-388-rd.dts | 2 +- > arch/arm/boot/dts/armada-390-db.dts | 2 +- > arch/arm/boot/dts/armada-395-gp.dts | 2 +- > arch/arm/boot/dts/armada-398-db.dts | 2 +- > arch/arm/boot/dts/armada-39x.dtsi | 6 +++++- > arch/arm/boot/dts/armada-xp-98dx3236.dtsi | 3 ++- > arch/arm/boot/dts/armada-xp-db.dts | 2 +- > arch/arm/boot/dts/armada-xp-gp.dts | 2 +- > arch/arm/boot/dts/armada-xp-mv78230.dtsi | 7 ++++++- > arch/arm/boot/dts/armada-xp-mv78260.dtsi | 11 ++++++++++- > arch/arm/boot/dts/armada-xp-mv78460.dtsi | 14 ++++++++++++-- > arch/arm/boot/dts/dove-d3plug.dts | 4 ++-- > arch/arm/boot/dts/dove.dtsi | 8 +++++--- > arch/arm/boot/dts/kirkwood-6192.dtsi | 3 ++- > arch/arm/boot/dts/kirkwood-6281.dtsi | 3 ++- > arch/arm/boot/dts/kirkwood-6282.dtsi | 4 +++- > arch/arm/boot/dts/kirkwood-98dx4122.dtsi | 3 ++- > 29 files changed, 80 insertions(+), 33 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pci/mvebu-pci.txt b/Documentation/devicetree/bindings/pci/mvebu-pci.txt > index 2de6f65ecfb1..e5af2e8461cf 100644 > --- a/Documentation/devicetree/bindings/pci/mvebu-pci.txt > +++ b/Documentation/devicetree/bindings/pci/mvebu-pci.txt > @@ -286,7 +286,7 @@ pcie-controller { > status = "disabled"; > }; > > - pcie at 10,0 { > + pcie at a,0 { > device_type = "pci"; > assigned-addresses = <0x82005000 0 0x82000 0 0x2000>; > reg = <0x5000 0 0 0 0>; > diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi > index cc011c8bc36b..b9af7b22f0a0 100644 > --- a/arch/arm/boot/dts/armada-370.dtsi > +++ b/arch/arm/boot/dts/armada-370.dtsi > @@ -72,7 +72,7 @@ > reg = <MBUS_ID(0x01, 0xe0) 0 0x100000>; > }; > > - pciec: pcie-controller at 82000000 { > + pciec: pcie at 82000000 { > compatible = "marvell,armada-370-pcie"; > status = "disabled"; > device_type = "pci"; > @@ -100,6 +100,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 > 0x81000000 0 0 0x81000000 0x1 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 58>; > marvell,pcie-port = <0>; > @@ -117,6 +118,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 > 0x81000000 0 0 0x81000000 0x2 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 62>; > marvell,pcie-port = <1>; > diff --git a/arch/arm/boot/dts/armada-375.dtsi b/arch/arm/boot/dts/armada-375.dtsi > index 50c5e8417802..7225c7ce9a8d 100644 > --- a/arch/arm/boot/dts/armada-375.dtsi > +++ b/arch/arm/boot/dts/armada-375.dtsi > @@ -582,7 +582,7 @@ > }; > }; > > - pciec: pcie-controller at 82000000 { > + pciec: pcie at 82000000 { > compatible = "marvell,armada-370-pcie"; > status = "disabled"; > device_type = "pci"; > @@ -610,6 +610,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 > 0x81000000 0 0 0x81000000 0x1 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; > marvell,pcie-port = <0>; > @@ -627,6 +628,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 > 0x81000000 0 0 0x81000000 0x2 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; > marvell,pcie-port = <0>; > diff --git a/arch/arm/boot/dts/armada-380.dtsi b/arch/arm/boot/dts/armada-380.dtsi > index e392f6036f39..132596fd0860 100644 > --- a/arch/arm/boot/dts/armada-380.dtsi > +++ b/arch/arm/boot/dts/armada-380.dtsi > @@ -71,7 +71,7 @@ > }; > }; > > - pcie-controller { > + pcie { > compatible = "marvell,armada-370-pcie"; > status = "disabled"; > device_type = "pci"; > @@ -104,6 +104,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 > 0x81000000 0 0 0x81000000 0x1 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; > marvell,pcie-port = <0>; > @@ -122,6 +123,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 > 0x81000000 0 0 0x81000000 0x2 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; > marvell,pcie-port = <1>; > @@ -140,6 +142,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 > 0x81000000 0 0 0x81000000 0x3 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; > marvell,pcie-port = <2>; > diff --git a/arch/arm/boot/dts/armada-385-db-ap.dts b/arch/arm/boot/dts/armada-385-db-ap.dts > index db5b9f6b615d..25d2d720dc0e 100644 > --- a/arch/arm/boot/dts/armada-385-db-ap.dts > +++ b/arch/arm/boot/dts/armada-385-db-ap.dts > @@ -209,7 +209,7 @@ > status = "okay"; > }; > > - pcie-controller { > + pcie { > status = "okay"; > > /* > diff --git a/arch/arm/boot/dts/armada-385-linksys.dtsi b/arch/arm/boot/dts/armada-385-linksys.dtsi > index df47bf1ea5eb..39f62d5ef528 100644 > --- a/arch/arm/boot/dts/armada-385-linksys.dtsi > +++ b/arch/arm/boot/dts/armada-385-linksys.dtsi > @@ -241,7 +241,7 @@ > }; > }; > > - pcie-controller { > + pcie { > status = "okay"; > > pcie at 1,0 { > diff --git a/arch/arm/boot/dts/armada-385-turris-omnia.dts b/arch/arm/boot/dts/armada-385-turris-omnia.dts > index 28eede180e4f..5511c84849ee 100644 > --- a/arch/arm/boot/dts/armada-385-turris-omnia.dts > +++ b/arch/arm/boot/dts/armada-385-turris-omnia.dts > @@ -96,7 +96,7 @@ > }; > }; > > - pcie-controller { > + pcie { > status = "okay"; > > pcie at 1,0 { > diff --git a/arch/arm/boot/dts/armada-385.dtsi b/arch/arm/boot/dts/armada-385.dtsi > index 8e63be33472e..534bde3fc579 100644 > --- a/arch/arm/boot/dts/armada-385.dtsi > +++ b/arch/arm/boot/dts/armada-385.dtsi > @@ -76,7 +76,7 @@ > }; > }; > > - pcie-controller { > + pcie { > compatible = "marvell,armada-370-pcie"; > status = "disabled"; > device_type = "pci"; > @@ -115,6 +115,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 > 0x81000000 0 0 0x81000000 0x1 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; > marvell,pcie-port = <0>; > @@ -133,6 +134,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 > 0x81000000 0 0 0x81000000 0x2 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; > marvell,pcie-port = <1>; > @@ -151,6 +153,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 > 0x81000000 0 0 0x81000000 0x3 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; > marvell,pcie-port = <2>; > @@ -172,6 +175,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0 > 0x81000000 0 0 0x81000000 0x4 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; > marvell,pcie-port = <3>; > diff --git a/arch/arm/boot/dts/armada-388-clearfog.dts b/arch/arm/boot/dts/armada-388-clearfog.dts > index 2745b7416313..df981c34aff6 100644 > --- a/arch/arm/boot/dts/armada-388-clearfog.dts > +++ b/arch/arm/boot/dts/armada-388-clearfog.dts > @@ -62,7 +62,7 @@ > }; > }; > > - pcie-controller { > + pcie { > pcie at 3,0 { > /* Port 2, Lane 0. CON2, nearest CPU. */ > reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>; > diff --git a/arch/arm/boot/dts/armada-388-clearfog.dtsi b/arch/arm/boot/dts/armada-388-clearfog.dtsi > index 0f5938bede53..68acfc968706 100644 > --- a/arch/arm/boot/dts/armada-388-clearfog.dtsi > +++ b/arch/arm/boot/dts/armada-388-clearfog.dtsi > @@ -104,7 +104,7 @@ > }; > }; > > - pcie-controller { > + pcie { > status = "okay"; > /* > * The two PCIe units are accessible through > diff --git a/arch/arm/boot/dts/armada-388-db.dts b/arch/arm/boot/dts/armada-388-db.dts > index 1ac923826445..a4ec1fa37529 100644 > --- a/arch/arm/boot/dts/armada-388-db.dts > +++ b/arch/arm/boot/dts/armada-388-db.dts > @@ -172,7 +172,7 @@ > status = "okay"; > }; > > - pcie-controller { > + pcie { > status = "okay"; > /* > * The two PCIe units are accessible through > diff --git a/arch/arm/boot/dts/armada-388-gp.dts b/arch/arm/boot/dts/armada-388-gp.dts > index 895fa6cfa15a..f2eb5464af1f 100644 > --- a/arch/arm/boot/dts/armada-388-gp.dts > +++ b/arch/arm/boot/dts/armada-388-gp.dts > @@ -240,7 +240,7 @@ > status = "okay"; > }; > > - pcie-controller { > + pcie { > status = "okay"; > /* > * One PCIe units is accessible through > diff --git a/arch/arm/boot/dts/armada-388-rd.dts b/arch/arm/boot/dts/armada-388-rd.dts > index af82f275eac2..9cc3ca0376b9 100644 > --- a/arch/arm/boot/dts/armada-388-rd.dts > +++ b/arch/arm/boot/dts/armada-388-rd.dts > @@ -117,7 +117,7 @@ > }; > }; > > - pcie-controller { > + pcie { > status = "okay"; > /* > * One PCIe units is accessible through > diff --git a/arch/arm/boot/dts/armada-390-db.dts b/arch/arm/boot/dts/armada-390-db.dts > index 2afed2ce4741..c718a5242595 100644 > --- a/arch/arm/boot/dts/armada-390-db.dts > +++ b/arch/arm/boot/dts/armada-390-db.dts > @@ -123,7 +123,7 @@ > }; > }; > > - pcie-controller { > + pcie { > status = "okay"; > > /* CON30 */ > diff --git a/arch/arm/boot/dts/armada-395-gp.dts b/arch/arm/boot/dts/armada-395-gp.dts > index 2cdbba804c1e..ef491b524fd6 100644 > --- a/arch/arm/boot/dts/armada-395-gp.dts > +++ b/arch/arm/boot/dts/armada-395-gp.dts > @@ -139,7 +139,7 @@ > }; > }; > > - pcie-controller { > + pcie { > status = "okay"; > > /* > diff --git a/arch/arm/boot/dts/armada-398-db.dts b/arch/arm/boot/dts/armada-398-db.dts > index e8604281c3c9..f0e0379f7619 100644 > --- a/arch/arm/boot/dts/armada-398-db.dts > +++ b/arch/arm/boot/dts/armada-398-db.dts > @@ -118,7 +118,7 @@ > }; > }; > > - pcie-controller { > + pcie { > status = "okay"; > > pcie at 1,0 { > diff --git a/arch/arm/boot/dts/armada-39x.dtsi b/arch/arm/boot/dts/armada-39x.dtsi > index 60fbfd5907c7..ea657071e278 100644 > --- a/arch/arm/boot/dts/armada-39x.dtsi > +++ b/arch/arm/boot/dts/armada-39x.dtsi > @@ -442,7 +442,7 @@ > }; > }; > > - pcie-controller { > + pcie { > compatible = "marvell,armada-370-pcie"; > status = "disabled"; > device_type = "pci"; > @@ -481,6 +481,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 > 0x81000000 0 0 0x81000000 0x1 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; > marvell,pcie-port = <0>; > @@ -499,6 +500,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 > 0x81000000 0 0 0x81000000 0x2 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; > marvell,pcie-port = <1>; > @@ -517,6 +519,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 > 0x81000000 0 0 0x81000000 0x3 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; > marvell,pcie-port = <2>; > @@ -538,6 +541,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0 > 0x81000000 0 0 0x81000000 0x4 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; > marvell,pcie-port = <3>; > diff --git a/arch/arm/boot/dts/armada-xp-98dx3236.dtsi b/arch/arm/boot/dts/armada-xp-98dx3236.dtsi > index f6a03dcee5ef..d79c66cd7ce5 100644 > --- a/arch/arm/boot/dts/armada-xp-98dx3236.dtsi > +++ b/arch/arm/boot/dts/armada-xp-98dx3236.dtsi > @@ -81,7 +81,7 @@ > /* > * 98DX3236 has 1 x1 PCIe unit Gen2.0 > */ > - pciec: pcie-controller at 82000000 { > + pciec: pcie at 82000000 { > compatible = "marvell,armada-xp-pcie"; > status = "disabled"; > device_type = "pci"; > @@ -107,6 +107,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 > 0x81000000 0 0 0x81000000 0x1 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 58>; > marvell,pcie-port = <0>; > diff --git a/arch/arm/boot/dts/armada-xp-db.dts b/arch/arm/boot/dts/armada-xp-db.dts > index a33974254d8c..065282c21789 100644 > --- a/arch/arm/boot/dts/armada-xp-db.dts > +++ b/arch/arm/boot/dts/armada-xp-db.dts > @@ -242,7 +242,7 @@ > /* Port 2, Lane 0 */ > status = "okay"; > }; > - pcie at 10,0 { > + pcie at a,0 { > /* Port 3, Lane 0 */ > status = "okay"; > }; > diff --git a/arch/arm/boot/dts/armada-xp-gp.dts b/arch/arm/boot/dts/armada-xp-gp.dts > index d62bf7bea1df..ac9eab8ac186 100644 > --- a/arch/arm/boot/dts/armada-xp-gp.dts > +++ b/arch/arm/boot/dts/armada-xp-gp.dts > @@ -227,7 +227,7 @@ > /* Port 2, Lane 0 */ > status = "okay"; > }; > - pcie at 10,0 { > + pcie at a,0 { > /* Port 3, Lane 0 */ > status = "okay"; > }; > diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi > index 07c5090ecd29..9fef63d02b0a 100644 > --- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi > +++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi > @@ -86,7 +86,7 @@ > * configured as x4 or quad x1 lanes. One unit is > * x1 only. > */ > - pciec: pcie-controller at 82000000 { > + pciec: pcie at 82000000 { > compatible = "marvell,armada-xp-pcie"; > status = "disabled"; > device_type = "pci"; > @@ -123,6 +123,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 > 0x81000000 0 0 0x81000000 0x1 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 58>; > marvell,pcie-port = <0>; > @@ -140,6 +141,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 > 0x81000000 0 0 0x81000000 0x2 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 59>; > marvell,pcie-port = <0>; > @@ -157,6 +159,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 > 0x81000000 0 0 0x81000000 0x3 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 60>; > marvell,pcie-port = <0>; > @@ -174,6 +177,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0 > 0x81000000 0 0 0x81000000 0x4 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 61>; > marvell,pcie-port = <0>; > @@ -191,6 +195,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0 > 0x81000000 0 0 0x81000000 0x5 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 62>; > marvell,pcie-port = <1>; > diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi > index 64e936ae7b22..c753ebd86d23 100644 > --- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi > +++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi > @@ -87,7 +87,7 @@ > * configured as x4 or quad x1 lanes. One unit is > * x4 only. > */ > - pciec: pcie-controller at 82000000 { > + pciec: pcie at 82000000 { > compatible = "marvell,armada-xp-pcie"; > status = "disabled"; > device_type = "pci"; > @@ -138,6 +138,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 > 0x81000000 0 0 0x81000000 0x1 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 58>; > marvell,pcie-port = <0>; > @@ -155,6 +156,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 > 0x81000000 0 0 0x81000000 0x2 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 59>; > marvell,pcie-port = <0>; > @@ -172,6 +174,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 > 0x81000000 0 0 0x81000000 0x3 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 60>; > marvell,pcie-port = <0>; > @@ -189,6 +192,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0 > 0x81000000 0 0 0x81000000 0x4 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 61>; > marvell,pcie-port = <0>; > @@ -206,6 +210,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0 > 0x81000000 0 0 0x81000000 0x5 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 62>; > marvell,pcie-port = <1>; > @@ -223,6 +228,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x6 0 1 0 > 0x81000000 0 0 0x81000000 0x6 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 63>; > marvell,pcie-port = <1>; > @@ -240,6 +246,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x7 0 1 0 > 0x81000000 0 0 0x81000000 0x7 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 64>; > marvell,pcie-port = <1>; > @@ -257,6 +264,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x8 0 1 0 > 0x81000000 0 0 0x81000000 0x8 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 65>; > marvell,pcie-port = <1>; > @@ -274,6 +282,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0 > 0x81000000 0 0 0x81000000 0x9 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 99>; > marvell,pcie-port = <2>; > diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi > index d1383dde43eb..d294f27540ec 100644 > --- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi > +++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi > @@ -104,7 +104,7 @@ > * configured as x4 or quad x1 lanes. Two units are > * x4/x1. > */ > - pciec: pcie-controller at 82000000 { > + pciec: pcie at 82000000 { > compatible = "marvell,armada-xp-pcie"; > status = "disabled"; > device_type = "pci"; > @@ -159,6 +159,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 > 0x81000000 0 0 0x81000000 0x1 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 58>; > marvell,pcie-port = <0>; > @@ -176,6 +177,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 > 0x81000000 0 0 0x81000000 0x2 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 59>; > marvell,pcie-port = <0>; > @@ -193,6 +195,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 > 0x81000000 0 0 0x81000000 0x3 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 60>; > marvell,pcie-port = <0>; > @@ -210,6 +213,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0 > 0x81000000 0 0 0x81000000 0x4 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 61>; > marvell,pcie-port = <0>; > @@ -227,6 +231,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0 > 0x81000000 0 0 0x81000000 0x5 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 62>; > marvell,pcie-port = <1>; > @@ -244,6 +249,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x6 0 1 0 > 0x81000000 0 0 0x81000000 0x6 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 63>; > marvell,pcie-port = <1>; > @@ -261,6 +267,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x7 0 1 0 > 0x81000000 0 0 0x81000000 0x7 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 64>; > marvell,pcie-port = <1>; > @@ -278,6 +285,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x8 0 1 0 > 0x81000000 0 0 0x81000000 0x8 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 65>; > marvell,pcie-port = <1>; > @@ -295,6 +303,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0 > 0x81000000 0 0 0x81000000 0x9 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 99>; > marvell,pcie-port = <2>; > @@ -303,7 +312,7 @@ > status = "disabled"; > }; > > - pcie10: pcie at 10,0 { > + pcie10: pcie at a,0 { > device_type = "pci"; > assigned-addresses = <0x82005000 0 0x82000 0 0x2000>; > reg = <0x5000 0 0 0 0>; > @@ -312,6 +321,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0xa 0 1 0 > 0x81000000 0 0 0x81000000 0xa 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 103>; > marvell,pcie-port = <3>; > diff --git a/arch/arm/boot/dts/dove-d3plug.dts b/arch/arm/boot/dts/dove-d3plug.dts > index f5f59bb5a534..e88ff83f1dec 100644 > --- a/arch/arm/boot/dts/dove-d3plug.dts > +++ b/arch/arm/boot/dts/dove-d3plug.dts > @@ -88,7 +88,7 @@ > &pcie { > status = "okay"; > /* Fresco Logic USB3.0 xHCI controller */ > - pcie-port at 0 { > + pcie at 1 { > status = "okay"; > reset-gpios = <&gpio0 26 1>; > reset-delay-us = <20000>; > @@ -96,7 +96,7 @@ > pinctrl-names = "default"; > }; > /* Mini-PCIe slot */ > - pcie-port at 1 { > + pcie at 2 { > status = "okay"; > reset-gpios = <&gpio0 25 1>; > }; > diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi > index 698d58cea20d..1475d3672e56 100644 > --- a/arch/arm/boot/dts/dove.dtsi > +++ b/arch/arm/boot/dts/dove.dtsi > @@ -89,7 +89,7 @@ > MBUS_ID(0x03, 0x01) 0 0xc8000000 0x0100000 /* CESA SRAM 1M */ > MBUS_ID(0x0d, 0x00) 0 0xf0000000 0x0100000>; /* PMU SRAM 1M */ > > - pcie: pcie-controller { > + pcie: pcie { > compatible = "marvell,dove-pcie"; > status = "disabled"; > device_type = "pci"; > @@ -106,7 +106,7 @@ > 0x82000000 0x2 0x0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 Mem */ > 0x81000000 0x2 0x0 MBUS_ID(0x08, 0xe0) 0 1 0>; /* Port 1.0 I/O */ > > - pcie0: pcie-port at 0 { > + pcie0: pcie at 1 { > device_type = "pci"; > status = "disabled"; > assigned-addresses = <0x82000800 0 0x40000 0 0x2000>; > @@ -118,13 +118,14 @@ > #size-cells = <2>; > ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 > 0x81000000 0 0 0x81000000 0x1 0 1 0>; > + bus-range = <0x00 0xff>; > > #interrupt-cells = <1>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &intc 16>; > }; > > - pcie1: pcie-port at 1 { > + pcie1: pcie at 2 { > device_type = "pci"; > status = "disabled"; > assigned-addresses = <0x82002800 0 0x80000 0 0x2000>; > @@ -136,6 +137,7 @@ > #size-cells = <2>; > ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 > 0x81000000 0 0 0x81000000 0x2 0 1 0>; > + bus-range = <0x00 0xff>; > > #interrupt-cells = <1>; > interrupt-map-mask = <0 0 0 0>; > diff --git a/arch/arm/boot/dts/kirkwood-6192.dtsi b/arch/arm/boot/dts/kirkwood-6192.dtsi > index d573e03f3134..f003f3f1bd65 100644 > --- a/arch/arm/boot/dts/kirkwood-6192.dtsi > +++ b/arch/arm/boot/dts/kirkwood-6192.dtsi > @@ -1,6 +1,6 @@ > / { > mbus at f1000000 { > - pciec: pcie-controller at 82000000 { > + pciec: pcie at 82000000 { > compatible = "marvell,kirkwood-pcie"; > status = "disabled"; > device_type = "pci"; > @@ -24,6 +24,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 > 0x81000000 0 0 0x81000000 0x1 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &intc 9>; > marvell,pcie-port = <0>; > diff --git a/arch/arm/boot/dts/kirkwood-6281.dtsi b/arch/arm/boot/dts/kirkwood-6281.dtsi > index 748d0b62f233..47d4b3d3d9e9 100644 > --- a/arch/arm/boot/dts/kirkwood-6281.dtsi > +++ b/arch/arm/boot/dts/kirkwood-6281.dtsi > @@ -1,6 +1,6 @@ > / { > mbus at f1000000 { > - pciec: pcie-controller at 82000000 { > + pciec: pcie at 82000000 { > compatible = "marvell,kirkwood-pcie"; > status = "disabled"; > device_type = "pci"; > @@ -24,6 +24,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 > 0x81000000 0 0 0x81000000 0x1 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &intc 9>; > marvell,pcie-port = <0>; > diff --git a/arch/arm/boot/dts/kirkwood-6282.dtsi b/arch/arm/boot/dts/kirkwood-6282.dtsi > index bb63d2d50fc5..a13dad0a7c08 100644 > --- a/arch/arm/boot/dts/kirkwood-6282.dtsi > +++ b/arch/arm/boot/dts/kirkwood-6282.dtsi > @@ -1,6 +1,6 @@ > / { > mbus at f1000000 { > - pciec: pcie-controller at 82000000 { > + pciec: pcie at 82000000 { > compatible = "marvell,kirkwood-pcie"; > status = "disabled"; > device_type = "pci"; > @@ -28,6 +28,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 > 0x81000000 0 0 0x81000000 0x1 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &intc 9>; > marvell,pcie-port = <0>; > @@ -45,6 +46,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 > 0x81000000 0 0 0x81000000 0x2 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &intc 10>; > marvell,pcie-port = <1>; > diff --git a/arch/arm/boot/dts/kirkwood-98dx4122.dtsi b/arch/arm/boot/dts/kirkwood-98dx4122.dtsi > index 720c210d491d..90d4d71b6683 100644 > --- a/arch/arm/boot/dts/kirkwood-98dx4122.dtsi > +++ b/arch/arm/boot/dts/kirkwood-98dx4122.dtsi > @@ -1,6 +1,6 @@ > / { > mbus at f1000000 { > - pciec: pcie-controller at 82000000 { > + pciec: pcie at 82000000 { > compatible = "marvell,kirkwood-pcie"; > status = "disabled"; > device_type = "pci"; > @@ -24,6 +24,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 > 0x81000000 0 0 0x81000000 0x1 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &intc 9>; > marvell,pcie-port = <0>; > -- > 2.10.1 > -- Gregory Clement, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com ^ permalink raw reply [flat|nested] 78+ messages in thread
* Re: [PATCH 02/15] ARM: dts: marvell: fix PCI bus dtc warnings @ 2017-03-24 14:17 ` Gregory CLEMENT 0 siblings, 0 replies; 78+ messages in thread From: Gregory CLEMENT @ 2017-03-24 14:17 UTC (permalink / raw) To: Rob Herring Cc: devicetree, Jason Cooper, Andrew Lunn, arm, Bjorn Helgaas, linux-arm-kernel, Sebastian Hesselbarth Hi Rob, On mer., mars 22 2017, Rob Herring <robh@kernel.org> wrote: > dtc recently added PCI bus checks. Fix these warnings. Could you rebase your patch on mvebu/dt or linux-next because it doesn't apply as is. Thanks, Gregory > > Signed-off-by: Rob Herring <robh@kernel.org> > Cc: Bjorn Helgaas <bhelgaas@google.com> > Cc: Jason Cooper <jason@lakedaemon.net> > Cc: Andrew Lunn <andrew@lunn.ch> > Cc: Gregory Clement <gregory.clement@free-electrons.com> > Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> > --- > Sub-arch maintainers, please apply to your trees unless arm-soc wants > to take the whole lot. > > Documentation/devicetree/bindings/pci/mvebu-pci.txt | 2 +- > arch/arm/boot/dts/armada-370.dtsi | 4 +++- > arch/arm/boot/dts/armada-375.dtsi | 4 +++- > arch/arm/boot/dts/armada-380.dtsi | 5 ++++- > arch/arm/boot/dts/armada-385-db-ap.dts | 2 +- > arch/arm/boot/dts/armada-385-linksys.dtsi | 2 +- > arch/arm/boot/dts/armada-385-turris-omnia.dts | 2 +- > arch/arm/boot/dts/armada-385.dtsi | 6 +++++- > arch/arm/boot/dts/armada-388-clearfog.dts | 2 +- > arch/arm/boot/dts/armada-388-clearfog.dtsi | 2 +- > arch/arm/boot/dts/armada-388-db.dts | 2 +- > arch/arm/boot/dts/armada-388-gp.dts | 2 +- > arch/arm/boot/dts/armada-388-rd.dts | 2 +- > arch/arm/boot/dts/armada-390-db.dts | 2 +- > arch/arm/boot/dts/armada-395-gp.dts | 2 +- > arch/arm/boot/dts/armada-398-db.dts | 2 +- > arch/arm/boot/dts/armada-39x.dtsi | 6 +++++- > arch/arm/boot/dts/armada-xp-98dx3236.dtsi | 3 ++- > arch/arm/boot/dts/armada-xp-db.dts | 2 +- > arch/arm/boot/dts/armada-xp-gp.dts | 2 +- > arch/arm/boot/dts/armada-xp-mv78230.dtsi | 7 ++++++- > arch/arm/boot/dts/armada-xp-mv78260.dtsi | 11 ++++++++++- > arch/arm/boot/dts/armada-xp-mv78460.dtsi | 14 ++++++++++++-- > arch/arm/boot/dts/dove-d3plug.dts | 4 ++-- > arch/arm/boot/dts/dove.dtsi | 8 +++++--- > arch/arm/boot/dts/kirkwood-6192.dtsi | 3 ++- > arch/arm/boot/dts/kirkwood-6281.dtsi | 3 ++- > arch/arm/boot/dts/kirkwood-6282.dtsi | 4 +++- > arch/arm/boot/dts/kirkwood-98dx4122.dtsi | 3 ++- > 29 files changed, 80 insertions(+), 33 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pci/mvebu-pci.txt b/Documentation/devicetree/bindings/pci/mvebu-pci.txt > index 2de6f65ecfb1..e5af2e8461cf 100644 > --- a/Documentation/devicetree/bindings/pci/mvebu-pci.txt > +++ b/Documentation/devicetree/bindings/pci/mvebu-pci.txt > @@ -286,7 +286,7 @@ pcie-controller { > status = "disabled"; > }; > > - pcie@10,0 { > + pcie@a,0 { > device_type = "pci"; > assigned-addresses = <0x82005000 0 0x82000 0 0x2000>; > reg = <0x5000 0 0 0 0>; > diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi > index cc011c8bc36b..b9af7b22f0a0 100644 > --- a/arch/arm/boot/dts/armada-370.dtsi > +++ b/arch/arm/boot/dts/armada-370.dtsi > @@ -72,7 +72,7 @@ > reg = <MBUS_ID(0x01, 0xe0) 0 0x100000>; > }; > > - pciec: pcie-controller@82000000 { > + pciec: pcie@82000000 { > compatible = "marvell,armada-370-pcie"; > status = "disabled"; > device_type = "pci"; > @@ -100,6 +100,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 > 0x81000000 0 0 0x81000000 0x1 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 58>; > marvell,pcie-port = <0>; > @@ -117,6 +118,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 > 0x81000000 0 0 0x81000000 0x2 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 62>; > marvell,pcie-port = <1>; > diff --git a/arch/arm/boot/dts/armada-375.dtsi b/arch/arm/boot/dts/armada-375.dtsi > index 50c5e8417802..7225c7ce9a8d 100644 > --- a/arch/arm/boot/dts/armada-375.dtsi > +++ b/arch/arm/boot/dts/armada-375.dtsi > @@ -582,7 +582,7 @@ > }; > }; > > - pciec: pcie-controller@82000000 { > + pciec: pcie@82000000 { > compatible = "marvell,armada-370-pcie"; > status = "disabled"; > device_type = "pci"; > @@ -610,6 +610,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 > 0x81000000 0 0 0x81000000 0x1 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; > marvell,pcie-port = <0>; > @@ -627,6 +628,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 > 0x81000000 0 0 0x81000000 0x2 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; > marvell,pcie-port = <0>; > diff --git a/arch/arm/boot/dts/armada-380.dtsi b/arch/arm/boot/dts/armada-380.dtsi > index e392f6036f39..132596fd0860 100644 > --- a/arch/arm/boot/dts/armada-380.dtsi > +++ b/arch/arm/boot/dts/armada-380.dtsi > @@ -71,7 +71,7 @@ > }; > }; > > - pcie-controller { > + pcie { > compatible = "marvell,armada-370-pcie"; > status = "disabled"; > device_type = "pci"; > @@ -104,6 +104,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 > 0x81000000 0 0 0x81000000 0x1 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; > marvell,pcie-port = <0>; > @@ -122,6 +123,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 > 0x81000000 0 0 0x81000000 0x2 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; > marvell,pcie-port = <1>; > @@ -140,6 +142,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 > 0x81000000 0 0 0x81000000 0x3 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; > marvell,pcie-port = <2>; > diff --git a/arch/arm/boot/dts/armada-385-db-ap.dts b/arch/arm/boot/dts/armada-385-db-ap.dts > index db5b9f6b615d..25d2d720dc0e 100644 > --- a/arch/arm/boot/dts/armada-385-db-ap.dts > +++ b/arch/arm/boot/dts/armada-385-db-ap.dts > @@ -209,7 +209,7 @@ > status = "okay"; > }; > > - pcie-controller { > + pcie { > status = "okay"; > > /* > diff --git a/arch/arm/boot/dts/armada-385-linksys.dtsi b/arch/arm/boot/dts/armada-385-linksys.dtsi > index df47bf1ea5eb..39f62d5ef528 100644 > --- a/arch/arm/boot/dts/armada-385-linksys.dtsi > +++ b/arch/arm/boot/dts/armada-385-linksys.dtsi > @@ -241,7 +241,7 @@ > }; > }; > > - pcie-controller { > + pcie { > status = "okay"; > > pcie@1,0 { > diff --git a/arch/arm/boot/dts/armada-385-turris-omnia.dts b/arch/arm/boot/dts/armada-385-turris-omnia.dts > index 28eede180e4f..5511c84849ee 100644 > --- a/arch/arm/boot/dts/armada-385-turris-omnia.dts > +++ b/arch/arm/boot/dts/armada-385-turris-omnia.dts > @@ -96,7 +96,7 @@ > }; > }; > > - pcie-controller { > + pcie { > status = "okay"; > > pcie@1,0 { > diff --git a/arch/arm/boot/dts/armada-385.dtsi b/arch/arm/boot/dts/armada-385.dtsi > index 8e63be33472e..534bde3fc579 100644 > --- a/arch/arm/boot/dts/armada-385.dtsi > +++ b/arch/arm/boot/dts/armada-385.dtsi > @@ -76,7 +76,7 @@ > }; > }; > > - pcie-controller { > + pcie { > compatible = "marvell,armada-370-pcie"; > status = "disabled"; > device_type = "pci"; > @@ -115,6 +115,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 > 0x81000000 0 0 0x81000000 0x1 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; > marvell,pcie-port = <0>; > @@ -133,6 +134,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 > 0x81000000 0 0 0x81000000 0x2 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; > marvell,pcie-port = <1>; > @@ -151,6 +153,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 > 0x81000000 0 0 0x81000000 0x3 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; > marvell,pcie-port = <2>; > @@ -172,6 +175,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0 > 0x81000000 0 0 0x81000000 0x4 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; > marvell,pcie-port = <3>; > diff --git a/arch/arm/boot/dts/armada-388-clearfog.dts b/arch/arm/boot/dts/armada-388-clearfog.dts > index 2745b7416313..df981c34aff6 100644 > --- a/arch/arm/boot/dts/armada-388-clearfog.dts > +++ b/arch/arm/boot/dts/armada-388-clearfog.dts > @@ -62,7 +62,7 @@ > }; > }; > > - pcie-controller { > + pcie { > pcie@3,0 { > /* Port 2, Lane 0. CON2, nearest CPU. */ > reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>; > diff --git a/arch/arm/boot/dts/armada-388-clearfog.dtsi b/arch/arm/boot/dts/armada-388-clearfog.dtsi > index 0f5938bede53..68acfc968706 100644 > --- a/arch/arm/boot/dts/armada-388-clearfog.dtsi > +++ b/arch/arm/boot/dts/armada-388-clearfog.dtsi > @@ -104,7 +104,7 @@ > }; > }; > > - pcie-controller { > + pcie { > status = "okay"; > /* > * The two PCIe units are accessible through > diff --git a/arch/arm/boot/dts/armada-388-db.dts b/arch/arm/boot/dts/armada-388-db.dts > index 1ac923826445..a4ec1fa37529 100644 > --- a/arch/arm/boot/dts/armada-388-db.dts > +++ b/arch/arm/boot/dts/armada-388-db.dts > @@ -172,7 +172,7 @@ > status = "okay"; > }; > > - pcie-controller { > + pcie { > status = "okay"; > /* > * The two PCIe units are accessible through > diff --git a/arch/arm/boot/dts/armada-388-gp.dts b/arch/arm/boot/dts/armada-388-gp.dts > index 895fa6cfa15a..f2eb5464af1f 100644 > --- a/arch/arm/boot/dts/armada-388-gp.dts > +++ b/arch/arm/boot/dts/armada-388-gp.dts > @@ -240,7 +240,7 @@ > status = "okay"; > }; > > - pcie-controller { > + pcie { > status = "okay"; > /* > * One PCIe units is accessible through > diff --git a/arch/arm/boot/dts/armada-388-rd.dts b/arch/arm/boot/dts/armada-388-rd.dts > index af82f275eac2..9cc3ca0376b9 100644 > --- a/arch/arm/boot/dts/armada-388-rd.dts > +++ b/arch/arm/boot/dts/armada-388-rd.dts > @@ -117,7 +117,7 @@ > }; > }; > > - pcie-controller { > + pcie { > status = "okay"; > /* > * One PCIe units is accessible through > diff --git a/arch/arm/boot/dts/armada-390-db.dts b/arch/arm/boot/dts/armada-390-db.dts > index 2afed2ce4741..c718a5242595 100644 > --- a/arch/arm/boot/dts/armada-390-db.dts > +++ b/arch/arm/boot/dts/armada-390-db.dts > @@ -123,7 +123,7 @@ > }; > }; > > - pcie-controller { > + pcie { > status = "okay"; > > /* CON30 */ > diff --git a/arch/arm/boot/dts/armada-395-gp.dts b/arch/arm/boot/dts/armada-395-gp.dts > index 2cdbba804c1e..ef491b524fd6 100644 > --- a/arch/arm/boot/dts/armada-395-gp.dts > +++ b/arch/arm/boot/dts/armada-395-gp.dts > @@ -139,7 +139,7 @@ > }; > }; > > - pcie-controller { > + pcie { > status = "okay"; > > /* > diff --git a/arch/arm/boot/dts/armada-398-db.dts b/arch/arm/boot/dts/armada-398-db.dts > index e8604281c3c9..f0e0379f7619 100644 > --- a/arch/arm/boot/dts/armada-398-db.dts > +++ b/arch/arm/boot/dts/armada-398-db.dts > @@ -118,7 +118,7 @@ > }; > }; > > - pcie-controller { > + pcie { > status = "okay"; > > pcie@1,0 { > diff --git a/arch/arm/boot/dts/armada-39x.dtsi b/arch/arm/boot/dts/armada-39x.dtsi > index 60fbfd5907c7..ea657071e278 100644 > --- a/arch/arm/boot/dts/armada-39x.dtsi > +++ b/arch/arm/boot/dts/armada-39x.dtsi > @@ -442,7 +442,7 @@ > }; > }; > > - pcie-controller { > + pcie { > compatible = "marvell,armada-370-pcie"; > status = "disabled"; > device_type = "pci"; > @@ -481,6 +481,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 > 0x81000000 0 0 0x81000000 0x1 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; > marvell,pcie-port = <0>; > @@ -499,6 +500,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 > 0x81000000 0 0 0x81000000 0x2 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; > marvell,pcie-port = <1>; > @@ -517,6 +519,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 > 0x81000000 0 0 0x81000000 0x3 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; > marvell,pcie-port = <2>; > @@ -538,6 +541,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0 > 0x81000000 0 0 0x81000000 0x4 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; > marvell,pcie-port = <3>; > diff --git a/arch/arm/boot/dts/armada-xp-98dx3236.dtsi b/arch/arm/boot/dts/armada-xp-98dx3236.dtsi > index f6a03dcee5ef..d79c66cd7ce5 100644 > --- a/arch/arm/boot/dts/armada-xp-98dx3236.dtsi > +++ b/arch/arm/boot/dts/armada-xp-98dx3236.dtsi > @@ -81,7 +81,7 @@ > /* > * 98DX3236 has 1 x1 PCIe unit Gen2.0 > */ > - pciec: pcie-controller@82000000 { > + pciec: pcie@82000000 { > compatible = "marvell,armada-xp-pcie"; > status = "disabled"; > device_type = "pci"; > @@ -107,6 +107,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 > 0x81000000 0 0 0x81000000 0x1 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 58>; > marvell,pcie-port = <0>; > diff --git a/arch/arm/boot/dts/armada-xp-db.dts b/arch/arm/boot/dts/armada-xp-db.dts > index a33974254d8c..065282c21789 100644 > --- a/arch/arm/boot/dts/armada-xp-db.dts > +++ b/arch/arm/boot/dts/armada-xp-db.dts > @@ -242,7 +242,7 @@ > /* Port 2, Lane 0 */ > status = "okay"; > }; > - pcie@10,0 { > + pcie@a,0 { > /* Port 3, Lane 0 */ > status = "okay"; > }; > diff --git a/arch/arm/boot/dts/armada-xp-gp.dts b/arch/arm/boot/dts/armada-xp-gp.dts > index d62bf7bea1df..ac9eab8ac186 100644 > --- a/arch/arm/boot/dts/armada-xp-gp.dts > +++ b/arch/arm/boot/dts/armada-xp-gp.dts > @@ -227,7 +227,7 @@ > /* Port 2, Lane 0 */ > status = "okay"; > }; > - pcie@10,0 { > + pcie@a,0 { > /* Port 3, Lane 0 */ > status = "okay"; > }; > diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi > index 07c5090ecd29..9fef63d02b0a 100644 > --- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi > +++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi > @@ -86,7 +86,7 @@ > * configured as x4 or quad x1 lanes. One unit is > * x1 only. > */ > - pciec: pcie-controller@82000000 { > + pciec: pcie@82000000 { > compatible = "marvell,armada-xp-pcie"; > status = "disabled"; > device_type = "pci"; > @@ -123,6 +123,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 > 0x81000000 0 0 0x81000000 0x1 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 58>; > marvell,pcie-port = <0>; > @@ -140,6 +141,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 > 0x81000000 0 0 0x81000000 0x2 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 59>; > marvell,pcie-port = <0>; > @@ -157,6 +159,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 > 0x81000000 0 0 0x81000000 0x3 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 60>; > marvell,pcie-port = <0>; > @@ -174,6 +177,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0 > 0x81000000 0 0 0x81000000 0x4 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 61>; > marvell,pcie-port = <0>; > @@ -191,6 +195,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0 > 0x81000000 0 0 0x81000000 0x5 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 62>; > marvell,pcie-port = <1>; > diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi > index 64e936ae7b22..c753ebd86d23 100644 > --- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi > +++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi > @@ -87,7 +87,7 @@ > * configured as x4 or quad x1 lanes. One unit is > * x4 only. > */ > - pciec: pcie-controller@82000000 { > + pciec: pcie@82000000 { > compatible = "marvell,armada-xp-pcie"; > status = "disabled"; > device_type = "pci"; > @@ -138,6 +138,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 > 0x81000000 0 0 0x81000000 0x1 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 58>; > marvell,pcie-port = <0>; > @@ -155,6 +156,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 > 0x81000000 0 0 0x81000000 0x2 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 59>; > marvell,pcie-port = <0>; > @@ -172,6 +174,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 > 0x81000000 0 0 0x81000000 0x3 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 60>; > marvell,pcie-port = <0>; > @@ -189,6 +192,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0 > 0x81000000 0 0 0x81000000 0x4 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 61>; > marvell,pcie-port = <0>; > @@ -206,6 +210,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0 > 0x81000000 0 0 0x81000000 0x5 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 62>; > marvell,pcie-port = <1>; > @@ -223,6 +228,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x6 0 1 0 > 0x81000000 0 0 0x81000000 0x6 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 63>; > marvell,pcie-port = <1>; > @@ -240,6 +246,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x7 0 1 0 > 0x81000000 0 0 0x81000000 0x7 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 64>; > marvell,pcie-port = <1>; > @@ -257,6 +264,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x8 0 1 0 > 0x81000000 0 0 0x81000000 0x8 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 65>; > marvell,pcie-port = <1>; > @@ -274,6 +282,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0 > 0x81000000 0 0 0x81000000 0x9 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 99>; > marvell,pcie-port = <2>; > diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi > index d1383dde43eb..d294f27540ec 100644 > --- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi > +++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi > @@ -104,7 +104,7 @@ > * configured as x4 or quad x1 lanes. Two units are > * x4/x1. > */ > - pciec: pcie-controller@82000000 { > + pciec: pcie@82000000 { > compatible = "marvell,armada-xp-pcie"; > status = "disabled"; > device_type = "pci"; > @@ -159,6 +159,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 > 0x81000000 0 0 0x81000000 0x1 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 58>; > marvell,pcie-port = <0>; > @@ -176,6 +177,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 > 0x81000000 0 0 0x81000000 0x2 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 59>; > marvell,pcie-port = <0>; > @@ -193,6 +195,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 > 0x81000000 0 0 0x81000000 0x3 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 60>; > marvell,pcie-port = <0>; > @@ -210,6 +213,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0 > 0x81000000 0 0 0x81000000 0x4 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 61>; > marvell,pcie-port = <0>; > @@ -227,6 +231,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0 > 0x81000000 0 0 0x81000000 0x5 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 62>; > marvell,pcie-port = <1>; > @@ -244,6 +249,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x6 0 1 0 > 0x81000000 0 0 0x81000000 0x6 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 63>; > marvell,pcie-port = <1>; > @@ -261,6 +267,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x7 0 1 0 > 0x81000000 0 0 0x81000000 0x7 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 64>; > marvell,pcie-port = <1>; > @@ -278,6 +285,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x8 0 1 0 > 0x81000000 0 0 0x81000000 0x8 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 65>; > marvell,pcie-port = <1>; > @@ -295,6 +303,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0 > 0x81000000 0 0 0x81000000 0x9 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 99>; > marvell,pcie-port = <2>; > @@ -303,7 +312,7 @@ > status = "disabled"; > }; > > - pcie10: pcie@10,0 { > + pcie10: pcie@a,0 { > device_type = "pci"; > assigned-addresses = <0x82005000 0 0x82000 0 0x2000>; > reg = <0x5000 0 0 0 0>; > @@ -312,6 +321,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0xa 0 1 0 > 0x81000000 0 0 0x81000000 0xa 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &mpic 103>; > marvell,pcie-port = <3>; > diff --git a/arch/arm/boot/dts/dove-d3plug.dts b/arch/arm/boot/dts/dove-d3plug.dts > index f5f59bb5a534..e88ff83f1dec 100644 > --- a/arch/arm/boot/dts/dove-d3plug.dts > +++ b/arch/arm/boot/dts/dove-d3plug.dts > @@ -88,7 +88,7 @@ > &pcie { > status = "okay"; > /* Fresco Logic USB3.0 xHCI controller */ > - pcie-port@0 { > + pcie@1 { > status = "okay"; > reset-gpios = <&gpio0 26 1>; > reset-delay-us = <20000>; > @@ -96,7 +96,7 @@ > pinctrl-names = "default"; > }; > /* Mini-PCIe slot */ > - pcie-port@1 { > + pcie@2 { > status = "okay"; > reset-gpios = <&gpio0 25 1>; > }; > diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi > index 698d58cea20d..1475d3672e56 100644 > --- a/arch/arm/boot/dts/dove.dtsi > +++ b/arch/arm/boot/dts/dove.dtsi > @@ -89,7 +89,7 @@ > MBUS_ID(0x03, 0x01) 0 0xc8000000 0x0100000 /* CESA SRAM 1M */ > MBUS_ID(0x0d, 0x00) 0 0xf0000000 0x0100000>; /* PMU SRAM 1M */ > > - pcie: pcie-controller { > + pcie: pcie { > compatible = "marvell,dove-pcie"; > status = "disabled"; > device_type = "pci"; > @@ -106,7 +106,7 @@ > 0x82000000 0x2 0x0 MBUS_ID(0x08, 0xe8) 0 1 0 /* Port 1.0 Mem */ > 0x81000000 0x2 0x0 MBUS_ID(0x08, 0xe0) 0 1 0>; /* Port 1.0 I/O */ > > - pcie0: pcie-port@0 { > + pcie0: pcie@1 { > device_type = "pci"; > status = "disabled"; > assigned-addresses = <0x82000800 0 0x40000 0 0x2000>; > @@ -118,13 +118,14 @@ > #size-cells = <2>; > ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 > 0x81000000 0 0 0x81000000 0x1 0 1 0>; > + bus-range = <0x00 0xff>; > > #interrupt-cells = <1>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &intc 16>; > }; > > - pcie1: pcie-port@1 { > + pcie1: pcie@2 { > device_type = "pci"; > status = "disabled"; > assigned-addresses = <0x82002800 0 0x80000 0 0x2000>; > @@ -136,6 +137,7 @@ > #size-cells = <2>; > ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 > 0x81000000 0 0 0x81000000 0x2 0 1 0>; > + bus-range = <0x00 0xff>; > > #interrupt-cells = <1>; > interrupt-map-mask = <0 0 0 0>; > diff --git a/arch/arm/boot/dts/kirkwood-6192.dtsi b/arch/arm/boot/dts/kirkwood-6192.dtsi > index d573e03f3134..f003f3f1bd65 100644 > --- a/arch/arm/boot/dts/kirkwood-6192.dtsi > +++ b/arch/arm/boot/dts/kirkwood-6192.dtsi > @@ -1,6 +1,6 @@ > / { > mbus@f1000000 { > - pciec: pcie-controller@82000000 { > + pciec: pcie@82000000 { > compatible = "marvell,kirkwood-pcie"; > status = "disabled"; > device_type = "pci"; > @@ -24,6 +24,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 > 0x81000000 0 0 0x81000000 0x1 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &intc 9>; > marvell,pcie-port = <0>; > diff --git a/arch/arm/boot/dts/kirkwood-6281.dtsi b/arch/arm/boot/dts/kirkwood-6281.dtsi > index 748d0b62f233..47d4b3d3d9e9 100644 > --- a/arch/arm/boot/dts/kirkwood-6281.dtsi > +++ b/arch/arm/boot/dts/kirkwood-6281.dtsi > @@ -1,6 +1,6 @@ > / { > mbus@f1000000 { > - pciec: pcie-controller@82000000 { > + pciec: pcie@82000000 { > compatible = "marvell,kirkwood-pcie"; > status = "disabled"; > device_type = "pci"; > @@ -24,6 +24,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 > 0x81000000 0 0 0x81000000 0x1 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &intc 9>; > marvell,pcie-port = <0>; > diff --git a/arch/arm/boot/dts/kirkwood-6282.dtsi b/arch/arm/boot/dts/kirkwood-6282.dtsi > index bb63d2d50fc5..a13dad0a7c08 100644 > --- a/arch/arm/boot/dts/kirkwood-6282.dtsi > +++ b/arch/arm/boot/dts/kirkwood-6282.dtsi > @@ -1,6 +1,6 @@ > / { > mbus@f1000000 { > - pciec: pcie-controller@82000000 { > + pciec: pcie@82000000 { > compatible = "marvell,kirkwood-pcie"; > status = "disabled"; > device_type = "pci"; > @@ -28,6 +28,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 > 0x81000000 0 0 0x81000000 0x1 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &intc 9>; > marvell,pcie-port = <0>; > @@ -45,6 +46,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 > 0x81000000 0 0 0x81000000 0x2 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &intc 10>; > marvell,pcie-port = <1>; > diff --git a/arch/arm/boot/dts/kirkwood-98dx4122.dtsi b/arch/arm/boot/dts/kirkwood-98dx4122.dtsi > index 720c210d491d..90d4d71b6683 100644 > --- a/arch/arm/boot/dts/kirkwood-98dx4122.dtsi > +++ b/arch/arm/boot/dts/kirkwood-98dx4122.dtsi > @@ -1,6 +1,6 @@ > / { > mbus@f1000000 { > - pciec: pcie-controller@82000000 { > + pciec: pcie@82000000 { > compatible = "marvell,kirkwood-pcie"; > status = "disabled"; > device_type = "pci"; > @@ -24,6 +24,7 @@ > #interrupt-cells = <1>; > ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 > 0x81000000 0 0 0x81000000 0x1 0 1 0>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 0>; > interrupt-map = <0 0 0 0 &intc 9>; > marvell,pcie-port = <0>; > -- > 2.10.1 > -- Gregory Clement, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com ^ permalink raw reply [flat|nested] 78+ messages in thread
[parent not found: <20170322020313.24338-1-robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>]
* [PATCH 03/15] ARM: dts: ti: fix PCI bus dtc warnings 2017-03-22 2:02 ` Rob Herring @ 2017-03-22 2:03 ` Rob Herring -1 siblings, 0 replies; 78+ messages in thread From: Rob Herring @ 2017-03-22 2:03 UTC (permalink / raw) To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, devicetree-u79uwXL29TY76Z2rM5mHXA Cc: arm-DgEjT+Ai2ygdnm+yROfE0A, Benoît Cousson, Tony Lindgren, linux-omap-u79uwXL29TY76Z2rM5mHXA dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> Cc: "Benoît Cousson" <bcousson-rdvid1DuHRBWk0Htik3J/w@public.gmane.org> Cc: Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org> Cc: linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org --- Sub-arch maintainers, please apply to your trees unless arm-soc wants to take the whole lot. arch/arm/boot/dts/dra7.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 2c9e56f4aac5..bbfb9d5a70a9 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -283,6 +283,7 @@ device_type = "pci"; ranges = <0x81000000 0 0 0x03000 0 0x00010000 0x82000000 0 0x20013000 0x13000 0 0xffed000>; + bus-range = <0x00 0xff>; #interrupt-cells = <1>; num-lanes = <1>; linux,pci-domain = <0>; @@ -319,6 +320,7 @@ device_type = "pci"; ranges = <0x81000000 0 0 0x03000 0 0x00010000 0x82000000 0 0x30013000 0x13000 0 0xffed000>; + bus-range = <0x00 0xff>; #interrupt-cells = <1>; num-lanes = <1>; linux,pci-domain = <1>; -- 2.10.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply related [flat|nested] 78+ messages in thread
* [PATCH 03/15] ARM: dts: ti: fix PCI bus dtc warnings @ 2017-03-22 2:03 ` Rob Herring 0 siblings, 0 replies; 78+ messages in thread From: Rob Herring @ 2017-03-22 2:03 UTC (permalink / raw) To: linux-arm-kernel dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh@kernel.org> Cc: "Beno?t Cousson" <bcousson@baylibre.com> Cc: Tony Lindgren <tony@atomide.com> Cc: linux-omap at vger.kernel.org --- Sub-arch maintainers, please apply to your trees unless arm-soc wants to take the whole lot. arch/arm/boot/dts/dra7.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 2c9e56f4aac5..bbfb9d5a70a9 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -283,6 +283,7 @@ device_type = "pci"; ranges = <0x81000000 0 0 0x03000 0 0x00010000 0x82000000 0 0x20013000 0x13000 0 0xffed000>; + bus-range = <0x00 0xff>; #interrupt-cells = <1>; num-lanes = <1>; linux,pci-domain = <0>; @@ -319,6 +320,7 @@ device_type = "pci"; ranges = <0x81000000 0 0 0x03000 0 0x00010000 0x82000000 0 0x30013000 0x13000 0 0xffed000>; + bus-range = <0x00 0xff>; #interrupt-cells = <1>; num-lanes = <1>; linux,pci-domain = <1>; -- 2.10.1 ^ permalink raw reply related [flat|nested] 78+ messages in thread
* [PATCH 08/15] ARM: dts: tegra: fix PCI bus dtc warnings 2017-03-22 2:02 ` Rob Herring @ 2017-03-22 2:03 ` Rob Herring -1 siblings, 0 replies; 78+ messages in thread From: Rob Herring @ 2017-03-22 2:03 UTC (permalink / raw) To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, devicetree-u79uwXL29TY76Z2rM5mHXA Cc: arm-DgEjT+Ai2ygdnm+yROfE0A, Stephen Warren, Thierry Reding, Alexandre Courbot, linux-tegra-u79uwXL29TY76Z2rM5mHXA dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> Cc: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> Cc: Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Cc: Alexandre Courbot <gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org --- Sub-arch maintainers, please apply to your trees unless arm-soc wants to take the whole lot. arch/arm/boot/dts/tegra124-apalis-eval.dts | 2 +- arch/arm/boot/dts/tegra124-apalis.dtsi | 2 +- arch/arm/boot/dts/tegra124-jetson-tk1.dts | 2 +- arch/arm/boot/dts/tegra124.dtsi | 4 +++- arch/arm/boot/dts/tegra20-harmony.dts | 2 +- arch/arm/boot/dts/tegra20-tamonten.dtsi | 2 +- arch/arm/boot/dts/tegra20-tec.dts | 2 +- arch/arm/boot/dts/tegra20-trimslice.dts | 2 +- arch/arm/boot/dts/tegra20.dtsi | 4 +++- arch/arm/boot/dts/tegra30-apalis-eval.dts | 2 +- arch/arm/boot/dts/tegra30-apalis.dtsi | 2 +- arch/arm/boot/dts/tegra30-beaver.dts | 2 +- arch/arm/boot/dts/tegra30-cardhu.dtsi | 2 +- arch/arm/boot/dts/tegra30.dtsi | 5 ++++- 14 files changed, 21 insertions(+), 14 deletions(-) diff --git a/arch/arm/boot/dts/tegra124-apalis-eval.dts b/arch/arm/boot/dts/tegra124-apalis-eval.dts index 5b860ad5cbee..ecffcd115fa7 100644 --- a/arch/arm/boot/dts/tegra124-apalis-eval.dts +++ b/arch/arm/boot/dts/tegra124-apalis-eval.dts @@ -63,7 +63,7 @@ stdout-path = "serial0:115200n8"; }; - pcie-controller@01003000 { + pcie@1003000 { pci@1,0 { status = "okay"; }; diff --git a/arch/arm/boot/dts/tegra124-apalis.dtsi b/arch/arm/boot/dts/tegra124-apalis.dtsi index f9e623bdd5c3..5d9b18ef5af6 100644 --- a/arch/arm/boot/dts/tegra124-apalis.dtsi +++ b/arch/arm/boot/dts/tegra124-apalis.dtsi @@ -54,7 +54,7 @@ reg = <0x0 0x80000000 0x0 0x80000000>; }; - pcie-controller@01003000 { + pcie@1003000 { status = "okay"; avddio-pex-supply = <&vdd_1v05>; diff --git a/arch/arm/boot/dts/tegra124-jetson-tk1.dts b/arch/arm/boot/dts/tegra124-jetson-tk1.dts index 53994f9fbbcc..7bacb2954f58 100644 --- a/arch/arm/boot/dts/tegra124-jetson-tk1.dts +++ b/arch/arm/boot/dts/tegra124-jetson-tk1.dts @@ -27,7 +27,7 @@ reg = <0x0 0x80000000 0x0 0x80000000>; }; - pcie-controller@01003000 { + pcie@1003000 { status = "okay"; avddio-pex-supply = <&vdd_1v05_run>; diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index 187a36c6d0fc..1b10b14a6abd 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi @@ -14,7 +14,7 @@ #address-cells = <2>; #size-cells = <2>; - pcie-controller@01003000 { + pcie@1003000 { compatible = "nvidia,tegra124-pcie"; device_type = "pci"; reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */ @@ -54,6 +54,7 @@ device_type = "pci"; assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>; reg = <0x000800 0 0 0 0>; + bus-range = <0x00 0xff>; status = "disabled"; #address-cells = <3>; @@ -67,6 +68,7 @@ device_type = "pci"; assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>; reg = <0x001000 0 0 0 0>; + bus-range = <0x00 0xff>; status = "disabled"; #address-cells = <3>; diff --git a/arch/arm/boot/dts/tegra20-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts index d4fb4d39ede7..41749693ec3c 100644 --- a/arch/arm/boot/dts/tegra20-harmony.dts +++ b/arch/arm/boot/dts/tegra20-harmony.dts @@ -566,7 +566,7 @@ nvidia,sys-clock-req-active-high; }; - pcie-controller@80003000 { + pcie@80003000 { status = "okay"; avdd-pex-supply = <&pci_vdd_reg>; diff --git a/arch/arm/boot/dts/tegra20-tamonten.dtsi b/arch/arm/boot/dts/tegra20-tamonten.dtsi index 27d2bbbf1eae..7361f4a82e80 100644 --- a/arch/arm/boot/dts/tegra20-tamonten.dtsi +++ b/arch/arm/boot/dts/tegra20-tamonten.dtsi @@ -478,7 +478,7 @@ nvidia,sys-clock-req-active-high; }; - pcie-controller@80003000 { + pcie@80003000 { avdd-pex-supply = <&pci_vdd_reg>; vdd-pex-supply = <&pci_vdd_reg>; avdd-pex-pll-supply = <&pci_vdd_reg>; diff --git a/arch/arm/boot/dts/tegra20-tec.dts b/arch/arm/boot/dts/tegra20-tec.dts index c12d8bead2ee..9cb534f4441e 100644 --- a/arch/arm/boot/dts/tegra20-tec.dts +++ b/arch/arm/boot/dts/tegra20-tec.dts @@ -32,7 +32,7 @@ }; }; - pcie-controller@80003000 { + pcie@80003000 { status = "okay"; pci@1,0 { diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts index 87b07fbadbbe..b902ab594afa 100644 --- a/arch/arm/boot/dts/tegra20-trimslice.dts +++ b/arch/arm/boot/dts/tegra20-trimslice.dts @@ -321,7 +321,7 @@ nvidia,sys-clock-req-active-high; }; - pcie-controller@80003000 { + pcie@80003000 { status = "okay"; avdd-pex-supply = <&pci_vdd_reg>; diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index e8807503f87c..7c85f97f72ea 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -586,7 +586,7 @@ reset-names = "fuse"; }; - pcie-controller@80003000 { + pcie@80003000 { compatible = "nvidia,tegra20-pcie"; device_type = "pci"; reg = <0x80003000 0x00000800 /* PADS registers */ @@ -625,6 +625,7 @@ device_type = "pci"; assigned-addresses = <0x82000800 0 0x80000000 0 0x1000>; reg = <0x000800 0 0 0 0>; + bus-range = <0x00 0xff>; status = "disabled"; #address-cells = <3>; @@ -638,6 +639,7 @@ device_type = "pci"; assigned-addresses = <0x82001000 0 0x80001000 0 0x1000>; reg = <0x001000 0 0 0 0>; + bus-range = <0x00 0xff>; status = "disabled"; #address-cells = <3>; diff --git a/arch/arm/boot/dts/tegra30-apalis-eval.dts b/arch/arm/boot/dts/tegra30-apalis-eval.dts index 99a69457dbf5..fc530e4a96c4 100644 --- a/arch/arm/boot/dts/tegra30-apalis-eval.dts +++ b/arch/arm/boot/dts/tegra30-apalis-eval.dts @@ -21,7 +21,7 @@ stdout-path = "serial0:115200n8"; }; - pcie-controller@00003000 { + pcie@3000 { status = "okay"; pci@1,0 { diff --git a/arch/arm/boot/dts/tegra30-apalis.dtsi b/arch/arm/boot/dts/tegra30-apalis.dtsi index f6c7c3e958ac..7a6a1a014603 100644 --- a/arch/arm/boot/dts/tegra30-apalis.dtsi +++ b/arch/arm/boot/dts/tegra30-apalis.dtsi @@ -9,7 +9,7 @@ model = "Toradex Apalis T30"; compatible = "toradex,apalis_t30", "nvidia,tegra30"; - pcie-controller@00003000 { + pcie@3000 { avdd-pexa-supply = <&vdd2_reg>; vdd-pexa-supply = <&vdd2_reg>; avdd-pexb-supply = <&vdd2_reg>; diff --git a/arch/arm/boot/dts/tegra30-beaver.dts b/arch/arm/boot/dts/tegra30-beaver.dts index 0350002849d5..4f41b18d9547 100644 --- a/arch/arm/boot/dts/tegra30-beaver.dts +++ b/arch/arm/boot/dts/tegra30-beaver.dts @@ -20,7 +20,7 @@ reg = <0x80000000 0x7ff00000>; }; - pcie-controller@00003000 { + pcie@3000 { status = "okay"; avdd-pexa-supply = <&ldo1_reg>; diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi index f11012bb58cc..83dc14a9b353 100644 --- a/arch/arm/boot/dts/tegra30-cardhu.dtsi +++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi @@ -43,7 +43,7 @@ reg = <0x80000000 0x40000000>; }; - pcie-controller@00003000 { + pcie@3000 { status = "okay"; /* AVDD_PEXA and VDD_PEXA inputs are grounded on Cardhu. */ diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index bbb1c002e7f1..13960fda7471 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -10,7 +10,7 @@ compatible = "nvidia,tegra30"; interrupt-parent = <&lic>; - pcie-controller@00003000 { + pcie@3000 { compatible = "nvidia,tegra30-pcie"; device_type = "pci"; reg = <0x00003000 0x00000800 /* PADS registers */ @@ -51,6 +51,7 @@ device_type = "pci"; assigned-addresses = <0x82000800 0 0x00000000 0 0x1000>; reg = <0x000800 0 0 0 0>; + bus-range = <0x00 0xff>; status = "disabled"; #address-cells = <3>; @@ -64,6 +65,7 @@ device_type = "pci"; assigned-addresses = <0x82001000 0 0x00001000 0 0x1000>; reg = <0x001000 0 0 0 0>; + bus-range = <0x00 0xff>; status = "disabled"; #address-cells = <3>; @@ -77,6 +79,7 @@ device_type = "pci"; assigned-addresses = <0x82001800 0 0x00004000 0 0x1000>; reg = <0x001800 0 0 0 0>; + bus-range = <0x00 0xff>; status = "disabled"; #address-cells = <3>; -- 2.10.1 ^ permalink raw reply related [flat|nested] 78+ messages in thread
* [PATCH 08/15] ARM: dts: tegra: fix PCI bus dtc warnings @ 2017-03-22 2:03 ` Rob Herring 0 siblings, 0 replies; 78+ messages in thread From: Rob Herring @ 2017-03-22 2:03 UTC (permalink / raw) To: linux-arm-kernel dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: linux-tegra at vger.kernel.org --- Sub-arch maintainers, please apply to your trees unless arm-soc wants to take the whole lot. arch/arm/boot/dts/tegra124-apalis-eval.dts | 2 +- arch/arm/boot/dts/tegra124-apalis.dtsi | 2 +- arch/arm/boot/dts/tegra124-jetson-tk1.dts | 2 +- arch/arm/boot/dts/tegra124.dtsi | 4 +++- arch/arm/boot/dts/tegra20-harmony.dts | 2 +- arch/arm/boot/dts/tegra20-tamonten.dtsi | 2 +- arch/arm/boot/dts/tegra20-tec.dts | 2 +- arch/arm/boot/dts/tegra20-trimslice.dts | 2 +- arch/arm/boot/dts/tegra20.dtsi | 4 +++- arch/arm/boot/dts/tegra30-apalis-eval.dts | 2 +- arch/arm/boot/dts/tegra30-apalis.dtsi | 2 +- arch/arm/boot/dts/tegra30-beaver.dts | 2 +- arch/arm/boot/dts/tegra30-cardhu.dtsi | 2 +- arch/arm/boot/dts/tegra30.dtsi | 5 ++++- 14 files changed, 21 insertions(+), 14 deletions(-) diff --git a/arch/arm/boot/dts/tegra124-apalis-eval.dts b/arch/arm/boot/dts/tegra124-apalis-eval.dts index 5b860ad5cbee..ecffcd115fa7 100644 --- a/arch/arm/boot/dts/tegra124-apalis-eval.dts +++ b/arch/arm/boot/dts/tegra124-apalis-eval.dts @@ -63,7 +63,7 @@ stdout-path = "serial0:115200n8"; }; - pcie-controller at 01003000 { + pcie at 1003000 { pci at 1,0 { status = "okay"; }; diff --git a/arch/arm/boot/dts/tegra124-apalis.dtsi b/arch/arm/boot/dts/tegra124-apalis.dtsi index f9e623bdd5c3..5d9b18ef5af6 100644 --- a/arch/arm/boot/dts/tegra124-apalis.dtsi +++ b/arch/arm/boot/dts/tegra124-apalis.dtsi @@ -54,7 +54,7 @@ reg = <0x0 0x80000000 0x0 0x80000000>; }; - pcie-controller at 01003000 { + pcie at 1003000 { status = "okay"; avddio-pex-supply = <&vdd_1v05>; diff --git a/arch/arm/boot/dts/tegra124-jetson-tk1.dts b/arch/arm/boot/dts/tegra124-jetson-tk1.dts index 53994f9fbbcc..7bacb2954f58 100644 --- a/arch/arm/boot/dts/tegra124-jetson-tk1.dts +++ b/arch/arm/boot/dts/tegra124-jetson-tk1.dts @@ -27,7 +27,7 @@ reg = <0x0 0x80000000 0x0 0x80000000>; }; - pcie-controller at 01003000 { + pcie at 1003000 { status = "okay"; avddio-pex-supply = <&vdd_1v05_run>; diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index 187a36c6d0fc..1b10b14a6abd 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi @@ -14,7 +14,7 @@ #address-cells = <2>; #size-cells = <2>; - pcie-controller at 01003000 { + pcie at 1003000 { compatible = "nvidia,tegra124-pcie"; device_type = "pci"; reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */ @@ -54,6 +54,7 @@ device_type = "pci"; assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>; reg = <0x000800 0 0 0 0>; + bus-range = <0x00 0xff>; status = "disabled"; #address-cells = <3>; @@ -67,6 +68,7 @@ device_type = "pci"; assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>; reg = <0x001000 0 0 0 0>; + bus-range = <0x00 0xff>; status = "disabled"; #address-cells = <3>; diff --git a/arch/arm/boot/dts/tegra20-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts index d4fb4d39ede7..41749693ec3c 100644 --- a/arch/arm/boot/dts/tegra20-harmony.dts +++ b/arch/arm/boot/dts/tegra20-harmony.dts @@ -566,7 +566,7 @@ nvidia,sys-clock-req-active-high; }; - pcie-controller at 80003000 { + pcie at 80003000 { status = "okay"; avdd-pex-supply = <&pci_vdd_reg>; diff --git a/arch/arm/boot/dts/tegra20-tamonten.dtsi b/arch/arm/boot/dts/tegra20-tamonten.dtsi index 27d2bbbf1eae..7361f4a82e80 100644 --- a/arch/arm/boot/dts/tegra20-tamonten.dtsi +++ b/arch/arm/boot/dts/tegra20-tamonten.dtsi @@ -478,7 +478,7 @@ nvidia,sys-clock-req-active-high; }; - pcie-controller at 80003000 { + pcie at 80003000 { avdd-pex-supply = <&pci_vdd_reg>; vdd-pex-supply = <&pci_vdd_reg>; avdd-pex-pll-supply = <&pci_vdd_reg>; diff --git a/arch/arm/boot/dts/tegra20-tec.dts b/arch/arm/boot/dts/tegra20-tec.dts index c12d8bead2ee..9cb534f4441e 100644 --- a/arch/arm/boot/dts/tegra20-tec.dts +++ b/arch/arm/boot/dts/tegra20-tec.dts @@ -32,7 +32,7 @@ }; }; - pcie-controller at 80003000 { + pcie at 80003000 { status = "okay"; pci at 1,0 { diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts index 87b07fbadbbe..b902ab594afa 100644 --- a/arch/arm/boot/dts/tegra20-trimslice.dts +++ b/arch/arm/boot/dts/tegra20-trimslice.dts @@ -321,7 +321,7 @@ nvidia,sys-clock-req-active-high; }; - pcie-controller at 80003000 { + pcie at 80003000 { status = "okay"; avdd-pex-supply = <&pci_vdd_reg>; diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index e8807503f87c..7c85f97f72ea 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -586,7 +586,7 @@ reset-names = "fuse"; }; - pcie-controller at 80003000 { + pcie at 80003000 { compatible = "nvidia,tegra20-pcie"; device_type = "pci"; reg = <0x80003000 0x00000800 /* PADS registers */ @@ -625,6 +625,7 @@ device_type = "pci"; assigned-addresses = <0x82000800 0 0x80000000 0 0x1000>; reg = <0x000800 0 0 0 0>; + bus-range = <0x00 0xff>; status = "disabled"; #address-cells = <3>; @@ -638,6 +639,7 @@ device_type = "pci"; assigned-addresses = <0x82001000 0 0x80001000 0 0x1000>; reg = <0x001000 0 0 0 0>; + bus-range = <0x00 0xff>; status = "disabled"; #address-cells = <3>; diff --git a/arch/arm/boot/dts/tegra30-apalis-eval.dts b/arch/arm/boot/dts/tegra30-apalis-eval.dts index 99a69457dbf5..fc530e4a96c4 100644 --- a/arch/arm/boot/dts/tegra30-apalis-eval.dts +++ b/arch/arm/boot/dts/tegra30-apalis-eval.dts @@ -21,7 +21,7 @@ stdout-path = "serial0:115200n8"; }; - pcie-controller at 00003000 { + pcie at 3000 { status = "okay"; pci at 1,0 { diff --git a/arch/arm/boot/dts/tegra30-apalis.dtsi b/arch/arm/boot/dts/tegra30-apalis.dtsi index f6c7c3e958ac..7a6a1a014603 100644 --- a/arch/arm/boot/dts/tegra30-apalis.dtsi +++ b/arch/arm/boot/dts/tegra30-apalis.dtsi @@ -9,7 +9,7 @@ model = "Toradex Apalis T30"; compatible = "toradex,apalis_t30", "nvidia,tegra30"; - pcie-controller at 00003000 { + pcie at 3000 { avdd-pexa-supply = <&vdd2_reg>; vdd-pexa-supply = <&vdd2_reg>; avdd-pexb-supply = <&vdd2_reg>; diff --git a/arch/arm/boot/dts/tegra30-beaver.dts b/arch/arm/boot/dts/tegra30-beaver.dts index 0350002849d5..4f41b18d9547 100644 --- a/arch/arm/boot/dts/tegra30-beaver.dts +++ b/arch/arm/boot/dts/tegra30-beaver.dts @@ -20,7 +20,7 @@ reg = <0x80000000 0x7ff00000>; }; - pcie-controller at 00003000 { + pcie at 3000 { status = "okay"; avdd-pexa-supply = <&ldo1_reg>; diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi index f11012bb58cc..83dc14a9b353 100644 --- a/arch/arm/boot/dts/tegra30-cardhu.dtsi +++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi @@ -43,7 +43,7 @@ reg = <0x80000000 0x40000000>; }; - pcie-controller at 00003000 { + pcie at 3000 { status = "okay"; /* AVDD_PEXA and VDD_PEXA inputs are grounded on Cardhu. */ diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index bbb1c002e7f1..13960fda7471 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -10,7 +10,7 @@ compatible = "nvidia,tegra30"; interrupt-parent = <&lic>; - pcie-controller at 00003000 { + pcie at 3000 { compatible = "nvidia,tegra30-pcie"; device_type = "pci"; reg = <0x00003000 0x00000800 /* PADS registers */ @@ -51,6 +51,7 @@ device_type = "pci"; assigned-addresses = <0x82000800 0 0x00000000 0 0x1000>; reg = <0x000800 0 0 0 0>; + bus-range = <0x00 0xff>; status = "disabled"; #address-cells = <3>; @@ -64,6 +65,7 @@ device_type = "pci"; assigned-addresses = <0x82001000 0 0x00001000 0 0x1000>; reg = <0x001000 0 0 0 0>; + bus-range = <0x00 0xff>; status = "disabled"; #address-cells = <3>; @@ -77,6 +79,7 @@ device_type = "pci"; assigned-addresses = <0x82001800 0 0x00004000 0 0x1000>; reg = <0x001800 0 0 0 0>; + bus-range = <0x00 0xff>; status = "disabled"; #address-cells = <3>; -- 2.10.1 ^ permalink raw reply related [flat|nested] 78+ messages in thread
[parent not found: <20170322020313.24338-8-robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>]
* Re: [PATCH 08/15] ARM: dts: tegra: fix PCI bus dtc warnings 2017-03-22 2:03 ` Rob Herring @ 2017-06-13 14:51 ` Thierry Reding -1 siblings, 0 replies; 78+ messages in thread From: Thierry Reding @ 2017-06-13 14:51 UTC (permalink / raw) To: Rob Herring Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, devicetree-u79uwXL29TY76Z2rM5mHXA, arm-DgEjT+Ai2ygdnm+yROfE0A, Stephen Warren, Alexandre Courbot, linux-tegra-u79uwXL29TY76Z2rM5mHXA [-- Attachment #1: Type: text/plain, Size: 1529 bytes --] On Tue, Mar 21, 2017 at 09:03:06PM -0500, Rob Herring wrote: > dtc recently added PCI bus checks. Fix these warnings. > > Signed-off-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> > Cc: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> > Cc: Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> > Cc: Alexandre Courbot <gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> > Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org > --- > Sub-arch maintainers, please apply to your trees unless arm-soc wants > to take the whole lot. > > arch/arm/boot/dts/tegra124-apalis-eval.dts | 2 +- > arch/arm/boot/dts/tegra124-apalis.dtsi | 2 +- > arch/arm/boot/dts/tegra124-jetson-tk1.dts | 2 +- > arch/arm/boot/dts/tegra124.dtsi | 4 +++- > arch/arm/boot/dts/tegra20-harmony.dts | 2 +- > arch/arm/boot/dts/tegra20-tamonten.dtsi | 2 +- > arch/arm/boot/dts/tegra20-tec.dts | 2 +- > arch/arm/boot/dts/tegra20-trimslice.dts | 2 +- > arch/arm/boot/dts/tegra20.dtsi | 4 +++- > arch/arm/boot/dts/tegra30-apalis-eval.dts | 2 +- > arch/arm/boot/dts/tegra30-apalis.dtsi | 2 +- > arch/arm/boot/dts/tegra30-beaver.dts | 2 +- > arch/arm/boot/dts/tegra30-cardhu.dtsi | 2 +- > arch/arm/boot/dts/tegra30.dtsi | 5 ++++- > 14 files changed, 21 insertions(+), 14 deletions(-) Doesn't look like ARM SoC took the lot, so I've applied this to the Tegra tree for v4.13. Thanks, Thierry [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 833 bytes --] ^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH 08/15] ARM: dts: tegra: fix PCI bus dtc warnings @ 2017-06-13 14:51 ` Thierry Reding 0 siblings, 0 replies; 78+ messages in thread From: Thierry Reding @ 2017-06-13 14:51 UTC (permalink / raw) To: linux-arm-kernel On Tue, Mar 21, 2017 at 09:03:06PM -0500, Rob Herring wrote: > dtc recently added PCI bus checks. Fix these warnings. > > Signed-off-by: Rob Herring <robh@kernel.org> > Cc: Stephen Warren <swarren@wwwdotorg.org> > Cc: Thierry Reding <thierry.reding@gmail.com> > Cc: Alexandre Courbot <gnurou@gmail.com> > Cc: linux-tegra at vger.kernel.org > --- > Sub-arch maintainers, please apply to your trees unless arm-soc wants > to take the whole lot. > > arch/arm/boot/dts/tegra124-apalis-eval.dts | 2 +- > arch/arm/boot/dts/tegra124-apalis.dtsi | 2 +- > arch/arm/boot/dts/tegra124-jetson-tk1.dts | 2 +- > arch/arm/boot/dts/tegra124.dtsi | 4 +++- > arch/arm/boot/dts/tegra20-harmony.dts | 2 +- > arch/arm/boot/dts/tegra20-tamonten.dtsi | 2 +- > arch/arm/boot/dts/tegra20-tec.dts | 2 +- > arch/arm/boot/dts/tegra20-trimslice.dts | 2 +- > arch/arm/boot/dts/tegra20.dtsi | 4 +++- > arch/arm/boot/dts/tegra30-apalis-eval.dts | 2 +- > arch/arm/boot/dts/tegra30-apalis.dtsi | 2 +- > arch/arm/boot/dts/tegra30-beaver.dts | 2 +- > arch/arm/boot/dts/tegra30-cardhu.dtsi | 2 +- > arch/arm/boot/dts/tegra30.dtsi | 5 ++++- > 14 files changed, 21 insertions(+), 14 deletions(-) Doesn't look like ARM SoC took the lot, so I've applied this to the Tegra tree for v4.13. Thanks, Thierry -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 833 bytes Desc: not available URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20170613/7c4a2975/attachment.sig> ^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH 11/15] arm64: dts: nvidia: fix PCI bus dtc warnings 2017-03-22 2:02 ` Rob Herring @ 2017-03-22 2:03 ` Rob Herring -1 siblings, 0 replies; 78+ messages in thread From: Rob Herring @ 2017-03-22 2:03 UTC (permalink / raw) To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, devicetree-u79uwXL29TY76Z2rM5mHXA Cc: arm-DgEjT+Ai2ygdnm+yROfE0A, Stephen Warren, Thierry Reding, Alexandre Courbot, linux-tegra-u79uwXL29TY76Z2rM5mHXA dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> Cc: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> Cc: Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Cc: Alexandre Courbot <gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org --- Sub-arch maintainers, please apply to your trees unless arm-soc wants to take the whole lot. arch/arm64/boot/dts/nvidia/tegra132.dtsi | 4 +++- arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts | 2 +- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 4 +++- 3 files changed, 7 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/nvidia/tegra132.dtsi b/arch/arm64/boot/dts/nvidia/tegra132.dtsi index 3f3a46a4bd01..b0720904c244 100644 --- a/arch/arm64/boot/dts/nvidia/tegra132.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra132.dtsi @@ -12,7 +12,7 @@ #address-cells = <2>; #size-cells = <2>; - pcie-controller@01003000 { + pcie@1003000 { compatible = "nvidia,tegra124-pcie"; device_type = "pci"; reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */ @@ -55,6 +55,7 @@ device_type = "pci"; assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>; reg = <0x000800 0 0 0 0>; + bus-range = <0x00 0xff>; status = "disabled"; #address-cells = <3>; @@ -68,6 +69,7 @@ device_type = "pci"; assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>; reg = <0x001000 0 0 0 0>; + bus-range = <0x00 0xff>; status = "disabled"; #address-cells = <3>; diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts b/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts index 4c1ea7a08d43..7cb95e042117 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts +++ b/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts @@ -7,7 +7,7 @@ model = "NVIDIA Jetson TX1 Developer Kit"; compatible = "nvidia,p2371-2180", "nvidia,tegra210"; - pcie-controller@01003000 { + pcie@1003000 { status = "okay"; avdd-pll-uerefe-supply = <&avdd_1v05_pll>; diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi index 2f832df29da8..ec1919425978 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi @@ -11,7 +11,7 @@ #address-cells = <2>; #size-cells = <2>; - pcie-controller@01003000 { + pcie@1003000 { compatible = "nvidia,tegra210-pcie"; device_type = "pci"; reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */ @@ -51,6 +51,7 @@ device_type = "pci"; assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>; reg = <0x000800 0 0 0 0>; + bus-range = <0x00 0xff>; status = "disabled"; #address-cells = <3>; @@ -64,6 +65,7 @@ device_type = "pci"; assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>; reg = <0x001000 0 0 0 0>; + bus-range = <0x00 0xff>; status = "disabled"; #address-cells = <3>; -- 2.10.1 ^ permalink raw reply related [flat|nested] 78+ messages in thread
* [PATCH 11/15] arm64: dts: nvidia: fix PCI bus dtc warnings @ 2017-03-22 2:03 ` Rob Herring 0 siblings, 0 replies; 78+ messages in thread From: Rob Herring @ 2017-03-22 2:03 UTC (permalink / raw) To: linux-arm-kernel dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: linux-tegra at vger.kernel.org --- Sub-arch maintainers, please apply to your trees unless arm-soc wants to take the whole lot. arch/arm64/boot/dts/nvidia/tegra132.dtsi | 4 +++- arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts | 2 +- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 4 +++- 3 files changed, 7 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/nvidia/tegra132.dtsi b/arch/arm64/boot/dts/nvidia/tegra132.dtsi index 3f3a46a4bd01..b0720904c244 100644 --- a/arch/arm64/boot/dts/nvidia/tegra132.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra132.dtsi @@ -12,7 +12,7 @@ #address-cells = <2>; #size-cells = <2>; - pcie-controller at 01003000 { + pcie at 1003000 { compatible = "nvidia,tegra124-pcie"; device_type = "pci"; reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */ @@ -55,6 +55,7 @@ device_type = "pci"; assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>; reg = <0x000800 0 0 0 0>; + bus-range = <0x00 0xff>; status = "disabled"; #address-cells = <3>; @@ -68,6 +69,7 @@ device_type = "pci"; assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>; reg = <0x001000 0 0 0 0>; + bus-range = <0x00 0xff>; status = "disabled"; #address-cells = <3>; diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts b/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts index 4c1ea7a08d43..7cb95e042117 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts +++ b/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts @@ -7,7 +7,7 @@ model = "NVIDIA Jetson TX1 Developer Kit"; compatible = "nvidia,p2371-2180", "nvidia,tegra210"; - pcie-controller at 01003000 { + pcie at 1003000 { status = "okay"; avdd-pll-uerefe-supply = <&avdd_1v05_pll>; diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi index 2f832df29da8..ec1919425978 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi @@ -11,7 +11,7 @@ #address-cells = <2>; #size-cells = <2>; - pcie-controller at 01003000 { + pcie at 1003000 { compatible = "nvidia,tegra210-pcie"; device_type = "pci"; reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */ @@ -51,6 +51,7 @@ device_type = "pci"; assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>; reg = <0x000800 0 0 0 0>; + bus-range = <0x00 0xff>; status = "disabled"; #address-cells = <3>; @@ -64,6 +65,7 @@ device_type = "pci"; assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>; reg = <0x001000 0 0 0 0>; + bus-range = <0x00 0xff>; status = "disabled"; #address-cells = <3>; -- 2.10.1 ^ permalink raw reply related [flat|nested] 78+ messages in thread
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* Re: [PATCH 11/15] arm64: dts: nvidia: fix PCI bus dtc warnings 2017-03-22 2:03 ` Rob Herring @ 2017-06-13 14:52 ` Thierry Reding -1 siblings, 0 replies; 78+ messages in thread From: Thierry Reding @ 2017-06-13 14:52 UTC (permalink / raw) To: Rob Herring Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, devicetree-u79uwXL29TY76Z2rM5mHXA, arm-DgEjT+Ai2ygdnm+yROfE0A, Stephen Warren, Alexandre Courbot, linux-tegra-u79uwXL29TY76Z2rM5mHXA [-- Attachment #1: Type: text/plain, Size: 870 bytes --] On Tue, Mar 21, 2017 at 09:03:09PM -0500, Rob Herring wrote: > dtc recently added PCI bus checks. Fix these warnings. > > Signed-off-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> > Cc: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> > Cc: Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> > Cc: Alexandre Courbot <gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> > Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org > --- > Sub-arch maintainers, please apply to your trees unless arm-soc wants > to take the whole lot. > > arch/arm64/boot/dts/nvidia/tegra132.dtsi | 4 +++- > arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts | 2 +- > arch/arm64/boot/dts/nvidia/tegra210.dtsi | 4 +++- > 3 files changed, 7 insertions(+), 3 deletions(-) Applied, thanks. Thierry [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 833 bytes --] ^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH 11/15] arm64: dts: nvidia: fix PCI bus dtc warnings @ 2017-06-13 14:52 ` Thierry Reding 0 siblings, 0 replies; 78+ messages in thread From: Thierry Reding @ 2017-06-13 14:52 UTC (permalink / raw) To: linux-arm-kernel On Tue, Mar 21, 2017 at 09:03:09PM -0500, Rob Herring wrote: > dtc recently added PCI bus checks. Fix these warnings. > > Signed-off-by: Rob Herring <robh@kernel.org> > Cc: Stephen Warren <swarren@wwwdotorg.org> > Cc: Thierry Reding <thierry.reding@gmail.com> > Cc: Alexandre Courbot <gnurou@gmail.com> > Cc: linux-tegra at vger.kernel.org > --- > Sub-arch maintainers, please apply to your trees unless arm-soc wants > to take the whole lot. > > arch/arm64/boot/dts/nvidia/tegra132.dtsi | 4 +++- > arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts | 2 +- > arch/arm64/boot/dts/nvidia/tegra210.dtsi | 4 +++- > 3 files changed, 7 insertions(+), 3 deletions(-) Applied, thanks. Thierry -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 833 bytes Desc: not available URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20170613/c368debb/attachment.sig> ^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH 04/15] ARM: dts: exynos: fix PCI bus dtc warnings 2017-03-22 2:02 ` Rob Herring @ 2017-03-22 2:03 ` Rob Herring -1 siblings, 0 replies; 78+ messages in thread From: Rob Herring @ 2017-03-22 2:03 UTC (permalink / raw) To: linux-arm-kernel, devicetree Cc: arm, Kukjin Kim, Krzysztof Kozlowski, Javier Martinez Canillas, linux-samsung-soc dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Kukjin Kim <kgene@kernel.org> Cc: Krzysztof Kozlowski <krzk@kernel.org> Cc: Javier Martinez Canillas <javier@osg.samsung.com> Cc: linux-samsung-soc@vger.kernel.org --- Sub-arch maintainers, please apply to your trees unless arm-soc wants to take the whole lot. arch/arm/boot/dts/exynos5440.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi index 77d35bb92950..d86da2c768fa 100644 --- a/arch/arm/boot/dts/exynos5440.dtsi +++ b/arch/arm/boot/dts/exynos5440.dtsi @@ -306,6 +306,7 @@ ranges = <0x00000800 0 0x40000000 0x40000000 0 0x00001000 /* configuration space */ 0x81000000 0 0 0x40001000 0 0x00010000 /* downstream I/O */ 0x82000000 0 0x40011000 0x40011000 0 0x1ffef000>; /* non-prefetchable memory */ + bus-range = <0x00 0xff>; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0x0 0 &gic 53>; @@ -329,6 +330,7 @@ ranges = <0x00000800 0 0x60000000 0x60000000 0 0x00001000 /* configuration space */ 0x81000000 0 0 0x60001000 0 0x00010000 /* downstream I/O */ 0x82000000 0 0x60011000 0x60011000 0 0x1ffef000>; /* non-prefetchable memory */ + bus-range = <0x00 0xff>; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0x0 0 &gic 56>; -- 2.10.1 ^ permalink raw reply related [flat|nested] 78+ messages in thread
* [PATCH 04/15] ARM: dts: exynos: fix PCI bus dtc warnings @ 2017-03-22 2:03 ` Rob Herring 0 siblings, 0 replies; 78+ messages in thread From: Rob Herring @ 2017-03-22 2:03 UTC (permalink / raw) To: linux-arm-kernel dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Kukjin Kim <kgene@kernel.org> Cc: Krzysztof Kozlowski <krzk@kernel.org> Cc: Javier Martinez Canillas <javier@osg.samsung.com> Cc: linux-samsung-soc at vger.kernel.org --- Sub-arch maintainers, please apply to your trees unless arm-soc wants to take the whole lot. arch/arm/boot/dts/exynos5440.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi index 77d35bb92950..d86da2c768fa 100644 --- a/arch/arm/boot/dts/exynos5440.dtsi +++ b/arch/arm/boot/dts/exynos5440.dtsi @@ -306,6 +306,7 @@ ranges = <0x00000800 0 0x40000000 0x40000000 0 0x00001000 /* configuration space */ 0x81000000 0 0 0x40001000 0 0x00010000 /* downstream I/O */ 0x82000000 0 0x40011000 0x40011000 0 0x1ffef000>; /* non-prefetchable memory */ + bus-range = <0x00 0xff>; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0x0 0 &gic 53>; @@ -329,6 +330,7 @@ ranges = <0x00000800 0 0x60000000 0x60000000 0 0x00001000 /* configuration space */ 0x81000000 0 0 0x60001000 0 0x00010000 /* downstream I/O */ 0x82000000 0 0x60011000 0x60011000 0 0x1ffef000>; /* non-prefetchable memory */ + bus-range = <0x00 0xff>; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0x0 0 &gic 56>; -- 2.10.1 ^ permalink raw reply related [flat|nested] 78+ messages in thread
* Re: [PATCH 04/15] ARM: dts: exynos: fix PCI bus dtc warnings 2017-03-22 2:03 ` Rob Herring @ 2017-03-23 19:37 ` Krzysztof Kozlowski -1 siblings, 0 replies; 78+ messages in thread From: Krzysztof Kozlowski @ 2017-03-23 19:37 UTC (permalink / raw) To: Rob Herring Cc: linux-arm-kernel, devicetree, arm, Kukjin Kim, Javier Martinez Canillas, linux-samsung-soc On Tue, Mar 21, 2017 at 09:03:02PM -0500, Rob Herring wrote: > dtc recently added PCI bus checks. Fix these warnings. > > Signed-off-by: Rob Herring <robh@kernel.org> > Cc: Kukjin Kim <kgene@kernel.org> > Cc: Krzysztof Kozlowski <krzk@kernel.org> > Cc: Javier Martinez Canillas <javier@osg.samsung.com> > Cc: linux-samsung-soc@vger.kernel.org > --- > Sub-arch maintainers, please apply to your trees unless arm-soc wants > to take the whole lot. > > arch/arm/boot/dts/exynos5440.dtsi | 2 ++ > 1 file changed, 2 insertions(+) > Hi, Unfortunately patch does not apply. There were some changes around PCIe this release so I think the best way would be to rebase on top of linux-next. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH 04/15] ARM: dts: exynos: fix PCI bus dtc warnings @ 2017-03-23 19:37 ` Krzysztof Kozlowski 0 siblings, 0 replies; 78+ messages in thread From: Krzysztof Kozlowski @ 2017-03-23 19:37 UTC (permalink / raw) To: linux-arm-kernel On Tue, Mar 21, 2017 at 09:03:02PM -0500, Rob Herring wrote: > dtc recently added PCI bus checks. Fix these warnings. > > Signed-off-by: Rob Herring <robh@kernel.org> > Cc: Kukjin Kim <kgene@kernel.org> > Cc: Krzysztof Kozlowski <krzk@kernel.org> > Cc: Javier Martinez Canillas <javier@osg.samsung.com> > Cc: linux-samsung-soc at vger.kernel.org > --- > Sub-arch maintainers, please apply to your trees unless arm-soc wants > to take the whole lot. > > arch/arm/boot/dts/exynos5440.dtsi | 2 ++ > 1 file changed, 2 insertions(+) > Hi, Unfortunately patch does not apply. There were some changes around PCIe this release so I think the best way would be to rebase on top of linux-next. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH 05/15] ARM: dts: imx: fix PCI bus dtc warnings [not found] ` <20170322020313.24338-1-robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> @ 2017-03-22 2:03 ` Rob Herring 2017-03-22 2:03 ` Rob Herring 2017-03-22 2:03 ` Rob Herring 2 siblings, 0 replies; 78+ messages in thread From: Rob Herring @ 2017-03-22 2:03 UTC (permalink / raw) To: linux-arm-kernel dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> --- Sub-arch maintainers, please apply to your trees unless arm-soc wants to take the whole lot. arch/arm/boot/dts/imx6qdl.dtsi | 3 ++- arch/arm/boot/dts/imx6qp.dtsi | 2 +- arch/arm/boot/dts/imx6sx.dtsi | 3 ++- 3 files changed, 5 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi index 6d7bf6496117..f95e24e73252 100644 --- a/arch/arm/boot/dts/imx6qdl.dtsi +++ b/arch/arm/boot/dts/imx6qdl.dtsi @@ -197,7 +197,7 @@ arm,shared-override; }; - pcie: pcie at 0x01000000 { + pcie: pcie at 1ffc000 { compatible = "fsl,imx6q-pcie", "snps,dw-pcie"; reg = <0x01ffc000 0x04000>, <0x01f00000 0x80000>; @@ -205,6 +205,7 @@ #address-cells = <3>; #size-cells = <2>; device_type = "pci"; + bus-range = <0 0xff>; ranges = <0x81000000 0 0 0x01f80000 0 0x00010000 /* downstream I/O */ 0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */ num-lanes = <1>; diff --git a/arch/arm/boot/dts/imx6qp.dtsi b/arch/arm/boot/dts/imx6qp.dtsi index 24d071f5d9cd..b7688f1e3c86 100644 --- a/arch/arm/boot/dts/imx6qp.dtsi +++ b/arch/arm/boot/dts/imx6qp.dtsi @@ -82,7 +82,7 @@ "ldb_di0", "ldb_di1", "prg"; }; - pcie: pcie at 0x01000000 { + pcie: pcie at 1ffc000 { compatible = "fsl,imx6qp-pcie", "snps,dw-pcie"; }; diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi index dd4ec85ecbaa..c7f76de57c7b 100644 --- a/arch/arm/boot/dts/imx6sx.dtsi +++ b/arch/arm/boot/dts/imx6sx.dtsi @@ -1281,7 +1281,7 @@ }; }; - pcie: pcie at 0x08000000 { + pcie: pcie at 8ffc000 { compatible = "fsl,imx6sx-pcie", "snps,dw-pcie"; reg = <0x08ffc000 0x4000>; /* DBI */ #address-cells = <3>; @@ -1293,6 +1293,7 @@ 0x81000000 0 0 0x08f80000 0 0x00010000 /* non-prefetchable memory */ 0x82000000 0 0x08000000 0x08000000 0 0x00f00000>; + bus-range = <0x00 0xff>; num-lanes = <1>; interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6SX_CLK_PCIE_REF_125M>, -- 2.10.1 ^ permalink raw reply related [flat|nested] 78+ messages in thread
* [PATCH 05/15] ARM: dts: imx: fix PCI bus dtc warnings @ 2017-03-22 2:03 ` Rob Herring 0 siblings, 0 replies; 78+ messages in thread From: Rob Herring @ 2017-03-22 2:03 UTC (permalink / raw) To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, devicetree-u79uwXL29TY76Z2rM5mHXA Cc: arm-DgEjT+Ai2ygdnm+yROfE0A, Shawn Guo, Sascha Hauer, Fabio Estevam dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> Cc: Shawn Guo <shawnguo-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> Cc: Sascha Hauer <kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> Cc: Fabio Estevam <fabio.estevam-3arQi8VN3Tc@public.gmane.org> --- Sub-arch maintainers, please apply to your trees unless arm-soc wants to take the whole lot. arch/arm/boot/dts/imx6qdl.dtsi | 3 ++- arch/arm/boot/dts/imx6qp.dtsi | 2 +- arch/arm/boot/dts/imx6sx.dtsi | 3 ++- 3 files changed, 5 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi index 6d7bf6496117..f95e24e73252 100644 --- a/arch/arm/boot/dts/imx6qdl.dtsi +++ b/arch/arm/boot/dts/imx6qdl.dtsi @@ -197,7 +197,7 @@ arm,shared-override; }; - pcie: pcie@0x01000000 { + pcie: pcie@1ffc000 { compatible = "fsl,imx6q-pcie", "snps,dw-pcie"; reg = <0x01ffc000 0x04000>, <0x01f00000 0x80000>; @@ -205,6 +205,7 @@ #address-cells = <3>; #size-cells = <2>; device_type = "pci"; + bus-range = <0 0xff>; ranges = <0x81000000 0 0 0x01f80000 0 0x00010000 /* downstream I/O */ 0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */ num-lanes = <1>; diff --git a/arch/arm/boot/dts/imx6qp.dtsi b/arch/arm/boot/dts/imx6qp.dtsi index 24d071f5d9cd..b7688f1e3c86 100644 --- a/arch/arm/boot/dts/imx6qp.dtsi +++ b/arch/arm/boot/dts/imx6qp.dtsi @@ -82,7 +82,7 @@ "ldb_di0", "ldb_di1", "prg"; }; - pcie: pcie@0x01000000 { + pcie: pcie@1ffc000 { compatible = "fsl,imx6qp-pcie", "snps,dw-pcie"; }; diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi index dd4ec85ecbaa..c7f76de57c7b 100644 --- a/arch/arm/boot/dts/imx6sx.dtsi +++ b/arch/arm/boot/dts/imx6sx.dtsi @@ -1281,7 +1281,7 @@ }; }; - pcie: pcie@0x08000000 { + pcie: pcie@8ffc000 { compatible = "fsl,imx6sx-pcie", "snps,dw-pcie"; reg = <0x08ffc000 0x4000>; /* DBI */ #address-cells = <3>; @@ -1293,6 +1293,7 @@ 0x81000000 0 0 0x08f80000 0 0x00010000 /* non-prefetchable memory */ 0x82000000 0 0x08000000 0x08000000 0 0x00f00000>; + bus-range = <0x00 0xff>; num-lanes = <1>; interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6SX_CLK_PCIE_REF_125M>, -- 2.10.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply related [flat|nested] 78+ messages in thread
* [PATCH 05/15] ARM: dts: imx: fix PCI bus dtc warnings 2017-03-22 2:03 ` Rob Herring @ 2017-03-22 8:19 ` Shawn Guo -1 siblings, 0 replies; 78+ messages in thread From: Shawn Guo @ 2017-03-22 8:19 UTC (permalink / raw) To: linux-arm-kernel On Tue, Mar 21, 2017 at 09:03:03PM -0500, Rob Herring wrote: > dtc recently added PCI bus checks. Fix these warnings. > > Signed-off-by: Rob Herring <robh@kernel.org> > Cc: Shawn Guo <shawnguo@kernel.org> > Cc: Sascha Hauer <kernel@pengutronix.de> > Cc: Fabio Estevam <fabio.estevam@nxp.com> Applied with a couple of changes below. > --- > Sub-arch maintainers, please apply to your trees unless arm-soc wants > to take the whole lot. > > arch/arm/boot/dts/imx6qdl.dtsi | 3 ++- > arch/arm/boot/dts/imx6qp.dtsi | 2 +- > arch/arm/boot/dts/imx6sx.dtsi | 3 ++- > 3 files changed, 5 insertions(+), 3 deletions(-) > > diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi > index 6d7bf6496117..f95e24e73252 100644 > --- a/arch/arm/boot/dts/imx6qdl.dtsi > +++ b/arch/arm/boot/dts/imx6qdl.dtsi > @@ -197,7 +197,7 @@ > arm,shared-override; > }; > > - pcie: pcie at 0x01000000 { > + pcie: pcie at 1ffc000 { > compatible = "fsl,imx6q-pcie", "snps,dw-pcie"; > reg = <0x01ffc000 0x04000>, > <0x01f00000 0x80000>; > @@ -205,6 +205,7 @@ > #address-cells = <3>; > #size-cells = <2>; > device_type = "pci"; > + bus-range = <0 0xff>; For sake of consistency, I changed it to <0x00 0xff> like you did for imx6sx.dtsi. > ranges = <0x81000000 0 0 0x01f80000 0 0x00010000 /* downstream I/O */ > 0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */ > num-lanes = <1>; > diff --git a/arch/arm/boot/dts/imx6qp.dtsi b/arch/arm/boot/dts/imx6qp.dtsi > index 24d071f5d9cd..b7688f1e3c86 100644 > --- a/arch/arm/boot/dts/imx6qp.dtsi > +++ b/arch/arm/boot/dts/imx6qp.dtsi > @@ -82,7 +82,7 @@ > "ldb_di0", "ldb_di1", "prg"; > }; > > - pcie: pcie at 0x01000000 { > + pcie: pcie at 1ffc000 { We had a patch on IMX tree changing this to use label for referencing the node, and hence this imx6qp.dtsi bit change can be saved. Shawn > compatible = "fsl,imx6qp-pcie", "snps,dw-pcie"; > }; > > diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi > index dd4ec85ecbaa..c7f76de57c7b 100644 > --- a/arch/arm/boot/dts/imx6sx.dtsi > +++ b/arch/arm/boot/dts/imx6sx.dtsi > @@ -1281,7 +1281,7 @@ > }; > }; > > - pcie: pcie at 0x08000000 { > + pcie: pcie at 8ffc000 { > compatible = "fsl,imx6sx-pcie", "snps,dw-pcie"; > reg = <0x08ffc000 0x4000>; /* DBI */ > #address-cells = <3>; > @@ -1293,6 +1293,7 @@ > 0x81000000 0 0 0x08f80000 0 0x00010000 > /* non-prefetchable memory */ > 0x82000000 0 0x08000000 0x08000000 0 0x00f00000>; > + bus-range = <0x00 0xff>; > num-lanes = <1>; > interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&clks IMX6SX_CLK_PCIE_REF_125M>, > -- > 2.10.1 > ^ permalink raw reply [flat|nested] 78+ messages in thread
* Re: [PATCH 05/15] ARM: dts: imx: fix PCI bus dtc warnings @ 2017-03-22 8:19 ` Shawn Guo 0 siblings, 0 replies; 78+ messages in thread From: Shawn Guo @ 2017-03-22 8:19 UTC (permalink / raw) To: Rob Herring Cc: Fabio Estevam, devicetree, arm, Sascha Hauer, linux-arm-kernel On Tue, Mar 21, 2017 at 09:03:03PM -0500, Rob Herring wrote: > dtc recently added PCI bus checks. Fix these warnings. > > Signed-off-by: Rob Herring <robh@kernel.org> > Cc: Shawn Guo <shawnguo@kernel.org> > Cc: Sascha Hauer <kernel@pengutronix.de> > Cc: Fabio Estevam <fabio.estevam@nxp.com> Applied with a couple of changes below. > --- > Sub-arch maintainers, please apply to your trees unless arm-soc wants > to take the whole lot. > > arch/arm/boot/dts/imx6qdl.dtsi | 3 ++- > arch/arm/boot/dts/imx6qp.dtsi | 2 +- > arch/arm/boot/dts/imx6sx.dtsi | 3 ++- > 3 files changed, 5 insertions(+), 3 deletions(-) > > diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi > index 6d7bf6496117..f95e24e73252 100644 > --- a/arch/arm/boot/dts/imx6qdl.dtsi > +++ b/arch/arm/boot/dts/imx6qdl.dtsi > @@ -197,7 +197,7 @@ > arm,shared-override; > }; > > - pcie: pcie@0x01000000 { > + pcie: pcie@1ffc000 { > compatible = "fsl,imx6q-pcie", "snps,dw-pcie"; > reg = <0x01ffc000 0x04000>, > <0x01f00000 0x80000>; > @@ -205,6 +205,7 @@ > #address-cells = <3>; > #size-cells = <2>; > device_type = "pci"; > + bus-range = <0 0xff>; For sake of consistency, I changed it to <0x00 0xff> like you did for imx6sx.dtsi. > ranges = <0x81000000 0 0 0x01f80000 0 0x00010000 /* downstream I/O */ > 0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */ > num-lanes = <1>; > diff --git a/arch/arm/boot/dts/imx6qp.dtsi b/arch/arm/boot/dts/imx6qp.dtsi > index 24d071f5d9cd..b7688f1e3c86 100644 > --- a/arch/arm/boot/dts/imx6qp.dtsi > +++ b/arch/arm/boot/dts/imx6qp.dtsi > @@ -82,7 +82,7 @@ > "ldb_di0", "ldb_di1", "prg"; > }; > > - pcie: pcie@0x01000000 { > + pcie: pcie@1ffc000 { We had a patch on IMX tree changing this to use label for referencing the node, and hence this imx6qp.dtsi bit change can be saved. Shawn > compatible = "fsl,imx6qp-pcie", "snps,dw-pcie"; > }; > > diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi > index dd4ec85ecbaa..c7f76de57c7b 100644 > --- a/arch/arm/boot/dts/imx6sx.dtsi > +++ b/arch/arm/boot/dts/imx6sx.dtsi > @@ -1281,7 +1281,7 @@ > }; > }; > > - pcie: pcie@0x08000000 { > + pcie: pcie@8ffc000 { > compatible = "fsl,imx6sx-pcie", "snps,dw-pcie"; > reg = <0x08ffc000 0x4000>; /* DBI */ > #address-cells = <3>; > @@ -1293,6 +1293,7 @@ > 0x81000000 0 0 0x08f80000 0 0x00010000 > /* non-prefetchable memory */ > 0x82000000 0 0x08000000 0x08000000 0 0x00f00000>; > + bus-range = <0x00 0xff>; > num-lanes = <1>; > interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; > clocks = <&clks IMX6SX_CLK_PCIE_REF_125M>, > -- > 2.10.1 > ^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH 05/15] ARM: dts: imx: fix PCI bus dtc warnings 2017-03-22 8:19 ` Shawn Guo @ 2017-03-22 13:53 ` Rob Herring -1 siblings, 0 replies; 78+ messages in thread From: Rob Herring @ 2017-03-22 13:53 UTC (permalink / raw) To: linux-arm-kernel On Wed, Mar 22, 2017 at 3:19 AM, Shawn Guo <shawnguo@kernel.org> wrote: > On Tue, Mar 21, 2017 at 09:03:03PM -0500, Rob Herring wrote: >> dtc recently added PCI bus checks. Fix these warnings. >> >> Signed-off-by: Rob Herring <robh@kernel.org> >> Cc: Shawn Guo <shawnguo@kernel.org> >> Cc: Sascha Hauer <kernel@pengutronix.de> >> Cc: Fabio Estevam <fabio.estevam@nxp.com> > > Applied with a couple of changes below. Thanks. BTW, forget to mention there's still one i.MX warning I did not fix. It's with the "sky2 at 8" PCI device node. The unit address is completely wrong. The comment says bus #8 which doesn't seem right either. The unit address should be "<device num>[,<function]". There should be a reg property which also has the bus number. Rob ^ permalink raw reply [flat|nested] 78+ messages in thread
* Re: [PATCH 05/15] ARM: dts: imx: fix PCI bus dtc warnings @ 2017-03-22 13:53 ` Rob Herring 0 siblings, 0 replies; 78+ messages in thread From: Rob Herring @ 2017-03-22 13:53 UTC (permalink / raw) To: Shawn Guo Cc: Fabio Estevam, devicetree@vger.kernel.org, arm@kernel.org, Sascha Hauer, linux-arm-kernel@lists.infradead.org On Wed, Mar 22, 2017 at 3:19 AM, Shawn Guo <shawnguo@kernel.org> wrote: > On Tue, Mar 21, 2017 at 09:03:03PM -0500, Rob Herring wrote: >> dtc recently added PCI bus checks. Fix these warnings. >> >> Signed-off-by: Rob Herring <robh@kernel.org> >> Cc: Shawn Guo <shawnguo@kernel.org> >> Cc: Sascha Hauer <kernel@pengutronix.de> >> Cc: Fabio Estevam <fabio.estevam@nxp.com> > > Applied with a couple of changes below. Thanks. BTW, forget to mention there's still one i.MX warning I did not fix. It's with the "sky2@8" PCI device node. The unit address is completely wrong. The comment says bus #8 which doesn't seem right either. The unit address should be "<device num>[,<function]". There should be a reg property which also has the bus number. Rob ^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH 05/15] ARM: dts: imx: fix PCI bus dtc warnings @ 2017-03-24 1:28 ` Shawn Guo 0 siblings, 0 replies; 78+ messages in thread From: Shawn Guo @ 2017-03-24 1:28 UTC (permalink / raw) To: linux-arm-kernel +Tim who is the owner of Gateworks Ventana boards. On Wed, Mar 22, 2017 at 08:53:34AM -0500, Rob Herring wrote: > On Wed, Mar 22, 2017 at 3:19 AM, Shawn Guo <shawnguo@kernel.org> wrote: > > On Tue, Mar 21, 2017 at 09:03:03PM -0500, Rob Herring wrote: > >> dtc recently added PCI bus checks. Fix these warnings. > >> > >> Signed-off-by: Rob Herring <robh@kernel.org> > >> Cc: Shawn Guo <shawnguo@kernel.org> > >> Cc: Sascha Hauer <kernel@pengutronix.de> > >> Cc: Fabio Estevam <fabio.estevam@nxp.com> > > > > Applied with a couple of changes below. > > Thanks. BTW, forget to mention there's still one i.MX warning I did > not fix. It's with the "sky2 at 8" PCI device node. The unit address is > completely wrong. The comment says bus #8 which doesn't seem right > either. The unit address should be "<device num>[,<function]". There > should be a reg property which also has the bus number. @Tim, these DTC warnings come from Ventana boards. Can you take care of them? Shawn ^ permalink raw reply [flat|nested] 78+ messages in thread
* Re: [PATCH 05/15] ARM: dts: imx: fix PCI bus dtc warnings @ 2017-03-24 1:28 ` Shawn Guo 0 siblings, 0 replies; 78+ messages in thread From: Shawn Guo @ 2017-03-24 1:28 UTC (permalink / raw) To: Rob Herring, Tim Harvey Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, arm-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, Sascha Hauer, Fabio Estevam +Tim who is the owner of Gateworks Ventana boards. On Wed, Mar 22, 2017 at 08:53:34AM -0500, Rob Herring wrote: > On Wed, Mar 22, 2017 at 3:19 AM, Shawn Guo <shawnguo-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> wrote: > > On Tue, Mar 21, 2017 at 09:03:03PM -0500, Rob Herring wrote: > >> dtc recently added PCI bus checks. Fix these warnings. > >> > >> Signed-off-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> > >> Cc: Shawn Guo <shawnguo-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> > >> Cc: Sascha Hauer <kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> > >> Cc: Fabio Estevam <fabio.estevam-3arQi8VN3Tc@public.gmane.org> > > > > Applied with a couple of changes below. > > Thanks. BTW, forget to mention there's still one i.MX warning I did > not fix. It's with the "sky2@8" PCI device node. The unit address is > completely wrong. The comment says bus #8 which doesn't seem right > either. The unit address should be "<device num>[,<function]". There > should be a reg property which also has the bus number. @Tim, these DTC warnings come from Ventana boards. Can you take care of them? Shawn -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH 06/15] ARM: dts: r8a779x: fix PCI bus dtc warnings 2017-03-22 2:02 ` Rob Herring (?) @ 2017-03-22 2:03 ` Rob Herring -1 siblings, 0 replies; 78+ messages in thread From: Rob Herring @ 2017-03-22 2:03 UTC (permalink / raw) To: linux-arm-kernel, devicetree Cc: arm, Simon Horman, Magnus Damm, linux-renesas-soc dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Simon Horman <horms@verge.net.au> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: linux-renesas-soc@vger.kernel.org --- Sub-arch maintainers, please apply to your trees unless arm-soc wants to take the whole lot. arch/arm/boot/dts/r8a7790.dtsi | 16 ++++++---------- arch/arm/boot/dts/r8a7791.dtsi | 16 ++++++---------- arch/arm/boot/dts/r8a7794.dtsi | 16 ++++++---------- 3 files changed, 18 insertions(+), 30 deletions(-) diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index 6d10450de6d7..c16a37e9fb5d 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -1598,16 +1598,14 @@ 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - usb@0,1 { + usb@1,0 { reg = <0x800 0 0 0 0>; - device_type = "pci"; phys = <&usb0 0>; phy-names = "usb"; }; - usb@0,2 { + usb@2,0 { reg = <0x1000 0 0 0 0>; - device_type = "pci"; phys = <&usb0 0>; phy-names = "usb"; }; @@ -1654,16 +1652,14 @@ 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; - usb@0,1 { - reg = <0x800 0 0 0 0>; - device_type = "pci"; + usb@1,0 { + reg = <0x20800 0 0 0 0>; phys = <&usb2 0>; phy-names = "usb"; }; - usb@0,2 { - reg = <0x1000 0 0 0 0>; - device_type = "pci"; + usb@2,0 { + reg = <0x21000 0 0 0 0>; phys = <&usb2 0>; phy-names = "usb"; }; diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 9f9e48511836..a1d8686eaea5 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -1596,16 +1596,14 @@ 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - usb@0,1 { + usb@1,0 { reg = <0x800 0 0 0 0>; - device_type = "pci"; phys = <&usb0 0>; phy-names = "usb"; }; - usb@0,2 { + usb@2,0 { reg = <0x1000 0 0 0 0>; - device_type = "pci"; phys = <&usb0 0>; phy-names = "usb"; }; @@ -1631,16 +1629,14 @@ 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; - usb@0,1 { - reg = <0x800 0 0 0 0>; - device_type = "pci"; + usb@1,0 { + reg = <0x10800 0 0 0 0>; phys = <&usb2 0>; phy-names = "usb"; }; - usb@0,2 { - reg = <0x1000 0 0 0 0>; - device_type = "pci"; + usb@2,0 { + reg = <0x11000 0 0 0 0>; phys = <&usb2 0>; phy-names = "usb"; }; diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index 319c1069b7ee..c07495185cc4 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -817,16 +817,14 @@ 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - usb@0,1 { + usb@1,0 { reg = <0x800 0 0 0 0>; - device_type = "pci"; phys = <&usb0 0>; phy-names = "usb"; }; - usb@0,2 { + usb@2,0 { reg = <0x1000 0 0 0 0>; - device_type = "pci"; phys = <&usb0 0>; phy-names = "usb"; }; @@ -852,16 +850,14 @@ 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; - usb@0,1 { - reg = <0x800 0 0 0 0>; - device_type = "pci"; + usb@1,0 { + reg = <0x10800 0 0 0 0>; phys = <&usb2 0>; phy-names = "usb"; }; - usb@0,2 { - reg = <0x1000 0 0 0 0>; - device_type = "pci"; + usb@2,0 { + reg = <0x11000 0 0 0 0>; phys = <&usb2 0>; phy-names = "usb"; }; -- 2.10.1 ^ permalink raw reply related [flat|nested] 78+ messages in thread
* [PATCH 06/15] ARM: dts: r8a779x: fix PCI bus dtc warnings @ 2017-03-22 2:03 ` Rob Herring 0 siblings, 0 replies; 78+ messages in thread From: Rob Herring @ 2017-03-22 2:03 UTC (permalink / raw) To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, devicetree-u79uwXL29TY76Z2rM5mHXA Cc: arm-DgEjT+Ai2ygdnm+yROfE0A, Simon Horman, Magnus Damm, linux-renesas-soc-u79uwXL29TY76Z2rM5mHXA dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> Cc: Simon Horman <horms-/R6kz+dDXgpPR4JQBCEnsQ@public.gmane.org> Cc: Magnus Damm <magnus.damm-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Cc: linux-renesas-soc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org --- Sub-arch maintainers, please apply to your trees unless arm-soc wants to take the whole lot. arch/arm/boot/dts/r8a7790.dtsi | 16 ++++++---------- arch/arm/boot/dts/r8a7791.dtsi | 16 ++++++---------- arch/arm/boot/dts/r8a7794.dtsi | 16 ++++++---------- 3 files changed, 18 insertions(+), 30 deletions(-) diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index 6d10450de6d7..c16a37e9fb5d 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -1598,16 +1598,14 @@ 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - usb@0,1 { + usb@1,0 { reg = <0x800 0 0 0 0>; - device_type = "pci"; phys = <&usb0 0>; phy-names = "usb"; }; - usb@0,2 { + usb@2,0 { reg = <0x1000 0 0 0 0>; - device_type = "pci"; phys = <&usb0 0>; phy-names = "usb"; }; @@ -1654,16 +1652,14 @@ 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; - usb@0,1 { - reg = <0x800 0 0 0 0>; - device_type = "pci"; + usb@1,0 { + reg = <0x20800 0 0 0 0>; phys = <&usb2 0>; phy-names = "usb"; }; - usb@0,2 { - reg = <0x1000 0 0 0 0>; - device_type = "pci"; + usb@2,0 { + reg = <0x21000 0 0 0 0>; phys = <&usb2 0>; phy-names = "usb"; }; diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 9f9e48511836..a1d8686eaea5 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -1596,16 +1596,14 @@ 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - usb@0,1 { + usb@1,0 { reg = <0x800 0 0 0 0>; - device_type = "pci"; phys = <&usb0 0>; phy-names = "usb"; }; - usb@0,2 { + usb@2,0 { reg = <0x1000 0 0 0 0>; - device_type = "pci"; phys = <&usb0 0>; phy-names = "usb"; }; @@ -1631,16 +1629,14 @@ 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; - usb@0,1 { - reg = <0x800 0 0 0 0>; - device_type = "pci"; + usb@1,0 { + reg = <0x10800 0 0 0 0>; phys = <&usb2 0>; phy-names = "usb"; }; - usb@0,2 { - reg = <0x1000 0 0 0 0>; - device_type = "pci"; + usb@2,0 { + reg = <0x11000 0 0 0 0>; phys = <&usb2 0>; phy-names = "usb"; }; diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index 319c1069b7ee..c07495185cc4 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -817,16 +817,14 @@ 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - usb@0,1 { + usb@1,0 { reg = <0x800 0 0 0 0>; - device_type = "pci"; phys = <&usb0 0>; phy-names = "usb"; }; - usb@0,2 { + usb@2,0 { reg = <0x1000 0 0 0 0>; - device_type = "pci"; phys = <&usb0 0>; phy-names = "usb"; }; @@ -852,16 +850,14 @@ 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; - usb@0,1 { - reg = <0x800 0 0 0 0>; - device_type = "pci"; + usb@1,0 { + reg = <0x10800 0 0 0 0>; phys = <&usb2 0>; phy-names = "usb"; }; - usb@0,2 { - reg = <0x1000 0 0 0 0>; - device_type = "pci"; + usb@2,0 { + reg = <0x11000 0 0 0 0>; phys = <&usb2 0>; phy-names = "usb"; }; -- 2.10.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply related [flat|nested] 78+ messages in thread
* [PATCH 06/15] ARM: dts: r8a779x: fix PCI bus dtc warnings @ 2017-03-22 2:03 ` Rob Herring 0 siblings, 0 replies; 78+ messages in thread From: Rob Herring @ 2017-03-22 2:03 UTC (permalink / raw) To: linux-arm-kernel dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Simon Horman <horms@verge.net.au> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: linux-renesas-soc at vger.kernel.org --- Sub-arch maintainers, please apply to your trees unless arm-soc wants to take the whole lot. arch/arm/boot/dts/r8a7790.dtsi | 16 ++++++---------- arch/arm/boot/dts/r8a7791.dtsi | 16 ++++++---------- arch/arm/boot/dts/r8a7794.dtsi | 16 ++++++---------- 3 files changed, 18 insertions(+), 30 deletions(-) diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index 6d10450de6d7..c16a37e9fb5d 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -1598,16 +1598,14 @@ 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - usb at 0,1 { + usb at 1,0 { reg = <0x800 0 0 0 0>; - device_type = "pci"; phys = <&usb0 0>; phy-names = "usb"; }; - usb at 0,2 { + usb at 2,0 { reg = <0x1000 0 0 0 0>; - device_type = "pci"; phys = <&usb0 0>; phy-names = "usb"; }; @@ -1654,16 +1652,14 @@ 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; - usb at 0,1 { - reg = <0x800 0 0 0 0>; - device_type = "pci"; + usb at 1,0 { + reg = <0x20800 0 0 0 0>; phys = <&usb2 0>; phy-names = "usb"; }; - usb at 0,2 { - reg = <0x1000 0 0 0 0>; - device_type = "pci"; + usb at 2,0 { + reg = <0x21000 0 0 0 0>; phys = <&usb2 0>; phy-names = "usb"; }; diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 9f9e48511836..a1d8686eaea5 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -1596,16 +1596,14 @@ 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - usb at 0,1 { + usb at 1,0 { reg = <0x800 0 0 0 0>; - device_type = "pci"; phys = <&usb0 0>; phy-names = "usb"; }; - usb at 0,2 { + usb at 2,0 { reg = <0x1000 0 0 0 0>; - device_type = "pci"; phys = <&usb0 0>; phy-names = "usb"; }; @@ -1631,16 +1629,14 @@ 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; - usb at 0,1 { - reg = <0x800 0 0 0 0>; - device_type = "pci"; + usb at 1,0 { + reg = <0x10800 0 0 0 0>; phys = <&usb2 0>; phy-names = "usb"; }; - usb at 0,2 { - reg = <0x1000 0 0 0 0>; - device_type = "pci"; + usb at 2,0 { + reg = <0x11000 0 0 0 0>; phys = <&usb2 0>; phy-names = "usb"; }; diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index 319c1069b7ee..c07495185cc4 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -817,16 +817,14 @@ 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; - usb at 0,1 { + usb at 1,0 { reg = <0x800 0 0 0 0>; - device_type = "pci"; phys = <&usb0 0>; phy-names = "usb"; }; - usb at 0,2 { + usb at 2,0 { reg = <0x1000 0 0 0 0>; - device_type = "pci"; phys = <&usb0 0>; phy-names = "usb"; }; @@ -852,16 +850,14 @@ 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; - usb at 0,1 { - reg = <0x800 0 0 0 0>; - device_type = "pci"; + usb at 1,0 { + reg = <0x10800 0 0 0 0>; phys = <&usb2 0>; phy-names = "usb"; }; - usb at 0,2 { - reg = <0x1000 0 0 0 0>; - device_type = "pci"; + usb at 2,0 { + reg = <0x11000 0 0 0 0>; phys = <&usb2 0>; phy-names = "usb"; }; -- 2.10.1 ^ permalink raw reply related [flat|nested] 78+ messages in thread
* Re: [PATCH 06/15] ARM: dts: r8a779x: fix PCI bus dtc warnings 2017-03-22 2:03 ` Rob Herring (?) @ 2017-03-22 8:58 ` Geert Uytterhoeven -1 siblings, 0 replies; 78+ messages in thread From: Geert Uytterhoeven @ 2017-03-22 8:58 UTC (permalink / raw) To: Rob Herring Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, arm@kernel.org, Simon Horman, Magnus Damm, Linux-Renesas Hi Rob, On Wed, Mar 22, 2017 at 3:03 AM, Rob Herring <robh@kernel.org> wrote: > dtc recently added PCI bus checks. Fix these warnings. It's always a good idea to put the warnings in the commit message: arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee090000/usb@0,1 node name is not "pci" or "pcie" arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee090000/usb@0,1 missing ranges for PCI bridge (or not a bridge) arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee090000/usb@0,1 incorrect #address-cells for PCI bridge arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee090000/usb@0,1 incorrect #size-cells for PCI bridge arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee090000/usb@0,1 missing bus-range for PCI bridge arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee090000/usb@0,2 node name is not "pci" or "pcie" arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee090000/usb@0,2 missing ranges for PCI bridge (or not a bridge) arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee090000/usb@0,2 incorrect #address-cells for PCI bridge arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee090000/usb@0,2 incorrect #size-cells for PCI bridge arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee090000/usb@0,2 missing bus-range for PCI bridge arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee0d0000/usb@0,1 node name is not "pci" or "pcie" arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee0d0000/usb@0,1 missing ranges for PCI bridge (or not a bridge) arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee0d0000/usb@0,1 incorrect #address-cells for PCI bridge arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee0d0000/usb@0,1 incorrect #size-cells for PCI bridge arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee0d0000/usb@0,1 missing bus-range for PCI bridge arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee0d0000/usb@0,2 node name is not "pci" or "pcie" arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee0d0000/usb@0,2 missing ranges for PCI bridge (or not a bridge) arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee0d0000/usb@0,2 incorrect #address-cells for PCI bridge arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee0d0000/usb@0,2 incorrect #size-cells for PCI bridge arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee0d0000/usb@0,2 missing bus-range for PCI bridge arch/arm/boot/dts/r8a7790-lager.dtb: Warning (unit_address_format): Failed prerequisite 'pci_bridge' arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_reg): Failed prerequisite 'pci_bridge' arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_bus_num): Failed prerequisite 'pci_bridge' The above indeed go away with your patch, but I don't know why ;-) > Signed-off-by: Rob Herring <robh@kernel.org> > Cc: Simon Horman <horms@verge.net.au> > Cc: Magnus Damm <magnus.damm@gmail.com> > Cc: linux-renesas-soc@vger.kernel.org > --- > Sub-arch maintainers, please apply to your trees unless arm-soc wants > to take the whole lot. > > arch/arm/boot/dts/r8a7790.dtsi | 16 ++++++---------- > arch/arm/boot/dts/r8a7791.dtsi | 16 ++++++---------- > arch/arm/boot/dts/r8a7794.dtsi | 16 ++++++---------- > 3 files changed, 18 insertions(+), 30 deletions(-) > > diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi > index 6d10450de6d7..c16a37e9fb5d 100644 > --- a/arch/arm/boot/dts/r8a7790.dtsi > +++ b/arch/arm/boot/dts/r8a7790.dtsi > @@ -1598,16 +1598,14 @@ > 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH > 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; > > - usb@0,1 { > + usb@1,0 { > reg = <0x800 0 0 0 0>; > - device_type = "pci"; > phys = <&usb0 0>; > phy-names = "usb"; > }; Both Documentation/devicetree/bindings/pci/pci.txt and ePAPR refer to http://www.firmware.org/1275/bindings/pci/pci2_1.pdf http://www.firmware.org/1275/practice/imap/imap0_9d.pdf which no longer exist. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds ^ permalink raw reply [flat|nested] 78+ messages in thread
* Re: [PATCH 06/15] ARM: dts: r8a779x: fix PCI bus dtc warnings @ 2017-03-22 8:58 ` Geert Uytterhoeven 0 siblings, 0 replies; 78+ messages in thread From: Geert Uytterhoeven @ 2017-03-22 8:58 UTC (permalink / raw) To: Rob Herring Cc: devicetree@vger.kernel.org, arm@kernel.org, Magnus Damm, Linux-Renesas, Simon Horman, linux-arm-kernel@lists.infradead.org Hi Rob, On Wed, Mar 22, 2017 at 3:03 AM, Rob Herring <robh@kernel.org> wrote: > dtc recently added PCI bus checks. Fix these warnings. It's always a good idea to put the warnings in the commit message: arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee090000/usb@0,1 node name is not "pci" or "pcie" arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee090000/usb@0,1 missing ranges for PCI bridge (or not a bridge) arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee090000/usb@0,1 incorrect #address-cells for PCI bridge arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee090000/usb@0,1 incorrect #size-cells for PCI bridge arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee090000/usb@0,1 missing bus-range for PCI bridge arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee090000/usb@0,2 node name is not "pci" or "pcie" arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee090000/usb@0,2 missing ranges for PCI bridge (or not a bridge) arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee090000/usb@0,2 incorrect #address-cells for PCI bridge arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee090000/usb@0,2 incorrect #size-cells for PCI bridge arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee090000/usb@0,2 missing bus-range for PCI bridge arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee0d0000/usb@0,1 node name is not "pci" or "pcie" arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee0d0000/usb@0,1 missing ranges for PCI bridge (or not a bridge) arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee0d0000/usb@0,1 incorrect #address-cells for PCI bridge arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee0d0000/usb@0,1 incorrect #size-cells for PCI bridge arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee0d0000/usb@0,1 missing bus-range for PCI bridge arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee0d0000/usb@0,2 node name is not "pci" or "pcie" arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee0d0000/usb@0,2 missing ranges for PCI bridge (or not a bridge) arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee0d0000/usb@0,2 incorrect #address-cells for PCI bridge arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee0d0000/usb@0,2 incorrect #size-cells for PCI bridge arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci@ee0d0000/usb@0,2 missing bus-range for PCI bridge arch/arm/boot/dts/r8a7790-lager.dtb: Warning (unit_address_format): Failed prerequisite 'pci_bridge' arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_reg): Failed prerequisite 'pci_bridge' arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_bus_num): Failed prerequisite 'pci_bridge' The above indeed go away with your patch, but I don't know why ;-) > Signed-off-by: Rob Herring <robh@kernel.org> > Cc: Simon Horman <horms@verge.net.au> > Cc: Magnus Damm <magnus.damm@gmail.com> > Cc: linux-renesas-soc@vger.kernel.org > --- > Sub-arch maintainers, please apply to your trees unless arm-soc wants > to take the whole lot. > > arch/arm/boot/dts/r8a7790.dtsi | 16 ++++++---------- > arch/arm/boot/dts/r8a7791.dtsi | 16 ++++++---------- > arch/arm/boot/dts/r8a7794.dtsi | 16 ++++++---------- > 3 files changed, 18 insertions(+), 30 deletions(-) > > diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi > index 6d10450de6d7..c16a37e9fb5d 100644 > --- a/arch/arm/boot/dts/r8a7790.dtsi > +++ b/arch/arm/boot/dts/r8a7790.dtsi > @@ -1598,16 +1598,14 @@ > 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH > 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; > > - usb@0,1 { > + usb@1,0 { > reg = <0x800 0 0 0 0>; > - device_type = "pci"; > phys = <&usb0 0>; > phy-names = "usb"; > }; Both Documentation/devicetree/bindings/pci/pci.txt and ePAPR refer to http://www.firmware.org/1275/bindings/pci/pci2_1.pdf http://www.firmware.org/1275/practice/imap/imap0_9d.pdf which no longer exist. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds ^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH 06/15] ARM: dts: r8a779x: fix PCI bus dtc warnings @ 2017-03-22 8:58 ` Geert Uytterhoeven 0 siblings, 0 replies; 78+ messages in thread From: Geert Uytterhoeven @ 2017-03-22 8:58 UTC (permalink / raw) To: linux-arm-kernel Hi Rob, On Wed, Mar 22, 2017 at 3:03 AM, Rob Herring <robh@kernel.org> wrote: > dtc recently added PCI bus checks. Fix these warnings. It's always a good idea to put the warnings in the commit message: arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci at ee090000/usb at 0,1 node name is not "pci" or "pcie" arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci at ee090000/usb at 0,1 missing ranges for PCI bridge (or not a bridge) arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci at ee090000/usb at 0,1 incorrect #address-cells for PCI bridge arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci at ee090000/usb at 0,1 incorrect #size-cells for PCI bridge arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci at ee090000/usb at 0,1 missing bus-range for PCI bridge arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci at ee090000/usb at 0,2 node name is not "pci" or "pcie" arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci at ee090000/usb at 0,2 missing ranges for PCI bridge (or not a bridge) arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci at ee090000/usb at 0,2 incorrect #address-cells for PCI bridge arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci at ee090000/usb at 0,2 incorrect #size-cells for PCI bridge arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci at ee090000/usb at 0,2 missing bus-range for PCI bridge arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci at ee0d0000/usb at 0,1 node name is not "pci" or "pcie" arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci at ee0d0000/usb at 0,1 missing ranges for PCI bridge (or not a bridge) arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci at ee0d0000/usb at 0,1 incorrect #address-cells for PCI bridge arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci at ee0d0000/usb at 0,1 incorrect #size-cells for PCI bridge arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci at ee0d0000/usb at 0,1 missing bus-range for PCI bridge arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci at ee0d0000/usb at 0,2 node name is not "pci" or "pcie" arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci at ee0d0000/usb at 0,2 missing ranges for PCI bridge (or not a bridge) arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci at ee0d0000/usb at 0,2 incorrect #address-cells for PCI bridge arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci at ee0d0000/usb at 0,2 incorrect #size-cells for PCI bridge arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node /pci at ee0d0000/usb at 0,2 missing bus-range for PCI bridge arch/arm/boot/dts/r8a7790-lager.dtb: Warning (unit_address_format): Failed prerequisite 'pci_bridge' arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_reg): Failed prerequisite 'pci_bridge' arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_bus_num): Failed prerequisite 'pci_bridge' The above indeed go away with your patch, but I don't know why ;-) > Signed-off-by: Rob Herring <robh@kernel.org> > Cc: Simon Horman <horms@verge.net.au> > Cc: Magnus Damm <magnus.damm@gmail.com> > Cc: linux-renesas-soc at vger.kernel.org > --- > Sub-arch maintainers, please apply to your trees unless arm-soc wants > to take the whole lot. > > arch/arm/boot/dts/r8a7790.dtsi | 16 ++++++---------- > arch/arm/boot/dts/r8a7791.dtsi | 16 ++++++---------- > arch/arm/boot/dts/r8a7794.dtsi | 16 ++++++---------- > 3 files changed, 18 insertions(+), 30 deletions(-) > > diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi > index 6d10450de6d7..c16a37e9fb5d 100644 > --- a/arch/arm/boot/dts/r8a7790.dtsi > +++ b/arch/arm/boot/dts/r8a7790.dtsi > @@ -1598,16 +1598,14 @@ > 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH > 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; > > - usb at 0,1 { > + usb at 1,0 { > reg = <0x800 0 0 0 0>; > - device_type = "pci"; > phys = <&usb0 0>; > phy-names = "usb"; > }; Both Documentation/devicetree/bindings/pci/pci.txt and ePAPR refer to http://www.firmware.org/1275/bindings/pci/pci2_1.pdf http://www.firmware.org/1275/practice/imap/imap0_9d.pdf which no longer exist. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds ^ permalink raw reply [flat|nested] 78+ messages in thread
* Re: [PATCH 06/15] ARM: dts: r8a779x: fix PCI bus dtc warnings 2017-03-22 8:58 ` Geert Uytterhoeven (?) @ 2017-03-22 13:47 ` Rob Herring -1 siblings, 0 replies; 78+ messages in thread From: Rob Herring @ 2017-03-22 13:47 UTC (permalink / raw) To: Geert Uytterhoeven Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, arm@kernel.org, Simon Horman, Magnus Damm, Linux-Renesas On Wed, Mar 22, 2017 at 3:58 AM, Geert Uytterhoeven <geert@linux-m68k.org> wrote: > Hi Rob, > > On Wed, Mar 22, 2017 at 3:03 AM, Rob Herring <robh@kernel.org> wrote: >> dtc recently added PCI bus checks. Fix these warnings. > > It's always a good idea to put the warnings in the commit message: Well, the warnings are a bit noisy in that they get repeated, can be misleading, change as I fix problems (device nodes are not checked if the bridge node fails), and most importantly I'm lazy having fixed these treewide. Sub-arch maintainers are welcome to make better patches. :) > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee090000/usb@0,1 node name is not "pci" or "pcie" > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee090000/usb@0,1 missing ranges for PCI bridge (or not a bridge) > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee090000/usb@0,1 incorrect #address-cells for PCI bridge > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee090000/usb@0,1 incorrect #size-cells for PCI bridge > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee090000/usb@0,1 missing bus-range for PCI bridge > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee090000/usb@0,2 node name is not "pci" or "pcie" > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee090000/usb@0,2 missing ranges for PCI bridge (or not a bridge) > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee090000/usb@0,2 incorrect #address-cells for PCI bridge > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee090000/usb@0,2 incorrect #size-cells for PCI bridge > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee090000/usb@0,2 missing bus-range for PCI bridge > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee0d0000/usb@0,1 node name is not "pci" or "pcie" > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee0d0000/usb@0,1 missing ranges for PCI bridge (or not a bridge) > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee0d0000/usb@0,1 incorrect #address-cells for PCI bridge > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee0d0000/usb@0,1 incorrect #size-cells for PCI bridge > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee0d0000/usb@0,1 missing bus-range for PCI bridge > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee0d0000/usb@0,2 node name is not "pci" or "pcie" > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee0d0000/usb@0,2 missing ranges for PCI bridge (or not a bridge) > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee0d0000/usb@0,2 incorrect #address-cells for PCI bridge > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee0d0000/usb@0,2 incorrect #size-cells for PCI bridge > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee0d0000/usb@0,2 missing bus-range for PCI bridge > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (unit_address_format): > Failed prerequisite 'pci_bridge' > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_reg): Failed > prerequisite 'pci_bridge' > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_bus_num): > Failed prerequisite 'pci_bridge' > > The above indeed go away with your patch, but I don't know why ;-) Most of these are because 'device_type = "pci";' should only be on PCI bridges, not PCI devices. > >> Signed-off-by: Rob Herring <robh@kernel.org> >> Cc: Simon Horman <horms@verge.net.au> >> Cc: Magnus Damm <magnus.damm@gmail.com> >> Cc: linux-renesas-soc@vger.kernel.org >> --- >> Sub-arch maintainers, please apply to your trees unless arm-soc wants >> to take the whole lot. >> >> arch/arm/boot/dts/r8a7790.dtsi | 16 ++++++---------- >> arch/arm/boot/dts/r8a7791.dtsi | 16 ++++++---------- >> arch/arm/boot/dts/r8a7794.dtsi | 16 ++++++---------- >> 3 files changed, 18 insertions(+), 30 deletions(-) >> >> diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi >> index 6d10450de6d7..c16a37e9fb5d 100644 >> --- a/arch/arm/boot/dts/r8a7790.dtsi >> +++ b/arch/arm/boot/dts/r8a7790.dtsi >> @@ -1598,16 +1598,14 @@ >> 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH >> 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; >> >> - usb@0,1 { >> + usb@1,0 { >> reg = <0x800 0 0 0 0>; >> - device_type = "pci"; >> phys = <&usb0 0>; >> phy-names = "usb"; >> }; > > Both Documentation/devicetree/bindings/pci/pci.txt and ePAPR refer to > http://www.firmware.org/1275/bindings/pci/pci2_1.pdf > http://www.firmware.org/1275/practice/imap/imap0_9d.pdf > which no longer exist. Yeah, they are still out there. Just need to google "PCI supplement 1275". :) I have the full archive saved off. I need to get them added to devicetree.org. Rob ^ permalink raw reply [flat|nested] 78+ messages in thread
* Re: [PATCH 06/15] ARM: dts: r8a779x: fix PCI bus dtc warnings @ 2017-03-22 13:47 ` Rob Herring 0 siblings, 0 replies; 78+ messages in thread From: Rob Herring @ 2017-03-22 13:47 UTC (permalink / raw) To: Geert Uytterhoeven Cc: devicetree@vger.kernel.org, arm@kernel.org, Magnus Damm, Linux-Renesas, Simon Horman, linux-arm-kernel@lists.infradead.org On Wed, Mar 22, 2017 at 3:58 AM, Geert Uytterhoeven <geert@linux-m68k.org> wrote: > Hi Rob, > > On Wed, Mar 22, 2017 at 3:03 AM, Rob Herring <robh@kernel.org> wrote: >> dtc recently added PCI bus checks. Fix these warnings. > > It's always a good idea to put the warnings in the commit message: Well, the warnings are a bit noisy in that they get repeated, can be misleading, change as I fix problems (device nodes are not checked if the bridge node fails), and most importantly I'm lazy having fixed these treewide. Sub-arch maintainers are welcome to make better patches. :) > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee090000/usb@0,1 node name is not "pci" or "pcie" > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee090000/usb@0,1 missing ranges for PCI bridge (or not a bridge) > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee090000/usb@0,1 incorrect #address-cells for PCI bridge > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee090000/usb@0,1 incorrect #size-cells for PCI bridge > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee090000/usb@0,1 missing bus-range for PCI bridge > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee090000/usb@0,2 node name is not "pci" or "pcie" > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee090000/usb@0,2 missing ranges for PCI bridge (or not a bridge) > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee090000/usb@0,2 incorrect #address-cells for PCI bridge > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee090000/usb@0,2 incorrect #size-cells for PCI bridge > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee090000/usb@0,2 missing bus-range for PCI bridge > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee0d0000/usb@0,1 node name is not "pci" or "pcie" > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee0d0000/usb@0,1 missing ranges for PCI bridge (or not a bridge) > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee0d0000/usb@0,1 incorrect #address-cells for PCI bridge > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee0d0000/usb@0,1 incorrect #size-cells for PCI bridge > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee0d0000/usb@0,1 missing bus-range for PCI bridge > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee0d0000/usb@0,2 node name is not "pci" or "pcie" > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee0d0000/usb@0,2 missing ranges for PCI bridge (or not a bridge) > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee0d0000/usb@0,2 incorrect #address-cells for PCI bridge > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee0d0000/usb@0,2 incorrect #size-cells for PCI bridge > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci@ee0d0000/usb@0,2 missing bus-range for PCI bridge > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (unit_address_format): > Failed prerequisite 'pci_bridge' > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_reg): Failed > prerequisite 'pci_bridge' > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_bus_num): > Failed prerequisite 'pci_bridge' > > The above indeed go away with your patch, but I don't know why ;-) Most of these are because 'device_type = "pci";' should only be on PCI bridges, not PCI devices. > >> Signed-off-by: Rob Herring <robh@kernel.org> >> Cc: Simon Horman <horms@verge.net.au> >> Cc: Magnus Damm <magnus.damm@gmail.com> >> Cc: linux-renesas-soc@vger.kernel.org >> --- >> Sub-arch maintainers, please apply to your trees unless arm-soc wants >> to take the whole lot. >> >> arch/arm/boot/dts/r8a7790.dtsi | 16 ++++++---------- >> arch/arm/boot/dts/r8a7791.dtsi | 16 ++++++---------- >> arch/arm/boot/dts/r8a7794.dtsi | 16 ++++++---------- >> 3 files changed, 18 insertions(+), 30 deletions(-) >> >> diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi >> index 6d10450de6d7..c16a37e9fb5d 100644 >> --- a/arch/arm/boot/dts/r8a7790.dtsi >> +++ b/arch/arm/boot/dts/r8a7790.dtsi >> @@ -1598,16 +1598,14 @@ >> 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH >> 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; >> >> - usb@0,1 { >> + usb@1,0 { >> reg = <0x800 0 0 0 0>; >> - device_type = "pci"; >> phys = <&usb0 0>; >> phy-names = "usb"; >> }; > > Both Documentation/devicetree/bindings/pci/pci.txt and ePAPR refer to > http://www.firmware.org/1275/bindings/pci/pci2_1.pdf > http://www.firmware.org/1275/practice/imap/imap0_9d.pdf > which no longer exist. Yeah, they are still out there. Just need to google "PCI supplement 1275". :) I have the full archive saved off. I need to get them added to devicetree.org. Rob ^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH 06/15] ARM: dts: r8a779x: fix PCI bus dtc warnings @ 2017-03-22 13:47 ` Rob Herring 0 siblings, 0 replies; 78+ messages in thread From: Rob Herring @ 2017-03-22 13:47 UTC (permalink / raw) To: linux-arm-kernel On Wed, Mar 22, 2017 at 3:58 AM, Geert Uytterhoeven <geert@linux-m68k.org> wrote: > Hi Rob, > > On Wed, Mar 22, 2017 at 3:03 AM, Rob Herring <robh@kernel.org> wrote: >> dtc recently added PCI bus checks. Fix these warnings. > > It's always a good idea to put the warnings in the commit message: Well, the warnings are a bit noisy in that they get repeated, can be misleading, change as I fix problems (device nodes are not checked if the bridge node fails), and most importantly I'm lazy having fixed these treewide. Sub-arch maintainers are welcome to make better patches. :) > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci at ee090000/usb at 0,1 node name is not "pci" or "pcie" > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci at ee090000/usb at 0,1 missing ranges for PCI bridge (or not a bridge) > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci at ee090000/usb at 0,1 incorrect #address-cells for PCI bridge > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci at ee090000/usb at 0,1 incorrect #size-cells for PCI bridge > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci at ee090000/usb at 0,1 missing bus-range for PCI bridge > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci at ee090000/usb at 0,2 node name is not "pci" or "pcie" > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci at ee090000/usb at 0,2 missing ranges for PCI bridge (or not a bridge) > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci at ee090000/usb at 0,2 incorrect #address-cells for PCI bridge > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci at ee090000/usb at 0,2 incorrect #size-cells for PCI bridge > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci at ee090000/usb at 0,2 missing bus-range for PCI bridge > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci at ee0d0000/usb at 0,1 node name is not "pci" or "pcie" > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci at ee0d0000/usb at 0,1 missing ranges for PCI bridge (or not a bridge) > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci at ee0d0000/usb at 0,1 incorrect #address-cells for PCI bridge > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci at ee0d0000/usb at 0,1 incorrect #size-cells for PCI bridge > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci at ee0d0000/usb at 0,1 missing bus-range for PCI bridge > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci at ee0d0000/usb at 0,2 node name is not "pci" or "pcie" > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci at ee0d0000/usb at 0,2 missing ranges for PCI bridge (or not a bridge) > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci at ee0d0000/usb at 0,2 incorrect #address-cells for PCI bridge > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci at ee0d0000/usb at 0,2 incorrect #size-cells for PCI bridge > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node > /pci at ee0d0000/usb at 0,2 missing bus-range for PCI bridge > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (unit_address_format): > Failed prerequisite 'pci_bridge' > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_reg): Failed > prerequisite 'pci_bridge' > arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_bus_num): > Failed prerequisite 'pci_bridge' > > The above indeed go away with your patch, but I don't know why ;-) Most of these are because 'device_type = "pci";' should only be on PCI bridges, not PCI devices. > >> Signed-off-by: Rob Herring <robh@kernel.org> >> Cc: Simon Horman <horms@verge.net.au> >> Cc: Magnus Damm <magnus.damm@gmail.com> >> Cc: linux-renesas-soc at vger.kernel.org >> --- >> Sub-arch maintainers, please apply to your trees unless arm-soc wants >> to take the whole lot. >> >> arch/arm/boot/dts/r8a7790.dtsi | 16 ++++++---------- >> arch/arm/boot/dts/r8a7791.dtsi | 16 ++++++---------- >> arch/arm/boot/dts/r8a7794.dtsi | 16 ++++++---------- >> 3 files changed, 18 insertions(+), 30 deletions(-) >> >> diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi >> index 6d10450de6d7..c16a37e9fb5d 100644 >> --- a/arch/arm/boot/dts/r8a7790.dtsi >> +++ b/arch/arm/boot/dts/r8a7790.dtsi >> @@ -1598,16 +1598,14 @@ >> 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH >> 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; >> >> - usb at 0,1 { >> + usb at 1,0 { >> reg = <0x800 0 0 0 0>; >> - device_type = "pci"; >> phys = <&usb0 0>; >> phy-names = "usb"; >> }; > > Both Documentation/devicetree/bindings/pci/pci.txt and ePAPR refer to > http://www.firmware.org/1275/bindings/pci/pci2_1.pdf > http://www.firmware.org/1275/practice/imap/imap0_9d.pdf > which no longer exist. Yeah, they are still out there. Just need to google "PCI supplement 1275". :) I have the full archive saved off. I need to get them added to devicetree.org. Rob ^ permalink raw reply [flat|nested] 78+ messages in thread
* Re: [PATCH 06/15] ARM: dts: r8a779x: fix PCI bus dtc warnings 2017-03-22 13:47 ` Rob Herring (?) @ 2017-03-22 14:06 ` Geert Uytterhoeven -1 siblings, 0 replies; 78+ messages in thread From: Geert Uytterhoeven @ 2017-03-22 14:06 UTC (permalink / raw) To: Rob Herring Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, arm@kernel.org, Simon Horman, Magnus Damm, Linux-Renesas Hi Rob, On Wed, Mar 22, 2017 at 2:47 PM, Rob Herring <robh@kernel.org> wrote: > On Wed, Mar 22, 2017 at 3:58 AM, Geert Uytterhoeven > <geert@linux-m68k.org> wrote: >> On Wed, Mar 22, 2017 at 3:03 AM, Rob Herring <robh@kernel.org> wrote: >>> dtc recently added PCI bus checks. Fix these warnings. >> >> It's always a good idea to put the warnings in the commit message: > > Well, the warnings are a bit noisy in that they get repeated, can be > misleading, change as I fix problems (device nodes are not checked if > the bridge node fails), and most importantly I'm lazy having fixed > these treewide. Sub-arch maintainers are welcome to make better > patches. :) > >> arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node >> /pci@ee090000/usb@0,1 node name is not "pci" or "pcie" [...] >> The above indeed go away with your patch, but I don't know why ;-) > > Most of these are because 'device_type = "pci";' should only be on PCI > bridges, not PCI devices. Thanks, retrying... arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_reg): Node /pci@ee090000/usb@0,1 PCI unit address format error, expected "1,0" arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_reg): Node /pci@ee090000/usb@0,2 PCI unit address format error, expected "2,0" arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_reg): Node /pci@ee0d0000/usb@0,1 PCI unit address format error, expected "1,0" arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_reg): Node /pci@ee0d0000/usb@0,2 PCI unit address format error, expected "2,0" arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_bus_num): Node /pci@ee0d0000/usb@0,1 PCI bus number 0 out of range, expected (2 - 2) arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_bus_num): Node /pci@ee0d0000/usb@0,2 PCI bus number 0 out of range, expected (2 - 2) OK, without 'device_type = "pci"' it makes much more sense... >> Both Documentation/devicetree/bindings/pci/pci.txt and ePAPR refer to >> http://www.firmware.org/1275/bindings/pci/pci2_1.pdf >> http://www.firmware.org/1275/practice/imap/imap0_9d.pdf >> which no longer exist. > > Yeah, they are still out there. Just need to google "PCI supplement 1275". :) > > I have the full archive saved off. I need to get them added to devicetree.org. Having working links in the DT bindings would be great. BTW, seems like I still have an offline copy of v2.0 of the PCI spec in PostScript format, from my CHRP days[*], when hard disks where smaller than CD-Rs ;-) [*] I never managed to memorize the PCI DT bindings, though. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds ^ permalink raw reply [flat|nested] 78+ messages in thread
* Re: [PATCH 06/15] ARM: dts: r8a779x: fix PCI bus dtc warnings @ 2017-03-22 14:06 ` Geert Uytterhoeven 0 siblings, 0 replies; 78+ messages in thread From: Geert Uytterhoeven @ 2017-03-22 14:06 UTC (permalink / raw) To: Rob Herring Cc: devicetree@vger.kernel.org, arm@kernel.org, Magnus Damm, Linux-Renesas, Simon Horman, linux-arm-kernel@lists.infradead.org Hi Rob, On Wed, Mar 22, 2017 at 2:47 PM, Rob Herring <robh@kernel.org> wrote: > On Wed, Mar 22, 2017 at 3:58 AM, Geert Uytterhoeven > <geert@linux-m68k.org> wrote: >> On Wed, Mar 22, 2017 at 3:03 AM, Rob Herring <robh@kernel.org> wrote: >>> dtc recently added PCI bus checks. Fix these warnings. >> >> It's always a good idea to put the warnings in the commit message: > > Well, the warnings are a bit noisy in that they get repeated, can be > misleading, change as I fix problems (device nodes are not checked if > the bridge node fails), and most importantly I'm lazy having fixed > these treewide. Sub-arch maintainers are welcome to make better > patches. :) > >> arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node >> /pci@ee090000/usb@0,1 node name is not "pci" or "pcie" [...] >> The above indeed go away with your patch, but I don't know why ;-) > > Most of these are because 'device_type = "pci";' should only be on PCI > bridges, not PCI devices. Thanks, retrying... arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_reg): Node /pci@ee090000/usb@0,1 PCI unit address format error, expected "1,0" arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_reg): Node /pci@ee090000/usb@0,2 PCI unit address format error, expected "2,0" arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_reg): Node /pci@ee0d0000/usb@0,1 PCI unit address format error, expected "1,0" arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_reg): Node /pci@ee0d0000/usb@0,2 PCI unit address format error, expected "2,0" arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_bus_num): Node /pci@ee0d0000/usb@0,1 PCI bus number 0 out of range, expected (2 - 2) arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_bus_num): Node /pci@ee0d0000/usb@0,2 PCI bus number 0 out of range, expected (2 - 2) OK, without 'device_type = "pci"' it makes much more sense... >> Both Documentation/devicetree/bindings/pci/pci.txt and ePAPR refer to >> http://www.firmware.org/1275/bindings/pci/pci2_1.pdf >> http://www.firmware.org/1275/practice/imap/imap0_9d.pdf >> which no longer exist. > > Yeah, they are still out there. Just need to google "PCI supplement 1275". :) > > I have the full archive saved off. I need to get them added to devicetree.org. Having working links in the DT bindings would be great. BTW, seems like I still have an offline copy of v2.0 of the PCI spec in PostScript format, from my CHRP days[*], when hard disks where smaller than CD-Rs ;-) [*] I never managed to memorize the PCI DT bindings, though. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds ^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH 06/15] ARM: dts: r8a779x: fix PCI bus dtc warnings @ 2017-03-22 14:06 ` Geert Uytterhoeven 0 siblings, 0 replies; 78+ messages in thread From: Geert Uytterhoeven @ 2017-03-22 14:06 UTC (permalink / raw) To: linux-arm-kernel Hi Rob, On Wed, Mar 22, 2017 at 2:47 PM, Rob Herring <robh@kernel.org> wrote: > On Wed, Mar 22, 2017 at 3:58 AM, Geert Uytterhoeven > <geert@linux-m68k.org> wrote: >> On Wed, Mar 22, 2017 at 3:03 AM, Rob Herring <robh@kernel.org> wrote: >>> dtc recently added PCI bus checks. Fix these warnings. >> >> It's always a good idea to put the warnings in the commit message: > > Well, the warnings are a bit noisy in that they get repeated, can be > misleading, change as I fix problems (device nodes are not checked if > the bridge node fails), and most importantly I'm lazy having fixed > these treewide. Sub-arch maintainers are welcome to make better > patches. :) > >> arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_bridge): Node >> /pci at ee090000/usb at 0,1 node name is not "pci" or "pcie" [...] >> The above indeed go away with your patch, but I don't know why ;-) > > Most of these are because 'device_type = "pci";' should only be on PCI > bridges, not PCI devices. Thanks, retrying... arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_reg): Node /pci at ee090000/usb at 0,1 PCI unit address format error, expected "1,0" arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_reg): Node /pci at ee090000/usb at 0,2 PCI unit address format error, expected "2,0" arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_reg): Node /pci at ee0d0000/usb at 0,1 PCI unit address format error, expected "1,0" arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_reg): Node /pci at ee0d0000/usb at 0,2 PCI unit address format error, expected "2,0" arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_bus_num): Node /pci at ee0d0000/usb at 0,1 PCI bus number 0 out of range, expected (2 - 2) arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_bus_num): Node /pci at ee0d0000/usb at 0,2 PCI bus number 0 out of range, expected (2 - 2) OK, without 'device_type = "pci"' it makes much more sense... >> Both Documentation/devicetree/bindings/pci/pci.txt and ePAPR refer to >> http://www.firmware.org/1275/bindings/pci/pci2_1.pdf >> http://www.firmware.org/1275/practice/imap/imap0_9d.pdf >> which no longer exist. > > Yeah, they are still out there. Just need to google "PCI supplement 1275". :) > > I have the full archive saved off. I need to get them added to devicetree.org. Having working links in the DT bindings would be great. BTW, seems like I still have an offline copy of v2.0 of the PCI spec in PostScript format, from my CHRP days[*], when hard disks where smaller than CD-Rs ;-) [*] I never managed to memorize the PCI DT bindings, though. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds ^ permalink raw reply [flat|nested] 78+ messages in thread
* Re: [PATCH 06/15] ARM: dts: r8a779x: fix PCI bus dtc warnings 2017-03-22 2:03 ` Rob Herring (?) @ 2017-03-24 7:06 ` Simon Horman -1 siblings, 0 replies; 78+ messages in thread From: Simon Horman @ 2017-03-24 7:06 UTC (permalink / raw) To: Rob Herring Cc: linux-arm-kernel, devicetree, arm, Magnus Damm, linux-renesas-soc, Geert Uytterhoeven On Tue, Mar 21, 2017 at 09:03:04PM -0500, Rob Herring wrote: > dtc recently added PCI bus checks. Fix these warnings. > > Signed-off-by: Rob Herring <robh@kernel.org> > Cc: Simon Horman <horms@verge.net.au> > Cc: Magnus Damm <magnus.damm@gmail.com> > Cc: linux-renesas-soc@vger.kernel.org > --- > Sub-arch maintainers, please apply to your trees unless arm-soc wants > to take the whole lot. I would prefer to take these through my tree to reduce the chances of conflicts emerging later. Geert, are you happy with this patch and its changelog as-is? > > arch/arm/boot/dts/r8a7790.dtsi | 16 ++++++---------- > arch/arm/boot/dts/r8a7791.dtsi | 16 ++++++---------- > arch/arm/boot/dts/r8a7794.dtsi | 16 ++++++---------- > 3 files changed, 18 insertions(+), 30 deletions(-) > > diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi > index 6d10450de6d7..c16a37e9fb5d 100644 > --- a/arch/arm/boot/dts/r8a7790.dtsi > +++ b/arch/arm/boot/dts/r8a7790.dtsi > @@ -1598,16 +1598,14 @@ > 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH > 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; > > - usb@0,1 { > + usb@1,0 { > reg = <0x800 0 0 0 0>; > - device_type = "pci"; > phys = <&usb0 0>; > phy-names = "usb"; > }; > > - usb@0,2 { > + usb@2,0 { > reg = <0x1000 0 0 0 0>; > - device_type = "pci"; > phys = <&usb0 0>; > phy-names = "usb"; > }; > @@ -1654,16 +1652,14 @@ > 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH > 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; > > - usb@0,1 { > - reg = <0x800 0 0 0 0>; > - device_type = "pci"; > + usb@1,0 { > + reg = <0x20800 0 0 0 0>; > phys = <&usb2 0>; > phy-names = "usb"; > }; > > - usb@0,2 { > - reg = <0x1000 0 0 0 0>; > - device_type = "pci"; > + usb@2,0 { > + reg = <0x21000 0 0 0 0>; > phys = <&usb2 0>; > phy-names = "usb"; > }; > diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi > index 9f9e48511836..a1d8686eaea5 100644 > --- a/arch/arm/boot/dts/r8a7791.dtsi > +++ b/arch/arm/boot/dts/r8a7791.dtsi > @@ -1596,16 +1596,14 @@ > 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH > 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; > > - usb@0,1 { > + usb@1,0 { > reg = <0x800 0 0 0 0>; > - device_type = "pci"; > phys = <&usb0 0>; > phy-names = "usb"; > }; > > - usb@0,2 { > + usb@2,0 { > reg = <0x1000 0 0 0 0>; > - device_type = "pci"; > phys = <&usb0 0>; > phy-names = "usb"; > }; > @@ -1631,16 +1629,14 @@ > 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH > 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; > > - usb@0,1 { > - reg = <0x800 0 0 0 0>; > - device_type = "pci"; > + usb@1,0 { > + reg = <0x10800 0 0 0 0>; > phys = <&usb2 0>; > phy-names = "usb"; > }; > > - usb@0,2 { > - reg = <0x1000 0 0 0 0>; > - device_type = "pci"; > + usb@2,0 { > + reg = <0x11000 0 0 0 0>; > phys = <&usb2 0>; > phy-names = "usb"; > }; > diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi > index 319c1069b7ee..c07495185cc4 100644 > --- a/arch/arm/boot/dts/r8a7794.dtsi > +++ b/arch/arm/boot/dts/r8a7794.dtsi > @@ -817,16 +817,14 @@ > 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH > 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; > > - usb@0,1 { > + usb@1,0 { > reg = <0x800 0 0 0 0>; > - device_type = "pci"; > phys = <&usb0 0>; > phy-names = "usb"; > }; > > - usb@0,2 { > + usb@2,0 { > reg = <0x1000 0 0 0 0>; > - device_type = "pci"; > phys = <&usb0 0>; > phy-names = "usb"; > }; > @@ -852,16 +850,14 @@ > 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH > 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; > > - usb@0,1 { > - reg = <0x800 0 0 0 0>; > - device_type = "pci"; > + usb@1,0 { > + reg = <0x10800 0 0 0 0>; > phys = <&usb2 0>; > phy-names = "usb"; > }; > > - usb@0,2 { > - reg = <0x1000 0 0 0 0>; > - device_type = "pci"; > + usb@2,0 { > + reg = <0x11000 0 0 0 0>; > phys = <&usb2 0>; > phy-names = "usb"; > }; > -- > 2.10.1 > ^ permalink raw reply [flat|nested] 78+ messages in thread
* Re: [PATCH 06/15] ARM: dts: r8a779x: fix PCI bus dtc warnings @ 2017-03-24 7:06 ` Simon Horman 0 siblings, 0 replies; 78+ messages in thread From: Simon Horman @ 2017-03-24 7:06 UTC (permalink / raw) To: Rob Herring Cc: devicetree, Magnus Damm, linux-renesas-soc, arm, Geert Uytterhoeven, linux-arm-kernel On Tue, Mar 21, 2017 at 09:03:04PM -0500, Rob Herring wrote: > dtc recently added PCI bus checks. Fix these warnings. > > Signed-off-by: Rob Herring <robh@kernel.org> > Cc: Simon Horman <horms@verge.net.au> > Cc: Magnus Damm <magnus.damm@gmail.com> > Cc: linux-renesas-soc@vger.kernel.org > --- > Sub-arch maintainers, please apply to your trees unless arm-soc wants > to take the whole lot. I would prefer to take these through my tree to reduce the chances of conflicts emerging later. Geert, are you happy with this patch and its changelog as-is? > > arch/arm/boot/dts/r8a7790.dtsi | 16 ++++++---------- > arch/arm/boot/dts/r8a7791.dtsi | 16 ++++++---------- > arch/arm/boot/dts/r8a7794.dtsi | 16 ++++++---------- > 3 files changed, 18 insertions(+), 30 deletions(-) > > diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi > index 6d10450de6d7..c16a37e9fb5d 100644 > --- a/arch/arm/boot/dts/r8a7790.dtsi > +++ b/arch/arm/boot/dts/r8a7790.dtsi > @@ -1598,16 +1598,14 @@ > 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH > 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; > > - usb@0,1 { > + usb@1,0 { > reg = <0x800 0 0 0 0>; > - device_type = "pci"; > phys = <&usb0 0>; > phy-names = "usb"; > }; > > - usb@0,2 { > + usb@2,0 { > reg = <0x1000 0 0 0 0>; > - device_type = "pci"; > phys = <&usb0 0>; > phy-names = "usb"; > }; > @@ -1654,16 +1652,14 @@ > 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH > 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; > > - usb@0,1 { > - reg = <0x800 0 0 0 0>; > - device_type = "pci"; > + usb@1,0 { > + reg = <0x20800 0 0 0 0>; > phys = <&usb2 0>; > phy-names = "usb"; > }; > > - usb@0,2 { > - reg = <0x1000 0 0 0 0>; > - device_type = "pci"; > + usb@2,0 { > + reg = <0x21000 0 0 0 0>; > phys = <&usb2 0>; > phy-names = "usb"; > }; > diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi > index 9f9e48511836..a1d8686eaea5 100644 > --- a/arch/arm/boot/dts/r8a7791.dtsi > +++ b/arch/arm/boot/dts/r8a7791.dtsi > @@ -1596,16 +1596,14 @@ > 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH > 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; > > - usb@0,1 { > + usb@1,0 { > reg = <0x800 0 0 0 0>; > - device_type = "pci"; > phys = <&usb0 0>; > phy-names = "usb"; > }; > > - usb@0,2 { > + usb@2,0 { > reg = <0x1000 0 0 0 0>; > - device_type = "pci"; > phys = <&usb0 0>; > phy-names = "usb"; > }; > @@ -1631,16 +1629,14 @@ > 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH > 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; > > - usb@0,1 { > - reg = <0x800 0 0 0 0>; > - device_type = "pci"; > + usb@1,0 { > + reg = <0x10800 0 0 0 0>; > phys = <&usb2 0>; > phy-names = "usb"; > }; > > - usb@0,2 { > - reg = <0x1000 0 0 0 0>; > - device_type = "pci"; > + usb@2,0 { > + reg = <0x11000 0 0 0 0>; > phys = <&usb2 0>; > phy-names = "usb"; > }; > diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi > index 319c1069b7ee..c07495185cc4 100644 > --- a/arch/arm/boot/dts/r8a7794.dtsi > +++ b/arch/arm/boot/dts/r8a7794.dtsi > @@ -817,16 +817,14 @@ > 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH > 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; > > - usb@0,1 { > + usb@1,0 { > reg = <0x800 0 0 0 0>; > - device_type = "pci"; > phys = <&usb0 0>; > phy-names = "usb"; > }; > > - usb@0,2 { > + usb@2,0 { > reg = <0x1000 0 0 0 0>; > - device_type = "pci"; > phys = <&usb0 0>; > phy-names = "usb"; > }; > @@ -852,16 +850,14 @@ > 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH > 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; > > - usb@0,1 { > - reg = <0x800 0 0 0 0>; > - device_type = "pci"; > + usb@1,0 { > + reg = <0x10800 0 0 0 0>; > phys = <&usb2 0>; > phy-names = "usb"; > }; > > - usb@0,2 { > - reg = <0x1000 0 0 0 0>; > - device_type = "pci"; > + usb@2,0 { > + reg = <0x11000 0 0 0 0>; > phys = <&usb2 0>; > phy-names = "usb"; > }; > -- > 2.10.1 > ^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH 06/15] ARM: dts: r8a779x: fix PCI bus dtc warnings @ 2017-03-24 7:06 ` Simon Horman 0 siblings, 0 replies; 78+ messages in thread From: Simon Horman @ 2017-03-24 7:06 UTC (permalink / raw) To: linux-arm-kernel On Tue, Mar 21, 2017 at 09:03:04PM -0500, Rob Herring wrote: > dtc recently added PCI bus checks. Fix these warnings. > > Signed-off-by: Rob Herring <robh@kernel.org> > Cc: Simon Horman <horms@verge.net.au> > Cc: Magnus Damm <magnus.damm@gmail.com> > Cc: linux-renesas-soc at vger.kernel.org > --- > Sub-arch maintainers, please apply to your trees unless arm-soc wants > to take the whole lot. I would prefer to take these through my tree to reduce the chances of conflicts emerging later. Geert, are you happy with this patch and its changelog as-is? > > arch/arm/boot/dts/r8a7790.dtsi | 16 ++++++---------- > arch/arm/boot/dts/r8a7791.dtsi | 16 ++++++---------- > arch/arm/boot/dts/r8a7794.dtsi | 16 ++++++---------- > 3 files changed, 18 insertions(+), 30 deletions(-) > > diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi > index 6d10450de6d7..c16a37e9fb5d 100644 > --- a/arch/arm/boot/dts/r8a7790.dtsi > +++ b/arch/arm/boot/dts/r8a7790.dtsi > @@ -1598,16 +1598,14 @@ > 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH > 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; > > - usb at 0,1 { > + usb at 1,0 { > reg = <0x800 0 0 0 0>; > - device_type = "pci"; > phys = <&usb0 0>; > phy-names = "usb"; > }; > > - usb at 0,2 { > + usb at 2,0 { > reg = <0x1000 0 0 0 0>; > - device_type = "pci"; > phys = <&usb0 0>; > phy-names = "usb"; > }; > @@ -1654,16 +1652,14 @@ > 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH > 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; > > - usb at 0,1 { > - reg = <0x800 0 0 0 0>; > - device_type = "pci"; > + usb at 1,0 { > + reg = <0x20800 0 0 0 0>; > phys = <&usb2 0>; > phy-names = "usb"; > }; > > - usb at 0,2 { > - reg = <0x1000 0 0 0 0>; > - device_type = "pci"; > + usb at 2,0 { > + reg = <0x21000 0 0 0 0>; > phys = <&usb2 0>; > phy-names = "usb"; > }; > diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi > index 9f9e48511836..a1d8686eaea5 100644 > --- a/arch/arm/boot/dts/r8a7791.dtsi > +++ b/arch/arm/boot/dts/r8a7791.dtsi > @@ -1596,16 +1596,14 @@ > 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH > 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; > > - usb at 0,1 { > + usb at 1,0 { > reg = <0x800 0 0 0 0>; > - device_type = "pci"; > phys = <&usb0 0>; > phy-names = "usb"; > }; > > - usb at 0,2 { > + usb at 2,0 { > reg = <0x1000 0 0 0 0>; > - device_type = "pci"; > phys = <&usb0 0>; > phy-names = "usb"; > }; > @@ -1631,16 +1629,14 @@ > 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH > 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; > > - usb at 0,1 { > - reg = <0x800 0 0 0 0>; > - device_type = "pci"; > + usb at 1,0 { > + reg = <0x10800 0 0 0 0>; > phys = <&usb2 0>; > phy-names = "usb"; > }; > > - usb at 0,2 { > - reg = <0x1000 0 0 0 0>; > - device_type = "pci"; > + usb at 2,0 { > + reg = <0x11000 0 0 0 0>; > phys = <&usb2 0>; > phy-names = "usb"; > }; > diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi > index 319c1069b7ee..c07495185cc4 100644 > --- a/arch/arm/boot/dts/r8a7794.dtsi > +++ b/arch/arm/boot/dts/r8a7794.dtsi > @@ -817,16 +817,14 @@ > 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH > 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; > > - usb at 0,1 { > + usb at 1,0 { > reg = <0x800 0 0 0 0>; > - device_type = "pci"; > phys = <&usb0 0>; > phy-names = "usb"; > }; > > - usb at 0,2 { > + usb at 2,0 { > reg = <0x1000 0 0 0 0>; > - device_type = "pci"; > phys = <&usb0 0>; > phy-names = "usb"; > }; > @@ -852,16 +850,14 @@ > 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH > 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; > > - usb at 0,1 { > - reg = <0x800 0 0 0 0>; > - device_type = "pci"; > + usb at 1,0 { > + reg = <0x10800 0 0 0 0>; > phys = <&usb2 0>; > phy-names = "usb"; > }; > > - usb at 0,2 { > - reg = <0x1000 0 0 0 0>; > - device_type = "pci"; > + usb at 2,0 { > + reg = <0x11000 0 0 0 0>; > phys = <&usb2 0>; > phy-names = "usb"; > }; > -- > 2.10.1 > ^ permalink raw reply [flat|nested] 78+ messages in thread
* Re: [PATCH 06/15] ARM: dts: r8a779x: fix PCI bus dtc warnings 2017-03-24 7:06 ` Simon Horman (?) @ 2017-03-24 7:59 ` Geert Uytterhoeven -1 siblings, 0 replies; 78+ messages in thread From: Geert Uytterhoeven @ 2017-03-24 7:59 UTC (permalink / raw) To: Simon Horman Cc: Rob Herring, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, arm@kernel.org, Magnus Damm, Linux-Renesas Hi Simon, On Fri, Mar 24, 2017 at 8:06 AM, Simon Horman <horms@verge.net.au> wrote: > On Tue, Mar 21, 2017 at 09:03:04PM -0500, Rob Herring wrote: >> dtc recently added PCI bus checks. Fix these warnings. >> >> Signed-off-by: Rob Herring <robh@kernel.org> >> Cc: Simon Horman <horms@verge.net.au> >> Cc: Magnus Damm <magnus.damm@gmail.com> >> Cc: linux-renesas-soc@vger.kernel.org >> --- >> Sub-arch maintainers, please apply to your trees unless arm-soc wants >> to take the whole lot. > > I would prefer to take these through my tree to reduce the chances of > conflicts emerging later. > > Geert, are you happy with this patch and its changelog as-is? I'd use something like: ---8<---------- The bogus 'device_type = "pci"' confuses dtc, causing lots of totally unrelated warnings. After fixing that, real warnings like arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_reg): Node /pci@ee090000/usb@0,1 PCI unit address format error, expected "1,0" are left. Correct the unit-adresses and reg properties of the subnodes to fix these. ---------->8--- Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds ^ permalink raw reply [flat|nested] 78+ messages in thread
* Re: [PATCH 06/15] ARM: dts: r8a779x: fix PCI bus dtc warnings @ 2017-03-24 7:59 ` Geert Uytterhoeven 0 siblings, 0 replies; 78+ messages in thread From: Geert Uytterhoeven @ 2017-03-24 7:59 UTC (permalink / raw) To: Simon Horman Cc: Rob Herring, devicetree@vger.kernel.org, Magnus Damm, Linux-Renesas, arm@kernel.org, linux-arm-kernel@lists.infradead.org Hi Simon, On Fri, Mar 24, 2017 at 8:06 AM, Simon Horman <horms@verge.net.au> wrote: > On Tue, Mar 21, 2017 at 09:03:04PM -0500, Rob Herring wrote: >> dtc recently added PCI bus checks. Fix these warnings. >> >> Signed-off-by: Rob Herring <robh@kernel.org> >> Cc: Simon Horman <horms@verge.net.au> >> Cc: Magnus Damm <magnus.damm@gmail.com> >> Cc: linux-renesas-soc@vger.kernel.org >> --- >> Sub-arch maintainers, please apply to your trees unless arm-soc wants >> to take the whole lot. > > I would prefer to take these through my tree to reduce the chances of > conflicts emerging later. > > Geert, are you happy with this patch and its changelog as-is? I'd use something like: ---8<---------- The bogus 'device_type = "pci"' confuses dtc, causing lots of totally unrelated warnings. After fixing that, real warnings like arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_reg): Node /pci@ee090000/usb@0,1 PCI unit address format error, expected "1,0" are left. Correct the unit-adresses and reg properties of the subnodes to fix these. ---------->8--- Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds ^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH 06/15] ARM: dts: r8a779x: fix PCI bus dtc warnings @ 2017-03-24 7:59 ` Geert Uytterhoeven 0 siblings, 0 replies; 78+ messages in thread From: Geert Uytterhoeven @ 2017-03-24 7:59 UTC (permalink / raw) To: linux-arm-kernel Hi Simon, On Fri, Mar 24, 2017 at 8:06 AM, Simon Horman <horms@verge.net.au> wrote: > On Tue, Mar 21, 2017 at 09:03:04PM -0500, Rob Herring wrote: >> dtc recently added PCI bus checks. Fix these warnings. >> >> Signed-off-by: Rob Herring <robh@kernel.org> >> Cc: Simon Horman <horms@verge.net.au> >> Cc: Magnus Damm <magnus.damm@gmail.com> >> Cc: linux-renesas-soc at vger.kernel.org >> --- >> Sub-arch maintainers, please apply to your trees unless arm-soc wants >> to take the whole lot. > > I would prefer to take these through my tree to reduce the chances of > conflicts emerging later. > > Geert, are you happy with this patch and its changelog as-is? I'd use something like: ---8<---------- The bogus 'device_type = "pci"' confuses dtc, causing lots of totally unrelated warnings. After fixing that, real warnings like arch/arm/boot/dts/r8a7790-lager.dtb: Warning (pci_device_reg): Node /pci at ee090000/usb@0,1 PCI unit address format error, expected "1,0" are left. Correct the unit-adresses and reg properties of the subnodes to fix these. ---------->8--- Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds ^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH 07/15] ARM: dts: spear13xx: fix PCI bus dtc warnings [not found] ` <20170322020313.24338-1-robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> @ 2017-03-22 2:03 ` Rob Herring 2017-03-22 2:03 ` Rob Herring 2017-03-22 2:03 ` Rob Herring 2 siblings, 0 replies; 78+ messages in thread From: Rob Herring @ 2017-03-22 2:03 UTC (permalink / raw) To: linux-arm-kernel dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Viresh Kumar <vireshk@kernel.org> Cc: Shiraz Hashim <shiraz.linux.kernel@gmail.com> --- Sub-arch maintainers, please apply to your trees unless arm-soc wants to take the whole lot. arch/arm/boot/dts/spear1310.dtsi | 3 +++ arch/arm/boot/dts/spear1340.dtsi | 1 + 2 files changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/spear1310.dtsi b/arch/arm/boot/dts/spear1310.dtsi index 54bc6d3cf290..40f4ad3c34c6 100644 --- a/arch/arm/boot/dts/spear1310.dtsi +++ b/arch/arm/boot/dts/spear1310.dtsi @@ -98,6 +98,7 @@ device_type = "pci"; ranges = <0x81000000 0 0 0x80020000 0 0x00010000 /* downstream I/O */ 0x82000000 0 0x80030000 0xc0030000 0 0x0ffd0000>; /* non-prefetchable memory */ + bus-range = <0x00 0xff>; status = "disabled"; }; @@ -116,6 +117,7 @@ device_type = "pci"; ranges = <0x81000000 0 0 0x90020000 0 0x00010000 /* downstream I/O */ 0x82000000 0 0x90030000 0x90030000 0 0x0ffd0000>; /* non-prefetchable memory */ + bus-range = <0x00 0xff>; status = "disabled"; }; @@ -134,6 +136,7 @@ device_type = "pci"; ranges = <0x81000000 0 0 0xc0020000 0 0x00010000 /* downstream I/O */ 0x82000000 0 0xc0030000 0xc0030000 0 0x0ffd0000>; /* non-prefetchable memory */ + bus-range = <0x00 0xff>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/spear1340.dtsi b/arch/arm/boot/dts/spear1340.dtsi index df2232d767ed..5f347054527d 100644 --- a/arch/arm/boot/dts/spear1340.dtsi +++ b/arch/arm/boot/dts/spear1340.dtsi @@ -63,6 +63,7 @@ device_type = "pci"; ranges = <0x81000000 0 0 0x80020000 0 0x00010000 /* downstream I/O */ 0x82000000 0 0x80030000 0xc0030000 0 0x0ffd0000>; /* non-prefetchable memory */ + bus-range = <0x00 0xff>; status = "disabled"; }; -- 2.10.1 ^ permalink raw reply related [flat|nested] 78+ messages in thread
* [PATCH 07/15] ARM: dts: spear13xx: fix PCI bus dtc warnings @ 2017-03-22 2:03 ` Rob Herring 0 siblings, 0 replies; 78+ messages in thread From: Rob Herring @ 2017-03-22 2:03 UTC (permalink / raw) To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, devicetree-u79uwXL29TY76Z2rM5mHXA Cc: arm-DgEjT+Ai2ygdnm+yROfE0A, Viresh Kumar, Shiraz Hashim dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> Cc: Viresh Kumar <vireshk-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> Cc: Shiraz Hashim <shiraz.linux.kernel-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> --- Sub-arch maintainers, please apply to your trees unless arm-soc wants to take the whole lot. arch/arm/boot/dts/spear1310.dtsi | 3 +++ arch/arm/boot/dts/spear1340.dtsi | 1 + 2 files changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/spear1310.dtsi b/arch/arm/boot/dts/spear1310.dtsi index 54bc6d3cf290..40f4ad3c34c6 100644 --- a/arch/arm/boot/dts/spear1310.dtsi +++ b/arch/arm/boot/dts/spear1310.dtsi @@ -98,6 +98,7 @@ device_type = "pci"; ranges = <0x81000000 0 0 0x80020000 0 0x00010000 /* downstream I/O */ 0x82000000 0 0x80030000 0xc0030000 0 0x0ffd0000>; /* non-prefetchable memory */ + bus-range = <0x00 0xff>; status = "disabled"; }; @@ -116,6 +117,7 @@ device_type = "pci"; ranges = <0x81000000 0 0 0x90020000 0 0x00010000 /* downstream I/O */ 0x82000000 0 0x90030000 0x90030000 0 0x0ffd0000>; /* non-prefetchable memory */ + bus-range = <0x00 0xff>; status = "disabled"; }; @@ -134,6 +136,7 @@ device_type = "pci"; ranges = <0x81000000 0 0 0xc0020000 0 0x00010000 /* downstream I/O */ 0x82000000 0 0xc0030000 0xc0030000 0 0x0ffd0000>; /* non-prefetchable memory */ + bus-range = <0x00 0xff>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/spear1340.dtsi b/arch/arm/boot/dts/spear1340.dtsi index df2232d767ed..5f347054527d 100644 --- a/arch/arm/boot/dts/spear1340.dtsi +++ b/arch/arm/boot/dts/spear1340.dtsi @@ -63,6 +63,7 @@ device_type = "pci"; ranges = <0x81000000 0 0 0x80020000 0 0x00010000 /* downstream I/O */ 0x82000000 0 0x80030000 0xc0030000 0 0x0ffd0000>; /* non-prefetchable memory */ + bus-range = <0x00 0xff>; status = "disabled"; }; -- 2.10.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply related [flat|nested] 78+ messages in thread
* [PATCH 07/15] ARM: dts: spear13xx: fix PCI bus dtc warnings 2017-03-22 2:03 ` Rob Herring @ 2017-03-22 4:11 ` Viresh Kumar -1 siblings, 0 replies; 78+ messages in thread From: Viresh Kumar @ 2017-03-22 4:11 UTC (permalink / raw) To: linux-arm-kernel On 21-03-17, 21:03, Rob Herring wrote: > dtc recently added PCI bus checks. Fix these warnings. > > Signed-off-by: Rob Herring <robh@kernel.org> > Cc: Viresh Kumar <vireshk@kernel.org> > Cc: Shiraz Hashim <shiraz.linux.kernel@gmail.com> > --- > Sub-arch maintainers, please apply to your trees unless arm-soc wants > to take the whole lot. > > arch/arm/boot/dts/spear1310.dtsi | 3 +++ > arch/arm/boot/dts/spear1340.dtsi | 1 + > 2 files changed, 4 insertions(+) Acked-by: Viresh Kumar <viresh.kumar@linaro.org> -- viresh ^ permalink raw reply [flat|nested] 78+ messages in thread
* Re: [PATCH 07/15] ARM: dts: spear13xx: fix PCI bus dtc warnings @ 2017-03-22 4:11 ` Viresh Kumar 0 siblings, 0 replies; 78+ messages in thread From: Viresh Kumar @ 2017-03-22 4:11 UTC (permalink / raw) To: Rob Herring Cc: devicetree, arm, Shiraz Hashim, linux-arm-kernel, Viresh Kumar On 21-03-17, 21:03, Rob Herring wrote: > dtc recently added PCI bus checks. Fix these warnings. > > Signed-off-by: Rob Herring <robh@kernel.org> > Cc: Viresh Kumar <vireshk@kernel.org> > Cc: Shiraz Hashim <shiraz.linux.kernel@gmail.com> > --- > Sub-arch maintainers, please apply to your trees unless arm-soc wants > to take the whole lot. > > arch/arm/boot/dts/spear1310.dtsi | 3 +++ > arch/arm/boot/dts/spear1340.dtsi | 1 + > 2 files changed, 4 insertions(+) Acked-by: Viresh Kumar <viresh.kumar@linaro.org> -- viresh ^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH 09/15] ARM: dts: versatile: fix PCI bus dtc warnings [not found] ` <20170322020313.24338-1-robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> @ 2017-03-22 2:03 ` Rob Herring 2017-03-22 2:03 ` Rob Herring 2017-03-22 2:03 ` Rob Herring 2 siblings, 0 replies; 78+ messages in thread From: Rob Herring @ 2017-03-22 2:03 UTC (permalink / raw) To: linux-arm-kernel dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Russell King <linux@armlinux.org.uk> --- Sub-arch maintainers, please apply to your trees unless arm-soc wants to take the whole lot. arch/arm/boot/dts/versatile-pb.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/versatile-pb.dts b/arch/arm/boot/dts/versatile-pb.dts index 33a8eb28374e..8c936a16413b 100644 --- a/arch/arm/boot/dts/versatile-pb.dts +++ b/arch/arm/boot/dts/versatile-pb.dts @@ -39,7 +39,7 @@ clock-names = "apb_pclk"; }; - pci-controller at 10001000 { + pci at 10001000 { compatible = "arm,versatile-pci"; device_type = "pci"; reg = <0x10001000 0x1000 -- 2.10.1 ^ permalink raw reply related [flat|nested] 78+ messages in thread
* [PATCH 09/15] ARM: dts: versatile: fix PCI bus dtc warnings @ 2017-03-22 2:03 ` Rob Herring 0 siblings, 0 replies; 78+ messages in thread From: Rob Herring @ 2017-03-22 2:03 UTC (permalink / raw) To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, devicetree-u79uwXL29TY76Z2rM5mHXA Cc: arm-DgEjT+Ai2ygdnm+yROfE0A, Russell King dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> Cc: Russell King <linux-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org> --- Sub-arch maintainers, please apply to your trees unless arm-soc wants to take the whole lot. arch/arm/boot/dts/versatile-pb.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/versatile-pb.dts b/arch/arm/boot/dts/versatile-pb.dts index 33a8eb28374e..8c936a16413b 100644 --- a/arch/arm/boot/dts/versatile-pb.dts +++ b/arch/arm/boot/dts/versatile-pb.dts @@ -39,7 +39,7 @@ clock-names = "apb_pclk"; }; - pci-controller@10001000 { + pci@10001000 { compatible = "arm,versatile-pci"; device_type = "pci"; reg = <0x10001000 0x1000 -- 2.10.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply related [flat|nested] 78+ messages in thread
* [PATCH 10/15] ARM: dts: bcm: fix msi-controller name and unit address [not found] ` <20170322020313.24338-1-robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> @ 2017-03-22 2:03 ` Rob Herring 2017-03-22 2:03 ` Rob Herring 2017-03-22 2:03 ` Rob Herring 2 siblings, 0 replies; 78+ messages in thread From: Rob Herring @ 2017-03-22 2:03 UTC (permalink / raw) To: linux-arm-kernel The unit address for the msi controller is not valid as there is no reg property, so remove it. Also, msi-controller is the preferred node name. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Ray Jui <rjui@broadcom.com> Cc: Scott Branden <sbranden@broadcom.com> Cc: Jon Mason <jonmason@broadcom.com> Cc: bcm-kernel-feedback-list at broadcom.com --- Sub-arch maintainers, please apply to your trees unless arm-soc wants to take the whole lot. arch/arm/boot/dts/bcm-cygnus.dtsi | 4 ++-- arch/arm/boot/dts/bcm-nsp.dtsi | 6 +++--- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi index 8833a4c3cd96..9644fddb5e3c 100644 --- a/arch/arm/boot/dts/bcm-cygnus.dtsi +++ b/arch/arm/boot/dts/bcm-cygnus.dtsi @@ -205,7 +205,7 @@ status = "disabled"; msi-parent = <&msi0>; - msi0: msi at 18012000 { + msi0: msi-controller { compatible = "brcm,iproc-msi"; msi-controller; interrupt-parent = <&gic>; @@ -240,7 +240,7 @@ status = "disabled"; msi-parent = <&msi1>; - msi1: msi at 18013000 { + msi1: msi-controller { compatible = "brcm,iproc-msi"; msi-controller; interrupt-parent = <&gic>; diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi index 832795b0fd0f..42c017df490f 100644 --- a/arch/arm/boot/dts/bcm-nsp.dtsi +++ b/arch/arm/boot/dts/bcm-nsp.dtsi @@ -450,7 +450,7 @@ status = "disabled"; msi-parent = <&msi0>; - msi0: msi at 18012000 { + msi0: msi-controller { compatible = "brcm,iproc-msi"; msi-controller; interrupt-parent = <&gic>; @@ -486,7 +486,7 @@ status = "disabled"; msi-parent = <&msi1>; - msi1: msi at 18013000 { + msi1: msi-controller { compatible = "brcm,iproc-msi"; msi-controller; interrupt-parent = <&gic>; @@ -522,7 +522,7 @@ status = "disabled"; msi-parent = <&msi2>; - msi2: msi at 18014000 { + msi2: msi-controller { compatible = "brcm,iproc-msi"; msi-controller; interrupt-parent = <&gic>; -- 2.10.1 ^ permalink raw reply related [flat|nested] 78+ messages in thread
* [PATCH 10/15] ARM: dts: bcm: fix msi-controller name and unit address @ 2017-03-22 2:03 ` Rob Herring 0 siblings, 0 replies; 78+ messages in thread From: Rob Herring @ 2017-03-22 2:03 UTC (permalink / raw) To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, devicetree-u79uwXL29TY76Z2rM5mHXA Cc: arm-DgEjT+Ai2ygdnm+yROfE0A, Ray Jui, Scott Branden, Jon Mason, bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w The unit address for the msi controller is not valid as there is no reg property, so remove it. Also, msi-controller is the preferred node name. Signed-off-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> Cc: Ray Jui <rjui-dY08KVG/lbpWk0Htik3J/w@public.gmane.org> Cc: Scott Branden <sbranden-dY08KVG/lbpWk0Htik3J/w@public.gmane.org> Cc: Jon Mason <jonmason-dY08KVG/lbpWk0Htik3J/w@public.gmane.org> Cc: bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w@public.gmane.org --- Sub-arch maintainers, please apply to your trees unless arm-soc wants to take the whole lot. arch/arm/boot/dts/bcm-cygnus.dtsi | 4 ++-- arch/arm/boot/dts/bcm-nsp.dtsi | 6 +++--- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi index 8833a4c3cd96..9644fddb5e3c 100644 --- a/arch/arm/boot/dts/bcm-cygnus.dtsi +++ b/arch/arm/boot/dts/bcm-cygnus.dtsi @@ -205,7 +205,7 @@ status = "disabled"; msi-parent = <&msi0>; - msi0: msi@18012000 { + msi0: msi-controller { compatible = "brcm,iproc-msi"; msi-controller; interrupt-parent = <&gic>; @@ -240,7 +240,7 @@ status = "disabled"; msi-parent = <&msi1>; - msi1: msi@18013000 { + msi1: msi-controller { compatible = "brcm,iproc-msi"; msi-controller; interrupt-parent = <&gic>; diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi index 832795b0fd0f..42c017df490f 100644 --- a/arch/arm/boot/dts/bcm-nsp.dtsi +++ b/arch/arm/boot/dts/bcm-nsp.dtsi @@ -450,7 +450,7 @@ status = "disabled"; msi-parent = <&msi0>; - msi0: msi@18012000 { + msi0: msi-controller { compatible = "brcm,iproc-msi"; msi-controller; interrupt-parent = <&gic>; @@ -486,7 +486,7 @@ status = "disabled"; msi-parent = <&msi1>; - msi1: msi@18013000 { + msi1: msi-controller { compatible = "brcm,iproc-msi"; msi-controller; interrupt-parent = <&gic>; @@ -522,7 +522,7 @@ status = "disabled"; msi-parent = <&msi2>; - msi2: msi@18014000 { + msi2: msi-controller { compatible = "brcm,iproc-msi"; msi-controller; interrupt-parent = <&gic>; -- 2.10.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply related [flat|nested] 78+ messages in thread
* [PATCH 10/15] ARM: dts: bcm: fix msi-controller name and unit address @ 2017-03-22 6:07 ` Ray Jui 0 siblings, 0 replies; 78+ messages in thread From: Ray Jui @ 2017-03-22 6:07 UTC (permalink / raw) To: linux-arm-kernel Hi Rob, On 3/21/2017 7:03 PM, Rob Herring wrote: > The unit address for the msi controller is not valid as there is no reg > property, so remove it. Also, msi-controller is the preferred node name. > > Signed-off-by: Rob Herring <robh@kernel.org> > Cc: Ray Jui <rjui@broadcom.com> > Cc: Scott Branden <sbranden@broadcom.com> > Cc: Jon Mason <jonmason@broadcom.com> > Cc: bcm-kernel-feedback-list at broadcom.com > --- > Sub-arch maintainers, please apply to your trees unless arm-soc wants > to take the whole lot. > > arch/arm/boot/dts/bcm-cygnus.dtsi | 4 ++-- > arch/arm/boot/dts/bcm-nsp.dtsi | 6 +++--- > 2 files changed, 5 insertions(+), 5 deletions(-) > > diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi > index 8833a4c3cd96..9644fddb5e3c 100644 > --- a/arch/arm/boot/dts/bcm-cygnus.dtsi > +++ b/arch/arm/boot/dts/bcm-cygnus.dtsi > @@ -205,7 +205,7 @@ > status = "disabled"; > > msi-parent = <&msi0>; > - msi0: msi at 18012000 { > + msi0: msi-controller { > compatible = "brcm,iproc-msi"; > msi-controller; > interrupt-parent = <&gic>; > @@ -240,7 +240,7 @@ > status = "disabled"; > > msi-parent = <&msi1>; > - msi1: msi at 18013000 { > + msi1: msi-controller { > compatible = "brcm,iproc-msi"; > msi-controller; > interrupt-parent = <&gic>; > diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi > index 832795b0fd0f..42c017df490f 100644 > --- a/arch/arm/boot/dts/bcm-nsp.dtsi > +++ b/arch/arm/boot/dts/bcm-nsp.dtsi > @@ -450,7 +450,7 @@ > status = "disabled"; > > msi-parent = <&msi0>; > - msi0: msi at 18012000 { > + msi0: msi-controller { > compatible = "brcm,iproc-msi"; > msi-controller; > interrupt-parent = <&gic>; > @@ -486,7 +486,7 @@ > status = "disabled"; > > msi-parent = <&msi1>; > - msi1: msi at 18013000 { > + msi1: msi-controller { > compatible = "brcm,iproc-msi"; > msi-controller; > interrupt-parent = <&gic>; > @@ -522,7 +522,7 @@ > status = "disabled"; > > msi-parent = <&msi2>; > - msi2: msi at 18014000 { > + msi2: msi-controller { > compatible = "brcm,iproc-msi"; > msi-controller; > interrupt-parent = <&gic>; Looks good and thanks! Acked-by: Ray Jui <ray.jui@broadcom.com> ^ permalink raw reply [flat|nested] 78+ messages in thread
* Re: [PATCH 10/15] ARM: dts: bcm: fix msi-controller name and unit address @ 2017-03-22 6:07 ` Ray Jui 0 siblings, 0 replies; 78+ messages in thread From: Ray Jui @ 2017-03-22 6:07 UTC (permalink / raw) To: Rob Herring, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, devicetree-u79uwXL29TY76Z2rM5mHXA Cc: arm-DgEjT+Ai2ygdnm+yROfE0A, Ray Jui, Scott Branden, Jon Mason, bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w Hi Rob, On 3/21/2017 7:03 PM, Rob Herring wrote: > The unit address for the msi controller is not valid as there is no reg > property, so remove it. Also, msi-controller is the preferred node name. > > Signed-off-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> > Cc: Ray Jui <rjui-dY08KVG/lbpWk0Htik3J/w@public.gmane.org> > Cc: Scott Branden <sbranden-dY08KVG/lbpWk0Htik3J/w@public.gmane.org> > Cc: Jon Mason <jonmason-dY08KVG/lbpWk0Htik3J/w@public.gmane.org> > Cc: bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w@public.gmane.org > --- > Sub-arch maintainers, please apply to your trees unless arm-soc wants > to take the whole lot. > > arch/arm/boot/dts/bcm-cygnus.dtsi | 4 ++-- > arch/arm/boot/dts/bcm-nsp.dtsi | 6 +++--- > 2 files changed, 5 insertions(+), 5 deletions(-) > > diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi > index 8833a4c3cd96..9644fddb5e3c 100644 > --- a/arch/arm/boot/dts/bcm-cygnus.dtsi > +++ b/arch/arm/boot/dts/bcm-cygnus.dtsi > @@ -205,7 +205,7 @@ > status = "disabled"; > > msi-parent = <&msi0>; > - msi0: msi@18012000 { > + msi0: msi-controller { > compatible = "brcm,iproc-msi"; > msi-controller; > interrupt-parent = <&gic>; > @@ -240,7 +240,7 @@ > status = "disabled"; > > msi-parent = <&msi1>; > - msi1: msi@18013000 { > + msi1: msi-controller { > compatible = "brcm,iproc-msi"; > msi-controller; > interrupt-parent = <&gic>; > diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi > index 832795b0fd0f..42c017df490f 100644 > --- a/arch/arm/boot/dts/bcm-nsp.dtsi > +++ b/arch/arm/boot/dts/bcm-nsp.dtsi > @@ -450,7 +450,7 @@ > status = "disabled"; > > msi-parent = <&msi0>; > - msi0: msi@18012000 { > + msi0: msi-controller { > compatible = "brcm,iproc-msi"; > msi-controller; > interrupt-parent = <&gic>; > @@ -486,7 +486,7 @@ > status = "disabled"; > > msi-parent = <&msi1>; > - msi1: msi@18013000 { > + msi1: msi-controller { > compatible = "brcm,iproc-msi"; > msi-controller; > interrupt-parent = <&gic>; > @@ -522,7 +522,7 @@ > status = "disabled"; > > msi-parent = <&msi2>; > - msi2: msi@18014000 { > + msi2: msi-controller { > compatible = "brcm,iproc-msi"; > msi-controller; > interrupt-parent = <&gic>; Looks good and thanks! Acked-by: Ray Jui <ray.jui-dY08KVG/lbpWk0Htik3J/w@public.gmane.org> -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH 10/15] ARM: dts: bcm: fix msi-controller name and unit address @ 2017-03-22 17:16 ` Florian Fainelli 0 siblings, 0 replies; 78+ messages in thread From: Florian Fainelli @ 2017-03-22 17:16 UTC (permalink / raw) To: linux-arm-kernel On 03/21/2017 07:03 PM, Rob Herring wrote: > The unit address for the msi controller is not valid as there is no reg > property, so remove it. Also, msi-controller is the preferred node name. > > Signed-off-by: Rob Herring <robh@kernel.org> > Cc: Ray Jui <rjui@broadcom.com> > Cc: Scott Branden <sbranden@broadcom.com> > Cc: Jon Mason <jonmason@broadcom.com> > Cc: bcm-kernel-feedback-list at broadcom.com > --- > Sub-arch maintainers, please apply to your trees unless arm-soc wants > to take the whole lot. Applied, thanks Rob. -- Florian ^ permalink raw reply [flat|nested] 78+ messages in thread
* Re: [PATCH 10/15] ARM: dts: bcm: fix msi-controller name and unit address @ 2017-03-22 17:16 ` Florian Fainelli 0 siblings, 0 replies; 78+ messages in thread From: Florian Fainelli @ 2017-03-22 17:16 UTC (permalink / raw) To: Rob Herring, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, devicetree-u79uwXL29TY76Z2rM5mHXA Cc: arm-DgEjT+Ai2ygdnm+yROfE0A, Ray Jui, Scott Branden, Jon Mason, bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w On 03/21/2017 07:03 PM, Rob Herring wrote: > The unit address for the msi controller is not valid as there is no reg > property, so remove it. Also, msi-controller is the preferred node name. > > Signed-off-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> > Cc: Ray Jui <rjui-dY08KVG/lbpWk0Htik3J/w@public.gmane.org> > Cc: Scott Branden <sbranden-dY08KVG/lbpWk0Htik3J/w@public.gmane.org> > Cc: Jon Mason <jonmason-dY08KVG/lbpWk0Htik3J/w@public.gmane.org> > Cc: bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w@public.gmane.org > --- > Sub-arch maintainers, please apply to your trees unless arm-soc wants > to take the whole lot. Applied, thanks Rob. -- Florian -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH 12/15] arm64: dts: apm: fix PCI bus dtc warnings [not found] ` <20170322020313.24338-1-robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> @ 2017-03-22 2:03 ` Rob Herring 2017-03-22 2:03 ` Rob Herring 2017-03-22 2:03 ` Rob Herring 2 siblings, 0 replies; 78+ messages in thread From: Rob Herring @ 2017-03-22 2:03 UTC (permalink / raw) To: linux-arm-kernel dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Duc Dang <dhdang@apm.com> --- Sub-arch maintainers, please apply to your trees unless arm-soc wants to take the whole lot. arch/arm64/boot/dts/apm/apm-shadowcat.dtsi | 2 ++ arch/arm64/boot/dts/apm/apm-storm.dtsi | 5 +++++ 2 files changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi b/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi index 72720e9132a1..c9ffffb96e43 100644 --- a/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi +++ b/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi @@ -626,6 +626,7 @@ 0x43000000 0xe0 0x00000000 0xe0 0x00000000 0x20 0x00000000>; /* mem */ dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000 0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0x0 0x0 0x0 0x7>; interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0x0 0x0 0x10 0x4 0x0 0x0 0x0 0x2 &gic 0x0 0x0 0x0 0x11 0x4 @@ -651,6 +652,7 @@ 0x43000000 0xb0 0x00000000 0xb0 0x00000000 0x10 0x00000000>; /* mem */ dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000 0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0x0 0x0 0x0 0x7>; interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0x0 0x0 0x16 0x4 0x0 0x0 0x0 0x2 &gic 0x0 0x0 0x0 0x17 0x4 diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi b/arch/arm64/boot/dts/apm/apm-storm.dtsi index 63be8e51eaa8..c09a36fed917 100644 --- a/arch/arm64/boot/dts/apm/apm-storm.dtsi +++ b/arch/arm64/boot/dts/apm/apm-storm.dtsi @@ -626,6 +626,7 @@ 0x43000000 0xf0 0x00000000 0xf0 0x00000000 0x10 0x00000000>; /* mem */ dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000 0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0x0 0x0 0x0 0x7>; interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xc2 0x4 0x0 0x0 0x0 0x2 &gic 0x0 0xc3 0x4 @@ -651,6 +652,7 @@ 0x43000000 0xd8 0x00000000 0xd8 0x00000000 0x08 0x00000000>; /* mem */ dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000 0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0x0 0x0 0x0 0x7>; interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xc8 0x4 0x0 0x0 0x0 0x2 &gic 0x0 0xc9 0x4 @@ -676,6 +678,7 @@ 0x43000000 0x94 0x00000000 0x94 0x00000000 0x04 0x00000000>; /* mem */ dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000 0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0x0 0x0 0x0 0x7>; interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xce 0x4 0x0 0x0 0x0 0x2 &gic 0x0 0xcf 0x4 @@ -701,6 +704,7 @@ 0x43000000 0xb0 0x00000000 0xb0 0x00000000 0x10 0x00000000>; /* mem */ dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000 0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0x0 0x0 0x0 0x7>; interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xd4 0x4 0x0 0x0 0x0 0x2 &gic 0x0 0xd5 0x4 @@ -726,6 +730,7 @@ 0x43000000 0xc8 0x00000000 0xc8 0x00000000 0x08 0x00000000>; /* mem */ dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000 0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0x0 0x0 0x0 0x7>; interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xda 0x4 0x0 0x0 0x0 0x2 &gic 0x0 0xdb 0x4 -- 2.10.1 ^ permalink raw reply related [flat|nested] 78+ messages in thread
* [PATCH 12/15] arm64: dts: apm: fix PCI bus dtc warnings @ 2017-03-22 2:03 ` Rob Herring 0 siblings, 0 replies; 78+ messages in thread From: Rob Herring @ 2017-03-22 2:03 UTC (permalink / raw) To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, devicetree-u79uwXL29TY76Z2rM5mHXA Cc: arm-DgEjT+Ai2ygdnm+yROfE0A, Duc Dang dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> Cc: Duc Dang <dhdang-qTEPVZfXA3Y@public.gmane.org> --- Sub-arch maintainers, please apply to your trees unless arm-soc wants to take the whole lot. arch/arm64/boot/dts/apm/apm-shadowcat.dtsi | 2 ++ arch/arm64/boot/dts/apm/apm-storm.dtsi | 5 +++++ 2 files changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi b/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi index 72720e9132a1..c9ffffb96e43 100644 --- a/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi +++ b/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi @@ -626,6 +626,7 @@ 0x43000000 0xe0 0x00000000 0xe0 0x00000000 0x20 0x00000000>; /* mem */ dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000 0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0x0 0x0 0x0 0x7>; interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0x0 0x0 0x10 0x4 0x0 0x0 0x0 0x2 &gic 0x0 0x0 0x0 0x11 0x4 @@ -651,6 +652,7 @@ 0x43000000 0xb0 0x00000000 0xb0 0x00000000 0x10 0x00000000>; /* mem */ dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000 0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0x0 0x0 0x0 0x7>; interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0x0 0x0 0x16 0x4 0x0 0x0 0x0 0x2 &gic 0x0 0x0 0x0 0x17 0x4 diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi b/arch/arm64/boot/dts/apm/apm-storm.dtsi index 63be8e51eaa8..c09a36fed917 100644 --- a/arch/arm64/boot/dts/apm/apm-storm.dtsi +++ b/arch/arm64/boot/dts/apm/apm-storm.dtsi @@ -626,6 +626,7 @@ 0x43000000 0xf0 0x00000000 0xf0 0x00000000 0x10 0x00000000>; /* mem */ dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000 0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0x0 0x0 0x0 0x7>; interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xc2 0x4 0x0 0x0 0x0 0x2 &gic 0x0 0xc3 0x4 @@ -651,6 +652,7 @@ 0x43000000 0xd8 0x00000000 0xd8 0x00000000 0x08 0x00000000>; /* mem */ dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000 0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0x0 0x0 0x0 0x7>; interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xc8 0x4 0x0 0x0 0x0 0x2 &gic 0x0 0xc9 0x4 @@ -676,6 +678,7 @@ 0x43000000 0x94 0x00000000 0x94 0x00000000 0x04 0x00000000>; /* mem */ dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000 0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0x0 0x0 0x0 0x7>; interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xce 0x4 0x0 0x0 0x0 0x2 &gic 0x0 0xcf 0x4 @@ -701,6 +704,7 @@ 0x43000000 0xb0 0x00000000 0xb0 0x00000000 0x10 0x00000000>; /* mem */ dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000 0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0x0 0x0 0x0 0x7>; interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xd4 0x4 0x0 0x0 0x0 0x2 &gic 0x0 0xd5 0x4 @@ -726,6 +730,7 @@ 0x43000000 0xc8 0x00000000 0xc8 0x00000000 0x08 0x00000000>; /* mem */ dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000 0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0x0 0x0 0x0 0x7>; interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xda 0x4 0x0 0x0 0x0 0x2 &gic 0x0 0xdb 0x4 -- 2.10.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply related [flat|nested] 78+ messages in thread
* [PATCH 13/15] arm64: dts: juno: fix PCI bus dtc warnings [not found] ` <20170322020313.24338-1-robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> @ 2017-03-22 2:03 ` Rob Herring 2017-03-22 2:03 ` Rob Herring 2017-03-22 2:03 ` Rob Herring 2 siblings, 0 replies; 78+ messages in thread From: Rob Herring @ 2017-03-22 2:03 UTC (permalink / raw) To: linux-arm-kernel dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> --- arch/arm64/boot/dts/arm/juno-base.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi index df539e865b90..8ffaff2043d0 100644 --- a/arch/arm64/boot/dts/arm/juno-base.dtsi +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi @@ -428,7 +428,7 @@ }; }; - pcie_ctlr: pcie-controller at 40000000 { + pcie_ctlr: pcie at 40000000 { compatible = "arm,juno-r1-pcie", "plda,xpressrich3-axi", "pci-host-ecam-generic"; device_type = "pci"; reg = <0 0x40000000 0 0x10000000>; /* ECAM config space */ -- 2.10.1 ^ permalink raw reply related [flat|nested] 78+ messages in thread
* [PATCH 13/15] arm64: dts: juno: fix PCI bus dtc warnings @ 2017-03-22 2:03 ` Rob Herring 0 siblings, 0 replies; 78+ messages in thread From: Rob Herring @ 2017-03-22 2:03 UTC (permalink / raw) To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, devicetree-u79uwXL29TY76Z2rM5mHXA Cc: arm-DgEjT+Ai2ygdnm+yROfE0A, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> Cc: Liviu Dudau <liviu.dudau-5wv7dgnIgG8@public.gmane.org> Cc: Sudeep Holla <sudeep.holla-5wv7dgnIgG8@public.gmane.org> Cc: Lorenzo Pieralisi <lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org> --- arch/arm64/boot/dts/arm/juno-base.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi index df539e865b90..8ffaff2043d0 100644 --- a/arch/arm64/boot/dts/arm/juno-base.dtsi +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi @@ -428,7 +428,7 @@ }; }; - pcie_ctlr: pcie-controller@40000000 { + pcie_ctlr: pcie@40000000 { compatible = "arm,juno-r1-pcie", "plda,xpressrich3-axi", "pci-host-ecam-generic"; device_type = "pci"; reg = <0 0x40000000 0 0x10000000>; /* ECAM config space */ -- 2.10.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply related [flat|nested] 78+ messages in thread
* [PATCH 13/15] arm64: dts: juno: fix PCI bus dtc warnings @ 2017-03-22 11:56 ` Liviu Dudau 0 siblings, 0 replies; 78+ messages in thread From: Liviu Dudau @ 2017-03-22 11:56 UTC (permalink / raw) To: linux-arm-kernel Hi Rob, On Tue, Mar 21, 2017 at 09:03:11PM -0500, Rob Herring wrote: > dtc recently added PCI bus checks. Fix these warnings. Was not aware of the warnings and the commit message doesn't quote them, but the change looks trivial. So: Acked-by: Liviu Dudau <liviu.dudau@arm.com> Thanks for fixing this! Liviu > > Signed-off-by: Rob Herring <robh@kernel.org> > Cc: Liviu Dudau <liviu.dudau@arm.com> > Cc: Sudeep Holla <sudeep.holla@arm.com> > Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> > --- > > arch/arm64/boot/dts/arm/juno-base.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi > index df539e865b90..8ffaff2043d0 100644 > --- a/arch/arm64/boot/dts/arm/juno-base.dtsi > +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi > @@ -428,7 +428,7 @@ > }; > }; > > - pcie_ctlr: pcie-controller at 40000000 { > + pcie_ctlr: pcie at 40000000 { > compatible = "arm,juno-r1-pcie", "plda,xpressrich3-axi", "pci-host-ecam-generic"; > device_type = "pci"; > reg = <0 0x40000000 0 0x10000000>; /* ECAM config space */ > -- > 2.10.1 > -- ==================== | I would like to | | fix the world, | | but they're not | | giving me the | \ source code! / --------------- ?\_(?)_/? ^ permalink raw reply [flat|nested] 78+ messages in thread
* Re: [PATCH 13/15] arm64: dts: juno: fix PCI bus dtc warnings @ 2017-03-22 11:56 ` Liviu Dudau 0 siblings, 0 replies; 78+ messages in thread From: Liviu Dudau @ 2017-03-22 11:56 UTC (permalink / raw) To: Rob Herring Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, devicetree-u79uwXL29TY76Z2rM5mHXA, arm-DgEjT+Ai2ygdnm+yROfE0A, Sudeep Holla, Lorenzo Pieralisi Hi Rob, On Tue, Mar 21, 2017 at 09:03:11PM -0500, Rob Herring wrote: > dtc recently added PCI bus checks. Fix these warnings. Was not aware of the warnings and the commit message doesn't quote them, but the change looks trivial. So: Acked-by: Liviu Dudau <liviu.dudau-5wv7dgnIgG8@public.gmane.org> Thanks for fixing this! Liviu > > Signed-off-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> > Cc: Liviu Dudau <liviu.dudau-5wv7dgnIgG8@public.gmane.org> > Cc: Sudeep Holla <sudeep.holla-5wv7dgnIgG8@public.gmane.org> > Cc: Lorenzo Pieralisi <lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org> > --- > > arch/arm64/boot/dts/arm/juno-base.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi > index df539e865b90..8ffaff2043d0 100644 > --- a/arch/arm64/boot/dts/arm/juno-base.dtsi > +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi > @@ -428,7 +428,7 @@ > }; > }; > > - pcie_ctlr: pcie-controller@40000000 { > + pcie_ctlr: pcie@40000000 { > compatible = "arm,juno-r1-pcie", "plda,xpressrich3-axi", "pci-host-ecam-generic"; > device_type = "pci"; > reg = <0 0x40000000 0 0x10000000>; /* ECAM config space */ > -- > 2.10.1 > -- ==================== | I would like to | | fix the world, | | but they're not | | giving me the | \ source code! / --------------- ¯\_(ツ)_/¯ -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH 14/15] arm64: dts: broadcom: fix PCI bus dtc warnings [not found] ` <20170322020313.24338-1-robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> @ 2017-03-22 2:03 ` Rob Herring 2017-03-22 2:03 ` Rob Herring 2017-03-22 2:03 ` Rob Herring 2 siblings, 0 replies; 78+ messages in thread From: Rob Herring @ 2017-03-22 2:03 UTC (permalink / raw) To: linux-arm-kernel dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh@kernel.org> Cc: "Jayachandran C." <c.jayachandran@gmail.com> Cc: bcm-kernel-feedback-list at broadcom.com --- Sub-arch maintainers, please apply to your trees unless arm-soc wants to take the whole lot. arch/arm64/boot/dts/broadcom/vulcan.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/broadcom/vulcan.dtsi b/arch/arm64/boot/dts/broadcom/vulcan.dtsi index 34e11a9db2a0..71fea7fdc68d 100644 --- a/arch/arm64/boot/dts/broadcom/vulcan.dtsi +++ b/arch/arm64/boot/dts/broadcom/vulcan.dtsi @@ -117,6 +117,7 @@ ranges = <0x02000000 0 0x40000000 0 0x40000000 0 0x20000000 0x43000000 0x40 0x00000000 0x40 0x00000000 0x20 0x00000000>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 7>; interrupt-map = /* addr pin ic icaddr icintr */ -- 2.10.1 ^ permalink raw reply related [flat|nested] 78+ messages in thread
* [PATCH 14/15] arm64: dts: broadcom: fix PCI bus dtc warnings @ 2017-03-22 2:03 ` Rob Herring 0 siblings, 0 replies; 78+ messages in thread From: Rob Herring @ 2017-03-22 2:03 UTC (permalink / raw) To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, devicetree-u79uwXL29TY76Z2rM5mHXA Cc: arm-DgEjT+Ai2ygdnm+yROfE0A, Jayachandran C., bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> Cc: "Jayachandran C." <c.jayachandran-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Cc: bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w@public.gmane.org --- Sub-arch maintainers, please apply to your trees unless arm-soc wants to take the whole lot. arch/arm64/boot/dts/broadcom/vulcan.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/broadcom/vulcan.dtsi b/arch/arm64/boot/dts/broadcom/vulcan.dtsi index 34e11a9db2a0..71fea7fdc68d 100644 --- a/arch/arm64/boot/dts/broadcom/vulcan.dtsi +++ b/arch/arm64/boot/dts/broadcom/vulcan.dtsi @@ -117,6 +117,7 @@ ranges = <0x02000000 0 0x40000000 0 0x40000000 0 0x20000000 0x43000000 0x40 0x00000000 0x40 0x00000000 0x20 0x00000000>; + bus-range = <0x00 0xff>; interrupt-map-mask = <0 0 0 7>; interrupt-map = /* addr pin ic icaddr icintr */ -- 2.10.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply related [flat|nested] 78+ messages in thread
* [PATCH 14/15] arm64: dts: broadcom: fix PCI bus dtc warnings 2017-03-22 2:03 ` Rob Herring @ 2017-03-22 5:36 ` Jayachandran C. -1 siblings, 0 replies; 78+ messages in thread From: Jayachandran C. @ 2017-03-22 5:36 UTC (permalink / raw) To: linux-arm-kernel Hi Rob, On Wed, Mar 22, 2017 at 7:33 AM, Rob Herring <robh@kernel.org> wrote: > dtc recently added PCI bus checks. Fix these warnings. > > Signed-off-by: Rob Herring <robh@kernel.org> > Cc: "Jayachandran C." <c.jayachandran@gmail.com> > Cc: bcm-kernel-feedback-list at broadcom.com > --- > Sub-arch maintainers, please apply to your trees unless arm-soc wants > to take the whole lot. > > arch/arm64/boot/dts/broadcom/vulcan.dtsi | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm64/boot/dts/broadcom/vulcan.dtsi b/arch/arm64/boot/dts/broadcom/vulcan.dtsi > index 34e11a9db2a0..71fea7fdc68d 100644 > --- a/arch/arm64/boot/dts/broadcom/vulcan.dtsi > +++ b/arch/arm64/boot/dts/broadcom/vulcan.dtsi > @@ -117,6 +117,7 @@ > ranges = > <0x02000000 0 0x40000000 0 0x40000000 0 0x20000000 > 0x43000000 0x40 0x00000000 0x40 0x00000000 0x20 0x00000000>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 7>; > interrupt-map = > /* addr pin ic icaddr icintr */ There is a patch posted to move this from broadcom/vulcan.dtsi to cavium/thunder2-99xx.dtsi https://www.spinics.net/lists/arm-kernel/msg568464.html That might go in thru the arm-soc tree, and there might be a conflict here. JC. ^ permalink raw reply [flat|nested] 78+ messages in thread
* Re: [PATCH 14/15] arm64: dts: broadcom: fix PCI bus dtc warnings @ 2017-03-22 5:36 ` Jayachandran C. 0 siblings, 0 replies; 78+ messages in thread From: Jayachandran C. @ 2017-03-22 5:36 UTC (permalink / raw) To: Rob Herring; +Cc: devicetree, arm, bcm-kernel-feedback-list, linux-arm-kernel Hi Rob, On Wed, Mar 22, 2017 at 7:33 AM, Rob Herring <robh@kernel.org> wrote: > dtc recently added PCI bus checks. Fix these warnings. > > Signed-off-by: Rob Herring <robh@kernel.org> > Cc: "Jayachandran C." <c.jayachandran@gmail.com> > Cc: bcm-kernel-feedback-list@broadcom.com > --- > Sub-arch maintainers, please apply to your trees unless arm-soc wants > to take the whole lot. > > arch/arm64/boot/dts/broadcom/vulcan.dtsi | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm64/boot/dts/broadcom/vulcan.dtsi b/arch/arm64/boot/dts/broadcom/vulcan.dtsi > index 34e11a9db2a0..71fea7fdc68d 100644 > --- a/arch/arm64/boot/dts/broadcom/vulcan.dtsi > +++ b/arch/arm64/boot/dts/broadcom/vulcan.dtsi > @@ -117,6 +117,7 @@ > ranges = > <0x02000000 0 0x40000000 0 0x40000000 0 0x20000000 > 0x43000000 0x40 0x00000000 0x40 0x00000000 0x20 0x00000000>; > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0 0 0 7>; > interrupt-map = > /* addr pin ic icaddr icintr */ There is a patch posted to move this from broadcom/vulcan.dtsi to cavium/thunder2-99xx.dtsi https://www.spinics.net/lists/arm-kernel/msg568464.html That might go in thru the arm-soc tree, and there might be a conflict here. JC. ^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH 15/15] arm64: dts: xilinx: fix PCI bus dtc warnings [not found] ` <20170322020313.24338-1-robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> @ 2017-03-22 2:03 ` Rob Herring 2017-03-22 2:03 ` Rob Herring 2017-03-22 2:03 ` Rob Herring 2 siblings, 0 replies; 78+ messages in thread From: Rob Herring @ 2017-03-22 2:03 UTC (permalink / raw) To: linux-arm-kernel dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: "S?ren Brinkmann" <soren.brinkmann@xilinx.com> --- Sub-arch maintainers, please apply to your trees unless arm-soc wants to take the whole lot. arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index 54dc28351c8c..1a3f5e928bb9 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -221,6 +221,7 @@ 0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>; /* prefetchable memory */ + bus-range = <0x00 0xff>; interrupt-map-mask = <0x0 0x0 0x0 0x7>; interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>, <0x0 0x0 0x0 0x2 &pcie_intc 0x2>, -- 2.10.1 ^ permalink raw reply related [flat|nested] 78+ messages in thread
* [PATCH 15/15] arm64: dts: xilinx: fix PCI bus dtc warnings @ 2017-03-22 2:03 ` Rob Herring 0 siblings, 0 replies; 78+ messages in thread From: Rob Herring @ 2017-03-22 2:03 UTC (permalink / raw) To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, devicetree-u79uwXL29TY76Z2rM5mHXA Cc: arm-DgEjT+Ai2ygdnm+yROfE0A, Michal Simek, Sören Brinkmann dtc recently added PCI bus checks. Fix these warnings. Signed-off-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> Cc: Michal Simek <michal.simek-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org> Cc: "Sören Brinkmann" <soren.brinkmann-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org> --- Sub-arch maintainers, please apply to your trees unless arm-soc wants to take the whole lot. arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index 54dc28351c8c..1a3f5e928bb9 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -221,6 +221,7 @@ 0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>; /* prefetchable memory */ + bus-range = <0x00 0xff>; interrupt-map-mask = <0x0 0x0 0x0 0x7>; interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>, <0x0 0x0 0x0 0x2 &pcie_intc 0x2>, -- 2.10.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply related [flat|nested] 78+ messages in thread
* [PATCH 15/15] arm64: dts: xilinx: fix PCI bus dtc warnings @ 2017-03-23 14:35 ` Michal Simek 0 siblings, 0 replies; 78+ messages in thread From: Michal Simek @ 2017-03-23 14:35 UTC (permalink / raw) To: linux-arm-kernel On 22.3.2017 03:03, Rob Herring wrote: > dtc recently added PCI bus checks. Fix these warnings. > > Signed-off-by: Rob Herring <robh@kernel.org> > Cc: Michal Simek <michal.simek@xilinx.com> > Cc: "S?ren Brinkmann" <soren.brinkmann@xilinx.com> > --- > Sub-arch maintainers, please apply to your trees unless arm-soc wants > to take the whole lot. > > arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi > index 54dc28351c8c..1a3f5e928bb9 100644 > --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi > +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi > @@ -221,6 +221,7 @@ > 0x43000000 0x00000006 0x00000000 0x00000006 > 0x00000000 0x00000002 0x00000000>; > /* prefetchable memory */ > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0x0 0x0 0x0 0x7>; > interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>, > <0x0 0x0 0x0 0x2 &pcie_intc 0x2>, > Applied to zynqmp/dt branch. Thanks, Michal ^ permalink raw reply [flat|nested] 78+ messages in thread
* Re: [PATCH 15/15] arm64: dts: xilinx: fix PCI bus dtc warnings @ 2017-03-23 14:35 ` Michal Simek 0 siblings, 0 replies; 78+ messages in thread From: Michal Simek @ 2017-03-23 14:35 UTC (permalink / raw) To: Rob Herring, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, devicetree-u79uwXL29TY76Z2rM5mHXA Cc: arm-DgEjT+Ai2ygdnm+yROfE0A, Michal Simek, Sören Brinkmann On 22.3.2017 03:03, Rob Herring wrote: > dtc recently added PCI bus checks. Fix these warnings. > > Signed-off-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> > Cc: Michal Simek <michal.simek-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org> > Cc: "Sören Brinkmann" <soren.brinkmann-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org> > --- > Sub-arch maintainers, please apply to your trees unless arm-soc wants > to take the whole lot. > > arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi > index 54dc28351c8c..1a3f5e928bb9 100644 > --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi > +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi > @@ -221,6 +221,7 @@ > 0x43000000 0x00000006 0x00000000 0x00000006 > 0x00000000 0x00000002 0x00000000>; > /* prefetchable memory */ > + bus-range = <0x00 0xff>; > interrupt-map-mask = <0x0 0x0 0x0 0x7>; > interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>, > <0x0 0x0 0x0 0x2 &pcie_intc 0x2>, > Applied to zynqmp/dt branch. Thanks, Michal -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH 01/15] ARM: dts: alpine: fix PCIe node name 2017-03-22 2:02 ` Rob Herring @ 2017-03-22 8:01 ` Antoine Tenart -1 siblings, 0 replies; 78+ messages in thread From: Antoine Tenart @ 2017-03-22 8:01 UTC (permalink / raw) To: linux-arm-kernel Hi Rob, On Tue, Mar 21, 2017 at 09:02:59PM -0500, Rob Herring wrote: > PCIe bridges should have a node name of 'pcie'. > > Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com> This can go through arm-soc directly. If not I'll take it. Thanks! Antoine > Cc: Tsahee Zidenberg <tsahee@annapurnalabs.com> > Cc: Antoine Tenart <antoine.tenart@free-electrons.com> > --- > Sub-arch maintainers, please apply to your trees unless arm-soc wants > to take the whole lot. > > arch/arm/boot/dts/alpine.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/boot/dts/alpine.dtsi b/arch/arm/boot/dts/alpine.dtsi > index d0eefc3b886c..f09f9c8e178a 100644 > --- a/arch/arm/boot/dts/alpine.dtsi > +++ b/arch/arm/boot/dts/alpine.dtsi > @@ -139,7 +139,7 @@ > }; > > /* Internal PCIe Controller */ > - pcie-internal at 0xfbc00000 { > + pcie at fbc00000 { > compatible = "pci-host-ecam-generic"; > device_type = "pci"; > #size-cells = <2>; > -- > 2.10.1 > -- Antoine T?nart, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 801 bytes Desc: not available URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20170322/01ad26da/attachment.sig> ^ permalink raw reply [flat|nested] 78+ messages in thread
* Re: [PATCH 01/15] ARM: dts: alpine: fix PCIe node name @ 2017-03-22 8:01 ` Antoine Tenart 0 siblings, 0 replies; 78+ messages in thread From: Antoine Tenart @ 2017-03-22 8:01 UTC (permalink / raw) To: Rob Herring Cc: devicetree, Antoine Tenart, arm, linux-arm-kernel, Tsahee Zidenberg [-- Attachment #1.1: Type: text/plain, Size: 1192 bytes --] Hi Rob, On Tue, Mar 21, 2017 at 09:02:59PM -0500, Rob Herring wrote: > PCIe bridges should have a node name of 'pcie'. > > Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com> This can go through arm-soc directly. If not I'll take it. Thanks! Antoine > Cc: Tsahee Zidenberg <tsahee@annapurnalabs.com> > Cc: Antoine Tenart <antoine.tenart@free-electrons.com> > --- > Sub-arch maintainers, please apply to your trees unless arm-soc wants > to take the whole lot. > > arch/arm/boot/dts/alpine.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/boot/dts/alpine.dtsi b/arch/arm/boot/dts/alpine.dtsi > index d0eefc3b886c..f09f9c8e178a 100644 > --- a/arch/arm/boot/dts/alpine.dtsi > +++ b/arch/arm/boot/dts/alpine.dtsi > @@ -139,7 +139,7 @@ > }; > > /* Internal PCIe Controller */ > - pcie-internal@0xfbc00000 { > + pcie@fbc00000 { > compatible = "pci-host-ecam-generic"; > device_type = "pci"; > #size-cells = <2>; > -- > 2.10.1 > -- Antoine Ténart, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com [-- Attachment #1.2: signature.asc --] [-- Type: application/pgp-signature, Size: 801 bytes --] [-- Attachment #2: Type: text/plain, Size: 176 bytes --] _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH 01/15] ARM: dts: alpine: fix PCIe node name 2017-03-22 8:01 ` Antoine Tenart @ 2017-03-24 17:00 ` Arnd Bergmann -1 siblings, 0 replies; 78+ messages in thread From: Arnd Bergmann @ 2017-03-24 17:00 UTC (permalink / raw) To: linux-arm-kernel On Wed, Mar 22, 2017 at 9:01 AM, Antoine Tenart <antoine.tenart@free-electrons.com> wrote: > Hi Rob, > > On Tue, Mar 21, 2017 at 09:02:59PM -0500, Rob Herring wrote: >> PCIe bridges should have a node name of 'pcie'. >> >> Signed-off-by: Rob Herring <robh@kernel.org> > > Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com> > > This can go through arm-soc directly. If not I'll take it. > Thanks! I have a mild preference for this kind of patch to get picked up by platform maintainers. Rob, once replies stop coming in, please send a pull request for anything that did not get picked up by anyone else. Arnd ^ permalink raw reply [flat|nested] 78+ messages in thread
* Re: [PATCH 01/15] ARM: dts: alpine: fix PCIe node name @ 2017-03-24 17:00 ` Arnd Bergmann 0 siblings, 0 replies; 78+ messages in thread From: Arnd Bergmann @ 2017-03-24 17:00 UTC (permalink / raw) To: Antoine Tenart Cc: Rob Herring, devicetree-u79uwXL29TY76Z2rM5mHXA, arm-soc, Linux ARM, Tsahee Zidenberg On Wed, Mar 22, 2017 at 9:01 AM, Antoine Tenart <antoine.tenart-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote: > Hi Rob, > > On Tue, Mar 21, 2017 at 09:02:59PM -0500, Rob Herring wrote: >> PCIe bridges should have a node name of 'pcie'. >> >> Signed-off-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> > > Acked-by: Antoine Tenart <antoine.tenart-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> > > This can go through arm-soc directly. If not I'll take it. > Thanks! I have a mild preference for this kind of patch to get picked up by platform maintainers. Rob, once replies stop coming in, please send a pull request for anything that did not get picked up by anyone else. Arnd -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 78+ messages in thread
* [PATCH 01/15] ARM: dts: alpine: fix PCIe node name @ 2017-03-24 18:25 ` Antoine Tenart 0 siblings, 0 replies; 78+ messages in thread From: Antoine Tenart @ 2017-03-24 18:25 UTC (permalink / raw) To: linux-arm-kernel Hi Arnd, On Fri, Mar 24, 2017 at 06:00:30PM +0100, Arnd Bergmann wrote: > On Wed, Mar 22, 2017 at 9:01 AM, Antoine Tenart > <antoine.tenart@free-electrons.com> wrote: > > On Tue, Mar 21, 2017 at 09:02:59PM -0500, Rob Herring wrote: > >> PCIe bridges should have a node name of 'pcie'. > >> > >> Signed-off-by: Rob Herring <robh@kernel.org> > > > > Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com> > > > > This can go through arm-soc directly. If not I'll take it. > > Thanks! > > I have a mild preference for this kind of patch to get picked up by > platform maintainers. Sure. Applied to alpine/dt. Thanks! Antoine -- Antoine T?nart, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 801 bytes Desc: not available URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20170324/0e5f665a/attachment.sig> ^ permalink raw reply [flat|nested] 78+ messages in thread
* Re: [PATCH 01/15] ARM: dts: alpine: fix PCIe node name @ 2017-03-24 18:25 ` Antoine Tenart 0 siblings, 0 replies; 78+ messages in thread From: Antoine Tenart @ 2017-03-24 18:25 UTC (permalink / raw) To: Arnd Bergmann Cc: Antoine Tenart, Rob Herring, devicetree-u79uwXL29TY76Z2rM5mHXA, arm-soc, Linux ARM, Tsahee Zidenberg [-- Attachment #1: Type: text/plain, Size: 850 bytes --] Hi Arnd, On Fri, Mar 24, 2017 at 06:00:30PM +0100, Arnd Bergmann wrote: > On Wed, Mar 22, 2017 at 9:01 AM, Antoine Tenart > <antoine.tenart-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote: > > On Tue, Mar 21, 2017 at 09:02:59PM -0500, Rob Herring wrote: > >> PCIe bridges should have a node name of 'pcie'. > >> > >> Signed-off-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> > > > > Acked-by: Antoine Tenart <antoine.tenart-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> > > > > This can go through arm-soc directly. If not I'll take it. > > Thanks! > > I have a mild preference for this kind of patch to get picked up by > platform maintainers. Sure. Applied to alpine/dt. Thanks! Antoine -- Antoine Ténart, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 801 bytes --] ^ permalink raw reply [flat|nested] 78+ messages in thread
end of thread, other threads:[~2017-06-13 14:52 UTC | newest]
Thread overview: 78+ messages (download: mbox.gz follow: Atom feed
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2017-03-22 2:02 [PATCH 01/15] ARM: dts: alpine: fix PCIe node name Rob Herring
2017-03-22 2:02 ` Rob Herring
2017-03-22 2:03 ` [PATCH 02/15] ARM: dts: marvell: fix PCI bus dtc warnings Rob Herring
2017-03-22 2:03 ` Rob Herring
2017-03-24 14:17 ` Gregory CLEMENT
2017-03-24 14:17 ` Gregory CLEMENT
[not found] ` <20170322020313.24338-1-robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
2017-03-22 2:03 ` [PATCH 03/15] ARM: dts: ti: " Rob Herring
2017-03-22 2:03 ` Rob Herring
2017-03-22 2:03 ` [PATCH 08/15] ARM: dts: tegra: " Rob Herring
2017-03-22 2:03 ` Rob Herring
[not found] ` <20170322020313.24338-8-robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
2017-06-13 14:51 ` Thierry Reding
2017-06-13 14:51 ` Thierry Reding
2017-03-22 2:03 ` [PATCH 11/15] arm64: dts: nvidia: " Rob Herring
2017-03-22 2:03 ` Rob Herring
[not found] ` <20170322020313.24338-11-robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
2017-06-13 14:52 ` Thierry Reding
2017-06-13 14:52 ` Thierry Reding
2017-03-22 2:03 ` [PATCH 04/15] ARM: dts: exynos: " Rob Herring
2017-03-22 2:03 ` Rob Herring
2017-03-23 19:37 ` Krzysztof Kozlowski
2017-03-23 19:37 ` Krzysztof Kozlowski
2017-03-22 2:03 ` [PATCH 05/15] ARM: dts: imx: " Rob Herring
2017-03-22 2:03 ` Rob Herring
2017-03-22 8:19 ` Shawn Guo
2017-03-22 8:19 ` Shawn Guo
2017-03-22 13:53 ` Rob Herring
2017-03-22 13:53 ` Rob Herring
2017-03-24 1:28 ` Shawn Guo
2017-03-24 1:28 ` Shawn Guo
2017-03-22 2:03 ` [PATCH 06/15] ARM: dts: r8a779x: " Rob Herring
2017-03-22 2:03 ` Rob Herring
2017-03-22 2:03 ` Rob Herring
2017-03-22 8:58 ` Geert Uytterhoeven
2017-03-22 8:58 ` Geert Uytterhoeven
2017-03-22 8:58 ` Geert Uytterhoeven
2017-03-22 13:47 ` Rob Herring
2017-03-22 13:47 ` Rob Herring
2017-03-22 13:47 ` Rob Herring
2017-03-22 14:06 ` Geert Uytterhoeven
2017-03-22 14:06 ` Geert Uytterhoeven
2017-03-22 14:06 ` Geert Uytterhoeven
2017-03-24 7:06 ` Simon Horman
2017-03-24 7:06 ` Simon Horman
2017-03-24 7:06 ` Simon Horman
2017-03-24 7:59 ` Geert Uytterhoeven
2017-03-24 7:59 ` Geert Uytterhoeven
2017-03-24 7:59 ` Geert Uytterhoeven
2017-03-22 2:03 ` [PATCH 07/15] ARM: dts: spear13xx: " Rob Herring
2017-03-22 2:03 ` Rob Herring
2017-03-22 4:11 ` Viresh Kumar
2017-03-22 4:11 ` Viresh Kumar
2017-03-22 2:03 ` [PATCH 09/15] ARM: dts: versatile: " Rob Herring
2017-03-22 2:03 ` Rob Herring
2017-03-22 2:03 ` [PATCH 10/15] ARM: dts: bcm: fix msi-controller name and unit address Rob Herring
2017-03-22 2:03 ` Rob Herring
2017-03-22 6:07 ` Ray Jui
2017-03-22 6:07 ` Ray Jui
2017-03-22 17:16 ` Florian Fainelli
2017-03-22 17:16 ` Florian Fainelli
2017-03-22 2:03 ` [PATCH 12/15] arm64: dts: apm: fix PCI bus dtc warnings Rob Herring
2017-03-22 2:03 ` Rob Herring
2017-03-22 2:03 ` [PATCH 13/15] arm64: dts: juno: " Rob Herring
2017-03-22 2:03 ` Rob Herring
2017-03-22 11:56 ` Liviu Dudau
2017-03-22 11:56 ` Liviu Dudau
2017-03-22 2:03 ` [PATCH 14/15] arm64: dts: broadcom: " Rob Herring
2017-03-22 2:03 ` Rob Herring
2017-03-22 5:36 ` Jayachandran C.
2017-03-22 5:36 ` Jayachandran C.
2017-03-22 2:03 ` [PATCH 15/15] arm64: dts: xilinx: " Rob Herring
2017-03-22 2:03 ` Rob Herring
2017-03-23 14:35 ` Michal Simek
2017-03-23 14:35 ` Michal Simek
2017-03-22 8:01 ` [PATCH 01/15] ARM: dts: alpine: fix PCIe node name Antoine Tenart
2017-03-22 8:01 ` Antoine Tenart
2017-03-24 17:00 ` Arnd Bergmann
2017-03-24 17:00 ` Arnd Bergmann
2017-03-24 18:25 ` Antoine Tenart
2017-03-24 18:25 ` Antoine Tenart
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