From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH v3 1/6] target/s390x: Implement STORE FACILITIES LIST EXTENDED
Date: Tue, 9 May 2017 11:07:10 -0700 [thread overview]
Message-ID: <20170509180715.22910-2-rth@twiddle.net> (raw)
In-Reply-To: <20170509180715.22910-1-rth@twiddle.net>
At the same time, improve STORE FACILITIES LIST
so that we don't hard-code the list for all cpus.
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
target/s390x/helper.h | 2 ++
target/s390x/insn-data.def | 2 ++
target/s390x/misc_helper.c | 59 ++++++++++++++++++++++++++++++++++++++++++++++
target/s390x/translate.c | 17 ++++++-------
4 files changed, 72 insertions(+), 8 deletions(-)
diff --git a/target/s390x/helper.h b/target/s390x/helper.h
index 9102071..01adb50 100644
--- a/target/s390x/helper.h
+++ b/target/s390x/helper.h
@@ -83,6 +83,8 @@ DEF_HELPER_FLAGS_5(calc_cc, TCG_CALL_NO_RWG_SE, i32, env, i32, i64, i64, i64)
DEF_HELPER_FLAGS_2(sfpc, TCG_CALL_NO_RWG, void, env, i64)
DEF_HELPER_FLAGS_2(sfas, TCG_CALL_NO_WG, void, env, i64)
DEF_HELPER_FLAGS_1(popcnt, TCG_CALL_NO_RWG_SE, i64, i64)
+DEF_HELPER_FLAGS_1(stfl, TCG_CALL_NO_RWG, void, env)
+DEF_HELPER_2(stfle, i32, env, i64)
#ifndef CONFIG_USER_ONLY
DEF_HELPER_3(servc, i32, env, i64, i64)
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def
index 075ff59..b6702da 100644
--- a/target/s390x/insn-data.def
+++ b/target/s390x/insn-data.def
@@ -747,6 +747,8 @@
C(0xe33e, STRV, RXY_a, Z, la2, r1_32u, new, m1_32, rev32, 0)
C(0xe32f, STRVG, RXY_a, Z, la2, r1_o, new, m1_64, rev64, 0)
+/* STORE FACILITY LIST EXTENDED */
+ C(0xb2b0, STFLE, S, SFLE, 0, a2, 0, 0, stfle, 0)
/* STORE FPC */
C(0xb29c, STFPC, S, Z, 0, a2, new, m2_32, efpc, 0)
diff --git a/target/s390x/misc_helper.c b/target/s390x/misc_helper.c
index eca8244..bd94242 100644
--- a/target/s390x/misc_helper.c
+++ b/target/s390x/misc_helper.c
@@ -678,3 +678,62 @@ void HELPER(per_ifetch)(CPUS390XState *env, uint64_t addr)
}
}
#endif
+
+/* The maximum bit defined at the moment is 129. */
+#define MAX_STFL_WORDS 3
+
+/* Canonicalize the current cpu's features into the 64-bit words required
+ by STFLE. Return the index-1 of the max word that is non-zero. */
+static unsigned do_stfle(CPUS390XState *env, uint64_t words[MAX_STFL_WORDS])
+{
+ S390CPU *cpu = s390_env_get_cpu(env);
+ const unsigned long *features = cpu->model->features;
+ unsigned max_bit = 0;
+ S390Feat feat;
+
+ memset(words, 0, sizeof(uint64_t) * MAX_STFL_WORDS);
+
+ if (test_bit(S390_FEAT_ZARCH, features)) {
+ /* z/Architecture is always active if around */
+ words[0] = 1ull << (63 - 2);
+ }
+
+ for (feat = find_first_bit(features, S390_FEAT_MAX);
+ feat < S390_FEAT_MAX;
+ feat = find_next_bit(features, S390_FEAT_MAX, feat + 1)) {
+ const S390FeatDef *def = s390_feat_def(feat);
+ if (def->type == S390_FEAT_TYPE_STFL) {
+ unsigned bit = def->bit;
+ if (bit > max_bit) {
+ max_bit = bit;
+ }
+ assert(bit / 64 < MAX_STFL_WORDS);
+ words[bit / 64] |= 1ULL << (63 - bit % 64);
+ }
+ }
+
+ return max_bit / 64;
+}
+
+void HELPER(stfl)(CPUS390XState *env)
+{
+ uint64_t words[MAX_STFL_WORDS];
+
+ do_stfle(env, words);
+ cpu_stl_data(env, 200, words[0] >> 32);
+}
+
+uint32_t HELPER(stfle)(CPUS390XState *env, uint64_t addr)
+{
+ uint64_t words[MAX_STFL_WORDS];
+ unsigned count_m1 = env->regs[0] & 0xff;
+ unsigned max_m1 = do_stfle(env, words);
+ unsigned i;
+
+ for (i = 0; i <= count_m1; ++i) {
+ cpu_stq_data(env, addr + 8 * i, words[i]);
+ }
+
+ env->regs[0] = deposit64(env->regs[0], 0, 8, max_m1);
+ return (count_m1 >= max_m1 ? 0 : 3);
+}
diff --git a/target/s390x/translate.c b/target/s390x/translate.c
index 01c6217..69940e3 100644
--- a/target/s390x/translate.c
+++ b/target/s390x/translate.c
@@ -3628,15 +3628,8 @@ static ExitStatus op_spt(DisasContext *s, DisasOps *o)
static ExitStatus op_stfl(DisasContext *s, DisasOps *o)
{
- TCGv_i64 f, a;
- /* We really ought to have more complete indication of facilities
- that we implement. Address this when STFLE is implemented. */
check_privileged(s);
- f = tcg_const_i64(0xc0000000);
- a = tcg_const_i64(200);
- tcg_gen_qemu_st32(f, a, get_mem_index(s));
- tcg_temp_free_i64(f);
- tcg_temp_free_i64(a);
+ gen_helper_stfl(cpu_env);
return NO_EXIT;
}
@@ -3802,6 +3795,14 @@ static ExitStatus op_sturg(DisasContext *s, DisasOps *o)
}
#endif
+static ExitStatus op_stfle(DisasContext *s, DisasOps *o)
+{
+ potential_page_fault(s);
+ gen_helper_stfle(cc_op, cpu_env, o->in2);
+ set_cc_static(s);
+ return NO_EXIT;
+}
+
static ExitStatus op_st8(DisasContext *s, DisasOps *o)
{
tcg_gen_qemu_st8(o->in1, o->in2, get_mem_index(s));
--
2.9.3
next prev parent reply other threads:[~2017-05-09 18:07 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-09 18:07 [Qemu-devel] [PATCH v3 0/6] target/s390x patches Richard Henderson
2017-05-09 18:07 ` Richard Henderson [this message]
2017-05-09 18:38 ` [Qemu-devel] [PATCH v3 1/6] target/s390x: Implement STORE FACILITIES LIST EXTENDED Aurelien Jarno
2017-05-09 18:07 ` [Qemu-devel] [PATCH v3 2/6] target/s390x: Implement LOAD PROGRAM PARAMETER Richard Henderson
2017-05-09 18:07 ` [Qemu-devel] [PATCH v3 3/6] target/s390x: Diagnose specification exception for atomics Richard Henderson
2017-05-10 10:39 ` Philippe Mathieu-Daudé
2017-05-09 18:07 ` [Qemu-devel] [PATCH v3 4/6] target/s390x: Implement LOAD PAIR DISJOINT Richard Henderson
2017-05-10 10:16 ` Aurelien Jarno
2017-05-10 17:13 ` Éric Bischoff
2017-05-10 17:43 ` Richard Henderson
2017-05-10 18:24 ` Aurelien Jarno
2017-05-09 18:07 ` [Qemu-devel] [PATCH v3 5/6] target/s390x: Use atomic operations for COMPARE SWAP Richard Henderson
2017-05-10 3:51 ` Thomas Huth
2017-05-10 14:07 ` Richard Henderson
2017-05-09 18:07 ` [Qemu-devel] [PATCH v3 6/6] target/s390x: Use atomic operations for LOAD AND OP Richard Henderson
2017-05-09 18:32 ` [Qemu-devel] [PATCH v3 0/6] target/s390x patches no-reply
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