From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: Miroslav Benes <mbenes@suse.cz>
Subject: [Qemu-devel] [PATCH v3 2/6] target/s390x: Implement LOAD PROGRAM PARAMETER
Date: Tue, 9 May 2017 11:07:11 -0700 [thread overview]
Message-ID: <20170509180715.22910-3-rth@twiddle.net> (raw)
In-Reply-To: <20170509180715.22910-1-rth@twiddle.net>
From: Miroslav Benes <mbenes@suse.cz>
Linux arch/s390/kernel/head(64).S uses LPP instruction if it is
available in facilities list provided by stfl/stfle instruction.
This is the case of newer z/System generations and their qemu
definition.
The description of LPP is at
http://www-01.ibm.com/support/docview.wss?uid=isg26fcd1cc32246f4c8852574ce0044734a
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Miroslav Benes <mbenes@suse.cz>
Message-Id: <20170227085353.20787-1-mbenes@suse.cz>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
target/s390x/insn-data.def | 2 ++
target/s390x/translate.c | 9 +++++++++
2 files changed, 11 insertions(+)
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def
index b6702da..43c5707 100644
--- a/target/s390x/insn-data.def
+++ b/target/s390x/insn-data.def
@@ -845,6 +845,8 @@
/* LOAD CONTROL */
C(0xb700, LCTL, RS_a, Z, 0, a2, 0, 0, lctl, 0)
C(0xeb2f, LCTLG, RSY_a, Z, 0, a2, 0, 0, lctlg, 0)
+/* LOAD PROGRAM PARAMETER */
+ C(0xb280, LPP, S, LPP, 0, m2_64, 0, 0, lpp, 0)
/* LOAD PSW */
C(0x8200, LPSW, S, Z, 0, a2, 0, 0, lpsw, 0)
/* LOAD PSW EXTENDED */
diff --git a/target/s390x/translate.c b/target/s390x/translate.c
index 69940e3..2b66a4e 100644
--- a/target/s390x/translate.c
+++ b/target/s390x/translate.c
@@ -1194,6 +1194,7 @@ typedef enum DisasFacility {
FAC_SCF, /* store clock fast */
FAC_SFLE, /* store facility list extended */
FAC_ILA, /* interlocked access facility 1 */
+ FAC_LPP, /* load-program-parameter */
} DisasFacility;
struct DisasInsn {
@@ -2567,6 +2568,14 @@ static ExitStatus op_lra(DisasContext *s, DisasOps *o)
return NO_EXIT;
}
+static ExitStatus op_lpp(DisasContext *s, DisasOps *o)
+{
+ check_privileged(s);
+
+ tcg_gen_st_i64(o->in2, cpu_env, offsetof(CPUS390XState, pp));
+ return NO_EXIT;
+}
+
static ExitStatus op_lpsw(DisasContext *s, DisasOps *o)
{
TCGv_i64 t1, t2;
--
2.9.3
next prev parent reply other threads:[~2017-05-09 18:07 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-09 18:07 [Qemu-devel] [PATCH v3 0/6] target/s390x patches Richard Henderson
2017-05-09 18:07 ` [Qemu-devel] [PATCH v3 1/6] target/s390x: Implement STORE FACILITIES LIST EXTENDED Richard Henderson
2017-05-09 18:38 ` Aurelien Jarno
2017-05-09 18:07 ` Richard Henderson [this message]
2017-05-09 18:07 ` [Qemu-devel] [PATCH v3 3/6] target/s390x: Diagnose specification exception for atomics Richard Henderson
2017-05-10 10:39 ` Philippe Mathieu-Daudé
2017-05-09 18:07 ` [Qemu-devel] [PATCH v3 4/6] target/s390x: Implement LOAD PAIR DISJOINT Richard Henderson
2017-05-10 10:16 ` Aurelien Jarno
2017-05-10 17:13 ` Éric Bischoff
2017-05-10 17:43 ` Richard Henderson
2017-05-10 18:24 ` Aurelien Jarno
2017-05-09 18:07 ` [Qemu-devel] [PATCH v3 5/6] target/s390x: Use atomic operations for COMPARE SWAP Richard Henderson
2017-05-10 3:51 ` Thomas Huth
2017-05-10 14:07 ` Richard Henderson
2017-05-09 18:07 ` [Qemu-devel] [PATCH v3 6/6] target/s390x: Use atomic operations for LOAD AND OP Richard Henderson
2017-05-09 18:32 ` [Qemu-devel] [PATCH v3 0/6] target/s390x patches no-reply
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