From: Antoine Tenart <antoine.tenart@free-electrons.com>
To: Marc Zyngier <marc.zyngier@arm.com>
Cc: Antoine Tenart <antoine.tenart@free-electrons.com>,
herbert@gondor.apana.org.au, davem@davemloft.net,
jason@lakedaemon.net, andrew@lunn.ch,
gregory.clement@free-electrons.com,
sebastian.hesselbarth@gmail.com,
thomas.petazzoni@free-electrons.com,
boris.brezillon@free-electrons.com, igall@marvell.com,
nadavh@marvell.com, linux-crypto@vger.kernel.org,
robin.murphy@arm.com, oferh@marvell.com,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 1/3] Documentation/bindings: Document the SafeXel cryptographic engine driver
Date: Mon, 22 May 2017 16:54:40 +0200 [thread overview]
Message-ID: <20170522145440.GE14976@kwain.lan> (raw)
In-Reply-To: <e8ef1f11-539c-9abc-9977-36366d4994b1@arm.com>
On Mon, May 22, 2017 at 03:48:30PM +0100, Marc Zyngier wrote:
> On 22/05/17 15:30, Antoine Tenart wrote:
> > On Wed, May 03, 2017 at 05:36:38PM +0100, Marc Zyngier wrote:
> >> On 24/04/17 08:54, Antoine Tenart wrote:
> >>> +
> >>> + crypto: crypto@800000 {
> >>> + compatible = "inside-secure,safexcel-eip197";
> >>> + reg = <0x800000 0x200000>;
> >>> + interrupts = <GIC_SPI 34 (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_LEVEL_HIGH)>,
> >>
> >> I'm puzzled. How can the interrupt can be both level *and* edge? That
> >> doesn't make any sense.
> >
> > I agree this looks odd. I took it from Russel's ICU mapping:
> > http://lists.infradead.org/pipermail/linux-arm-kernel/2017-February/489040.html
>
> This emails says:
>
> ICU-irq => GIC-SPI-num Enable Edge/Level ICU-group
> [...]
> 24 => 34 En Lv 0
It also says: 87 => 34 En Lv 5, which is the IRQ I'm looking for.
Antoine.
--
Antoine Ténart, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
WARNING: multiple messages have this Message-ID (diff)
From: antoine.tenart@free-electrons.com (Antoine Tenart)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 1/3] Documentation/bindings: Document the SafeXel cryptographic engine driver
Date: Mon, 22 May 2017 16:54:40 +0200 [thread overview]
Message-ID: <20170522145440.GE14976@kwain.lan> (raw)
In-Reply-To: <e8ef1f11-539c-9abc-9977-36366d4994b1@arm.com>
On Mon, May 22, 2017 at 03:48:30PM +0100, Marc Zyngier wrote:
> On 22/05/17 15:30, Antoine Tenart wrote:
> > On Wed, May 03, 2017 at 05:36:38PM +0100, Marc Zyngier wrote:
> >> On 24/04/17 08:54, Antoine Tenart wrote:
> >>> +
> >>> + crypto: crypto at 800000 {
> >>> + compatible = "inside-secure,safexcel-eip197";
> >>> + reg = <0x800000 0x200000>;
> >>> + interrupts = <GIC_SPI 34 (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_LEVEL_HIGH)>,
> >>
> >> I'm puzzled. How can the interrupt can be both level *and* edge? That
> >> doesn't make any sense.
> >
> > I agree this looks odd. I took it from Russel's ICU mapping:
> > http://lists.infradead.org/pipermail/linux-arm-kernel/2017-February/489040.html
>
> This emails says:
>
> ICU-irq => GIC-SPI-num Enable Edge/Level ICU-group
> [...]
> 24 => 34 En Lv 0
It also says: 87 => 34 En Lv 5, which is the IRQ I'm looking for.
Antoine.
--
Antoine T?nart, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
next prev parent reply other threads:[~2017-05-22 14:54 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-04-24 7:54 [PATCH v3 0/3] arm64: marvell: add cryptographic engine support for 7k/8k Antoine Tenart
2017-04-24 7:54 ` Antoine Tenart
2017-04-24 7:54 ` [PATCH v3 1/3] Documentation/bindings: Document the SafeXel cryptographic engine driver Antoine Tenart
2017-04-24 7:54 ` Antoine Tenart
2017-05-03 16:36 ` Marc Zyngier
2017-05-03 16:36 ` Marc Zyngier
2017-05-22 14:30 ` Antoine Tenart
2017-05-22 14:30 ` Antoine Tenart
2017-05-22 14:48 ` Marc Zyngier
2017-05-22 14:48 ` Marc Zyngier
2017-05-22 14:54 ` Antoine Tenart [this message]
2017-05-22 14:54 ` Antoine Tenart
2017-05-22 15:02 ` Marc Zyngier
2017-05-22 15:02 ` Marc Zyngier
2017-05-22 19:37 ` Thomas Petazzoni
2017-05-22 19:37 ` Thomas Petazzoni
2017-05-23 11:13 ` Marc Zyngier
2017-05-23 11:13 ` Marc Zyngier
2017-05-23 12:56 ` Thomas Petazzoni
2017-05-23 12:56 ` Thomas Petazzoni
2017-04-24 7:54 ` [PATCH v3 2/3] crypto: inside-secure: add SafeXcel EIP197 crypto " Antoine Tenart
2017-04-24 7:54 ` Antoine Tenart
2017-04-24 8:50 ` Igal Liberman
2017-04-24 8:50 ` Igal Liberman
2017-04-24 8:57 ` Antoine Tenart
2017-04-24 8:57 ` Antoine Tenart
2017-05-03 17:14 ` Robin Murphy
2017-05-03 17:14 ` Robin Murphy
2017-05-08 8:46 ` Igal Liberman
2017-05-08 8:46 ` Igal Liberman
2017-04-24 12:59 ` Stephan Müller
2017-04-24 12:59 ` Stephan Müller
2017-04-25 6:53 ` Antoine Tenart
2017-04-25 6:53 ` Antoine Tenart
2017-05-03 11:57 ` Robin Murphy
2017-05-03 11:57 ` Robin Murphy
2017-05-03 14:03 ` Antoine Tenart
2017-05-03 14:03 ` Antoine Tenart
2017-04-24 7:54 ` [PATCH v3 3/3] MAINTAINERS: add a maintainer for the Inside Secure crypto driver Antoine Tenart
2017-04-24 7:54 ` Antoine Tenart
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