From: antoine.tenart@free-electrons.com (Antoine Tenart)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 7/8] net: mvmdio: add xmdio support
Date: Fri, 9 Jun 2017 16:56:30 +0200 [thread overview]
Message-ID: <20170609145630.GE31464@kwain> (raw)
In-Reply-To: <20170609144936.GF20756@lunn.ch>
Hi Andrew,
On Fri, Jun 09, 2017 at 04:49:36PM +0200, Andrew Lunn wrote:
> On Fri, Jun 09, 2017 at 04:09:22PM +0200, Antoine Tenart wrote:
> >
> > The MDIO/xMDIO registers are embedded into the network controller. The
> > mvmdio driver was created at first to abstract this functionality
> > outside the network controller driver because it is shared between all
> > ports and used in different IPs. So it's not really devices per say.
> >
> > Looking at the datasheet/schematics there are two hardware buses, one
> > for c22 and one for c45. So we should keep two separate nodes to
> > describe the two interfaces. From what I read c45 is backward
> > compatible with c22 so the xSMI interface should be capable to speak to
> > c22 PHYs as well.
>
> The on the wire protocol of c45 is backwards compatible with c22, in
> that a c22 device will not get confused by a c45 transaction on the
> bus. A c22 device will just ignore it. You cannot talk to a c22 device
> using c45.
I see.
> From what you are saying, you have a hardware block generating c45
> transactions and a hardware block which generates c22 transactions.
> What is not clear to me is if these two hardware blocks are using the
> same physical MDC/MDIO pins, i.e. there is just one MDIO bus to the
> outside world, or are there two busses?
There are two busses, one generating c22 transactions and one generating
c45 transactions. Each bus has its own MDC/MDIO pins.
> > And by looking at the datasheet this seems possible, although it's
> > not completely clear. But anyway this wouldn't impact the dt
> > bindings.
>
> What i'm worried about is there being one set of MDC/MDIO lines. You
> should not expose that to linux as two mdio busses. It is one bus.
>
> The phylib will poll each phy on the bus once per second to check its
> state. The phylib serialises the read/writes at a bus level. So if you
> have one physical bus registered as two logical bus, at some point you
> are going to get simultaneous read/writes, and you are going to need a
> mutex low down to serialise this for physical bus access.
>
> And in the end, this would affect the dt binding. If it is one
> physical bus, you want one binding representing both c22 and c45
> transactions.
Of course. See above.
Thanks!
Antoine
--
Antoine T?nart, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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From: Antoine Tenart <antoine.tenart@free-electrons.com>
To: Andrew Lunn <andrew@lunn.ch>
Cc: thomas.petazzoni@free-electrons.com,
Florian Fainelli <f.fainelli@gmail.com>,
jason@lakedaemon.net, netdev@vger.kernel.org,
Antoine Tenart <antoine.tenart@free-electrons.com>,
linux@armlinux.org.uk, gregory.clement@free-electrons.com,
mw@semihalf.com, davem@davemloft.net,
linux-arm-kernel@lists.infradead.org,
sebastian.hesselbarth@gmail.com
Subject: Re: [PATCH v2 7/8] net: mvmdio: add xmdio support
Date: Fri, 9 Jun 2017 16:56:30 +0200 [thread overview]
Message-ID: <20170609145630.GE31464@kwain> (raw)
In-Reply-To: <20170609144936.GF20756@lunn.ch>
[-- Attachment #1.1: Type: text/plain, Size: 2436 bytes --]
Hi Andrew,
On Fri, Jun 09, 2017 at 04:49:36PM +0200, Andrew Lunn wrote:
> On Fri, Jun 09, 2017 at 04:09:22PM +0200, Antoine Tenart wrote:
> >
> > The MDIO/xMDIO registers are embedded into the network controller. The
> > mvmdio driver was created at first to abstract this functionality
> > outside the network controller driver because it is shared between all
> > ports and used in different IPs. So it's not really devices per say.
> >
> > Looking at the datasheet/schematics there are two hardware buses, one
> > for c22 and one for c45. So we should keep two separate nodes to
> > describe the two interfaces. From what I read c45 is backward
> > compatible with c22 so the xSMI interface should be capable to speak to
> > c22 PHYs as well.
>
> The on the wire protocol of c45 is backwards compatible with c22, in
> that a c22 device will not get confused by a c45 transaction on the
> bus. A c22 device will just ignore it. You cannot talk to a c22 device
> using c45.
I see.
> From what you are saying, you have a hardware block generating c45
> transactions and a hardware block which generates c22 transactions.
> What is not clear to me is if these two hardware blocks are using the
> same physical MDC/MDIO pins, i.e. there is just one MDIO bus to the
> outside world, or are there two busses?
There are two busses, one generating c22 transactions and one generating
c45 transactions. Each bus has its own MDC/MDIO pins.
> > And by looking at the datasheet this seems possible, although it's
> > not completely clear. But anyway this wouldn't impact the dt
> > bindings.
>
> What i'm worried about is there being one set of MDC/MDIO lines. You
> should not expose that to linux as two mdio busses. It is one bus.
>
> The phylib will poll each phy on the bus once per second to check its
> state. The phylib serialises the read/writes at a bus level. So if you
> have one physical bus registered as two logical bus, at some point you
> are going to get simultaneous read/writes, and you are going to need a
> mutex low down to serialise this for physical bus access.
>
> And in the end, this would affect the dt binding. If it is one
> physical bus, you want one binding representing both c22 and c45
> transactions.
Of course. See above.
Thanks!
Antoine
--
Antoine Ténart, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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next prev parent reply other threads:[~2017-06-09 14:56 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-08 9:26 [PATCH v2 0/8] net: mvmdio: add xSMI support Antoine Tenart
2017-06-08 9:26 ` Antoine Tenart
2017-06-08 9:26 ` [PATCH v2 1/8] net: mvmdio: reorder headers alphabetically Antoine Tenart
2017-06-08 9:26 ` Antoine Tenart
2017-06-08 9:26 ` [PATCH v2 2/8] net: mvmdio: use tabs for defines Antoine Tenart
2017-06-08 9:26 ` Antoine Tenart
2017-06-08 9:26 ` [PATCH v2 3/8] net: mvmdio: use GENMASK for masks Antoine Tenart
2017-06-08 9:26 ` Antoine Tenart
2017-06-08 10:35 ` Sergei Shtylyov
2017-06-08 10:35 ` Sergei Shtylyov
2017-06-08 9:26 ` [PATCH v2 4/8] net: mvmdio: move the read valid check into its own function Antoine Tenart
2017-06-08 9:26 ` Antoine Tenart
2017-06-08 9:26 ` [PATCH v2 5/8] net: mvmdio: introduce an ops structure Antoine Tenart
2017-06-08 9:26 ` Antoine Tenart
2017-06-08 9:26 ` [PATCH v2 6/8] net: mvmdio: put the poll intervals in the " Antoine Tenart
2017-06-08 9:26 ` Antoine Tenart
2017-06-08 9:26 ` [PATCH v2 7/8] net: mvmdio: add xmdio support Antoine Tenart
2017-06-08 9:26 ` Antoine Tenart
2017-06-08 16:03 ` Andrew Lunn
2017-06-08 16:03 ` Andrew Lunn
2017-06-09 6:40 ` Antoine Tenart
2017-06-09 6:40 ` Antoine Tenart
2017-06-09 20:00 ` Russell King - ARM Linux
2017-06-09 20:00 ` Russell King - ARM Linux
2017-06-08 16:42 ` Florian Fainelli
2017-06-08 16:42 ` Florian Fainelli
2017-06-08 16:55 ` Andrew Lunn
2017-06-08 16:55 ` Andrew Lunn
2017-06-09 6:39 ` Antoine Tenart
2017-06-09 6:39 ` Antoine Tenart
2017-06-09 8:25 ` Antoine Tenart
2017-06-09 8:25 ` Antoine Tenart
2017-06-09 13:26 ` Andrew Lunn
2017-06-09 13:26 ` Andrew Lunn
2017-06-09 14:09 ` Antoine Tenart
2017-06-09 14:09 ` Antoine Tenart
2017-06-09 14:49 ` Andrew Lunn
2017-06-09 14:49 ` Andrew Lunn
2017-06-09 14:56 ` Antoine Tenart [this message]
2017-06-09 14:56 ` Antoine Tenart
2017-06-09 15:03 ` Andrew Lunn
2017-06-09 15:03 ` Andrew Lunn
2017-06-09 16:22 ` Antoine Tenart
2017-06-09 16:22 ` Antoine Tenart
2017-06-09 19:56 ` Russell King - ARM Linux
2017-06-09 19:56 ` Russell King - ARM Linux
2017-06-09 19:51 ` Russell King - ARM Linux
2017-06-09 19:51 ` Russell King - ARM Linux
2017-06-08 9:26 ` [PATCH v2 8/8] arm64: marvell: dts: add xmdio nodes for 7k/8k Antoine Tenart
2017-06-08 9:26 ` Antoine Tenart
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