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From: Boris Brezillon <boris.brezillon@free-electrons.com>
To: Quentin Schulz <quentin.schulz@free-electrons.com>
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
	alsa-devel@alsa-project.org, thomas.petazzoni@free-electrons.com,
	lgirdwood@gmail.com, Nicolas Ferre <nicolas.ferre@atmel.com>,
	mturquette@baylibre.com, tiwai@suse.com, sboyd@codeaurora.org,
	nicolas.ferre@microchip.com, linux@armlinux.org.uk,
	robh+dt@kernel.org, alexandre.belloni@free-electrons.com,
	broonie@kernel.org, linux-clk@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 2/6] clk: at91: add audio pll clock driver
Date: Mon, 3 Jul 2017 16:01:40 +0200	[thread overview]
Message-ID: <20170703160140.6959bad8@bbrezillon> (raw)
In-Reply-To: <20170623090059.8371-3-quentin.schulz@free-electrons.com>

On Fri, 23 Jun 2017 11:00:55 +0200
Quentin Schulz <quentin.schulz@free-electrons.com> wrote:

> From: Nicolas Ferre <nicolas.ferre@atmel.com>
> 
> This new clock driver set allows to have a fractional divided clock that
> would generate a precise clock particularly suitable for audio
> applications.
> 
> The main audio pll clock has two children clocks: one that is connected
> to the PMC, the other that can directly drive a pad. As these two routes
> have different enable bits and different dividers and divider formula,
> they are handled by two different drivers. Each of them could modify the
> rate of the main audio pll parent.
> The main audio pll clock can output 620MHz to 700MHz.
> 
> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
> Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
> ---
>  .../devicetree/bindings/clock/at91-clock.txt       |  10 +

As already mentioned by Alex, DT bindings should go in a separate patch

>  arch/arm/mach-at91/Kconfig                         |   4 +
>  drivers/clk/at91/Makefile                          |   2 +
>  drivers/clk/at91/clk-audio-pll-pad.c               | 204 ++++++++++++++++++
>  drivers/clk/at91/clk-audio-pll-pmc.c               | 175 +++++++++++++++
>  drivers/clk/at91/clk-audio-pll.c                   | 237 +++++++++++++++++++++
>  include/linux/clk/at91_pmc.h                       |  25 +++
>  sound/soc/atmel/atmel-classd.c                     |  20 +-

Same goes for the atmel-classd changes.

>  8 files changed, 658 insertions(+), 19 deletions(-)
>  create mode 100644 drivers/clk/at91/clk-audio-pll-pad.c
>  create mode 100644 drivers/clk/at91/clk-audio-pll-pmc.c
>  create mode 100644 drivers/clk/at91/clk-audio-pll.c
> 

[...]

> diff --git a/drivers/clk/at91/clk-audio-pll-pmc.c b/drivers/clk/at91/clk-audio-pll-pmc.c
> new file mode 100644
> index 000000000000..208d0b59eb4e
> --- /dev/null
> +++ b/drivers/clk/at91/clk-audio-pll-pmc.c
> @@ -0,0 +1,175 @@
> +/*
> + *  Copyright (C) 2016 Atmel Corporation,
> + *                     Nicolas Ferre <nicolas.ferre@atmel.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + */
> +#include <linux/clk.h>
> +#include <linux/clk-provider.h>
> +#include <linux/clkdev.h>
> +#include <linux/clk/at91_pmc.h>
> +#include <linux/of.h>
> +#include <linux/mfd/syscon.h>
> +#include <linux/regmap.h>
> +
> +#include "pmc.h"
> +
> +/*
> + * DOC: PMC output for fractional PLL clock for audio
> + *
> + * Traits of this clock:
> + * enable - clk_enable writes qdpmc, and enables PMC output
> + * rate - rate is adjustable.
> + *        clk->rate = parent->rate / (qdpmc + 1)
> + * parent - fixed parent.  No clk_set_parent support
> + */
> +
> +#define AUDIO_PLL_FOUT_MIN		620000000
> +#define AUDIO_PLL_FOUT_MAX		700000000
> +#define AUDIO_PLL_REFERENCE_FOUT	660000000

These 3 macros are not unused, you can drop them.

WARNING: multiple messages have this Message-ID (diff)
From: Boris Brezillon <boris.brezillon@free-electrons.com>
To: Quentin Schulz <quentin.schulz@free-electrons.com>
Cc: mturquette@baylibre.com, sboyd@codeaurora.org,
	robh+dt@kernel.org, mark.rutland@arm.com,
	nicolas.ferre@microchip.com,
	alexandre.belloni@free-electrons.com, linux@armlinux.org.uk,
	lgirdwood@gmail.com, broonie@kernel.org, perex@perex.cz,
	tiwai@suse.com, Nicolas Ferre <nicolas.ferre@atmel.com>,
	linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	alsa-devel@alsa-project.org, thomas.petazzoni@free-electrons.com
Subject: Re: [PATCH 2/6] clk: at91: add audio pll clock driver
Date: Mon, 3 Jul 2017 16:01:40 +0200	[thread overview]
Message-ID: <20170703160140.6959bad8@bbrezillon> (raw)
In-Reply-To: <20170623090059.8371-3-quentin.schulz@free-electrons.com>

On Fri, 23 Jun 2017 11:00:55 +0200
Quentin Schulz <quentin.schulz@free-electrons.com> wrote:

> From: Nicolas Ferre <nicolas.ferre@atmel.com>
> 
> This new clock driver set allows to have a fractional divided clock that
> would generate a precise clock particularly suitable for audio
> applications.
> 
> The main audio pll clock has two children clocks: one that is connected
> to the PMC, the other that can directly drive a pad. As these two routes
> have different enable bits and different dividers and divider formula,
> they are handled by two different drivers. Each of them could modify the
> rate of the main audio pll parent.
> The main audio pll clock can output 620MHz to 700MHz.
> 
> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
> Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
> ---
>  .../devicetree/bindings/clock/at91-clock.txt       |  10 +

As already mentioned by Alex, DT bindings should go in a separate patch

>  arch/arm/mach-at91/Kconfig                         |   4 +
>  drivers/clk/at91/Makefile                          |   2 +
>  drivers/clk/at91/clk-audio-pll-pad.c               | 204 ++++++++++++++++++
>  drivers/clk/at91/clk-audio-pll-pmc.c               | 175 +++++++++++++++
>  drivers/clk/at91/clk-audio-pll.c                   | 237 +++++++++++++++++++++
>  include/linux/clk/at91_pmc.h                       |  25 +++
>  sound/soc/atmel/atmel-classd.c                     |  20 +-

Same goes for the atmel-classd changes.

>  8 files changed, 658 insertions(+), 19 deletions(-)
>  create mode 100644 drivers/clk/at91/clk-audio-pll-pad.c
>  create mode 100644 drivers/clk/at91/clk-audio-pll-pmc.c
>  create mode 100644 drivers/clk/at91/clk-audio-pll.c
> 

[...]

> diff --git a/drivers/clk/at91/clk-audio-pll-pmc.c b/drivers/clk/at91/clk-audio-pll-pmc.c
> new file mode 100644
> index 000000000000..208d0b59eb4e
> --- /dev/null
> +++ b/drivers/clk/at91/clk-audio-pll-pmc.c
> @@ -0,0 +1,175 @@
> +/*
> + *  Copyright (C) 2016 Atmel Corporation,
> + *                     Nicolas Ferre <nicolas.ferre@atmel.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + */
> +#include <linux/clk.h>
> +#include <linux/clk-provider.h>
> +#include <linux/clkdev.h>
> +#include <linux/clk/at91_pmc.h>
> +#include <linux/of.h>
> +#include <linux/mfd/syscon.h>
> +#include <linux/regmap.h>
> +
> +#include "pmc.h"
> +
> +/*
> + * DOC: PMC output for fractional PLL clock for audio
> + *
> + * Traits of this clock:
> + * enable - clk_enable writes qdpmc, and enables PMC output
> + * rate - rate is adjustable.
> + *        clk->rate = parent->rate / (qdpmc + 1)
> + * parent - fixed parent.  No clk_set_parent support
> + */
> +
> +#define AUDIO_PLL_FOUT_MIN		620000000
> +#define AUDIO_PLL_FOUT_MAX		700000000
> +#define AUDIO_PLL_REFERENCE_FOUT	660000000

These 3 macros are not unused, you can drop them.

WARNING: multiple messages have this Message-ID (diff)
From: boris.brezillon@free-electrons.com (Boris Brezillon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/6] clk: at91: add audio pll clock driver
Date: Mon, 3 Jul 2017 16:01:40 +0200	[thread overview]
Message-ID: <20170703160140.6959bad8@bbrezillon> (raw)
In-Reply-To: <20170623090059.8371-3-quentin.schulz@free-electrons.com>

On Fri, 23 Jun 2017 11:00:55 +0200
Quentin Schulz <quentin.schulz@free-electrons.com> wrote:

> From: Nicolas Ferre <nicolas.ferre@atmel.com>
> 
> This new clock driver set allows to have a fractional divided clock that
> would generate a precise clock particularly suitable for audio
> applications.
> 
> The main audio pll clock has two children clocks: one that is connected
> to the PMC, the other that can directly drive a pad. As these two routes
> have different enable bits and different dividers and divider formula,
> they are handled by two different drivers. Each of them could modify the
> rate of the main audio pll parent.
> The main audio pll clock can output 620MHz to 700MHz.
> 
> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
> Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
> ---
>  .../devicetree/bindings/clock/at91-clock.txt       |  10 +

As already mentioned by Alex, DT bindings should go in a separate patch

>  arch/arm/mach-at91/Kconfig                         |   4 +
>  drivers/clk/at91/Makefile                          |   2 +
>  drivers/clk/at91/clk-audio-pll-pad.c               | 204 ++++++++++++++++++
>  drivers/clk/at91/clk-audio-pll-pmc.c               | 175 +++++++++++++++
>  drivers/clk/at91/clk-audio-pll.c                   | 237 +++++++++++++++++++++
>  include/linux/clk/at91_pmc.h                       |  25 +++
>  sound/soc/atmel/atmel-classd.c                     |  20 +-

Same goes for the atmel-classd changes.

>  8 files changed, 658 insertions(+), 19 deletions(-)
>  create mode 100644 drivers/clk/at91/clk-audio-pll-pad.c
>  create mode 100644 drivers/clk/at91/clk-audio-pll-pmc.c
>  create mode 100644 drivers/clk/at91/clk-audio-pll.c
> 

[...]

> diff --git a/drivers/clk/at91/clk-audio-pll-pmc.c b/drivers/clk/at91/clk-audio-pll-pmc.c
> new file mode 100644
> index 000000000000..208d0b59eb4e
> --- /dev/null
> +++ b/drivers/clk/at91/clk-audio-pll-pmc.c
> @@ -0,0 +1,175 @@
> +/*
> + *  Copyright (C) 2016 Atmel Corporation,
> + *                     Nicolas Ferre <nicolas.ferre@atmel.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + */
> +#include <linux/clk.h>
> +#include <linux/clk-provider.h>
> +#include <linux/clkdev.h>
> +#include <linux/clk/at91_pmc.h>
> +#include <linux/of.h>
> +#include <linux/mfd/syscon.h>
> +#include <linux/regmap.h>
> +
> +#include "pmc.h"
> +
> +/*
> + * DOC: PMC output for fractional PLL clock for audio
> + *
> + * Traits of this clock:
> + * enable - clk_enable writes qdpmc, and enables PMC output
> + * rate - rate is adjustable.
> + *        clk->rate = parent->rate / (qdpmc + 1)
> + * parent - fixed parent.  No clk_set_parent support
> + */
> +
> +#define AUDIO_PLL_FOUT_MIN		620000000
> +#define AUDIO_PLL_FOUT_MAX		700000000
> +#define AUDIO_PLL_REFERENCE_FOUT	660000000

These 3 macros are not unused, you can drop them.

  parent reply	other threads:[~2017-07-03 14:01 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-23  9:00 [PATCH 0/6] add support for Sama5d2 audio PLL and enable ClassD Quentin Schulz
2017-06-23  9:00 ` Quentin Schulz
2017-06-23  9:00 ` Quentin Schulz
     [not found] ` <20170623090059.8371-1-quentin.schulz-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-06-23  9:00   ` [PATCH 1/6] clk: at91: clk-generated: remove useless divisor loop Quentin Schulz
2017-06-23  9:00     ` Quentin Schulz
2017-06-23  9:00     ` Quentin Schulz
2017-07-03 13:58     ` Boris Brezillon
2017-07-03 13:58       ` Boris Brezillon
2017-07-03 13:58       ` Boris Brezillon
2017-06-23  9:00 ` [PATCH 2/6] clk: at91: add audio pll clock driver Quentin Schulz
2017-06-23  9:00   ` Quentin Schulz
2017-06-23  9:00   ` Quentin Schulz
2017-06-23 15:39   ` Alexandre Belloni
2017-06-23 15:39     ` Alexandre Belloni
2017-06-29 21:47   ` Rob Herring
2017-06-29 21:47     ` Rob Herring
2017-06-29 22:11     ` Alexandre Belloni
2017-06-29 22:11       ` Alexandre Belloni
2017-07-03 14:01   ` Boris Brezillon [this message]
2017-07-03 14:01     ` Boris Brezillon
2017-07-03 14:01     ` Boris Brezillon
2017-06-23  9:00 ` [PATCH 3/6] ARM: dts: at91: sama5d2: add classd nodes Quentin Schulz
2017-06-23  9:00   ` Quentin Schulz
2017-06-23  9:00   ` Quentin Schulz
2017-06-23  9:00 ` [PATCH 4/6] clk: at91: clk-generated: create function to find best_diff Quentin Schulz
2017-06-23  9:00   ` Quentin Schulz
2017-06-23  9:00   ` Quentin Schulz
2017-07-03 14:02   ` Boris Brezillon
2017-07-03 14:02     ` Boris Brezillon
2017-07-03 14:02     ` Boris Brezillon
2017-06-23  9:00 ` [PATCH 5/6] clk: at91: clk-generated: make gclk determine audio_pll rate Quentin Schulz
2017-06-23  9:00   ` Quentin Schulz
2017-07-03 14:19   ` Boris Brezillon
2017-07-03 14:19     ` Boris Brezillon
2017-07-03 14:19     ` Boris Brezillon
2017-06-23  9:00 ` [PATCH 6/6] ARM: dts: at91: sama5d2_xplained: add pin muxing and enable classd Quentin Schulz
2017-06-23  9:00   ` Quentin Schulz

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