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From: Corentin Labbe <clabbe.montjoie@gmail.com>
To: David Wu <david.wu@rock-chips.com>
Cc: davem@davemloft.net, heiko@sntech.de, andrew@lunn.ch,
	f.fainelli@gmail.com, robh+dt@kernel.org, mark.rutland@arm.com,
	catalin.marinas@arm.com, will.deacon@arm.com, olof@lixom.net,
	linux@armlinux.org.uk, arnd@arndb.de, huangtao@rock-chips.com,
	hwg@rock-chips.com, alexandre.torgue@st.com,
	devicetree@vger.kernel.org, netdev@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org,
	peppe.cavallaro@st.com, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 01/11] net: phy: Add rockchip phy driver support
Date: Wed, 2 Aug 2017 08:20:27 +0200	[thread overview]
Message-ID: <20170802062027.GA18196@Red> (raw)
In-Reply-To: <1501654546-17292-2-git-send-email-david.wu@rock-chips.com>

Hello I have some minor comment below

> +
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/mii.h>
> +#include <linux/ethtool.h>
> +#include <linux/phy.h>
> +#include <linux/netdevice.h>

in alphabetic order please

[...]
> +static int rockchip_init_tstmode(struct phy_device *phydev)
> +{
> +	int ret;
> +
> +	/* Enable access to Analog and DSP register banks */
> +	ret = phy_write(phydev, SMI_ADDR_TSTCNTL, 0x0400);
> +	if (ret)
> +		return ret;
> +
> +	ret = phy_write(phydev, SMI_ADDR_TSTCNTL, 0x0000);
> +	if (ret)
> +		return ret;
> +
> +	return phy_write(phydev, SMI_ADDR_TSTCNTL, 0x0400);
> +}
> +
> +static int rockchip_close_tstmode(struct phy_device *phydev)
> +{
> +	/* Back to basic register bank */
> +	return phy_write(phydev, SMI_ADDR_TSTCNTL, 0x0000);

The reuse of 0x0000 and 0x0400 seems to promote a define use

[...]
> +static struct phy_driver rockchip_phy_driver[] = {
> +{
> +	.phy_id			= 0x1234d400,
> +	.phy_id_mask		= 0xfffffff0,
> +	.name			= "Rockchip internal EPHY",
> +	.features		= (PHY_BASIC_FEATURES | SUPPORTED_Pause
> +				   | SUPPORTED_Asym_Pause),
> +	.flags			= PHY_IS_INTERNAL,
> +	.link_change_notify	= rockchip_link_change_notify,
> +	.soft_reset		= genphy_soft_reset,
> +	.config_init		= rockchip_internal_phy_config_init,
> +	.config_aneg		= rockchip_config_aneg,
> +	.read_status		= genphy_read_status,
> +	.suspend		= genphy_suspend,
> +	.resume			= rockchip_phy_resume,
> +},
> +};
> +
> +module_phy_driver(rockchip_phy_driver);
> +
> +static struct mdio_device_id __maybe_unused rockchip_phy_tbl[] = {
> +	{ 0x1234d400, 0xfffffff0 },

Same comment for phy_id, use a define

Regards
Corentin Labbe

WARNING: multiple messages have this Message-ID (diff)
From: clabbe.montjoie@gmail.com (Corentin Labbe)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 01/11] net: phy: Add rockchip phy driver support
Date: Wed, 2 Aug 2017 08:20:27 +0200	[thread overview]
Message-ID: <20170802062027.GA18196@Red> (raw)
In-Reply-To: <1501654546-17292-2-git-send-email-david.wu@rock-chips.com>

Hello I have some minor comment below

> +
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/mii.h>
> +#include <linux/ethtool.h>
> +#include <linux/phy.h>
> +#include <linux/netdevice.h>

in alphabetic order please

[...]
> +static int rockchip_init_tstmode(struct phy_device *phydev)
> +{
> +	int ret;
> +
> +	/* Enable access to Analog and DSP register banks */
> +	ret = phy_write(phydev, SMI_ADDR_TSTCNTL, 0x0400);
> +	if (ret)
> +		return ret;
> +
> +	ret = phy_write(phydev, SMI_ADDR_TSTCNTL, 0x0000);
> +	if (ret)
> +		return ret;
> +
> +	return phy_write(phydev, SMI_ADDR_TSTCNTL, 0x0400);
> +}
> +
> +static int rockchip_close_tstmode(struct phy_device *phydev)
> +{
> +	/* Back to basic register bank */
> +	return phy_write(phydev, SMI_ADDR_TSTCNTL, 0x0000);

The reuse of 0x0000 and 0x0400 seems to promote a define use

[...]
> +static struct phy_driver rockchip_phy_driver[] = {
> +{
> +	.phy_id			= 0x1234d400,
> +	.phy_id_mask		= 0xfffffff0,
> +	.name			= "Rockchip internal EPHY",
> +	.features		= (PHY_BASIC_FEATURES | SUPPORTED_Pause
> +				   | SUPPORTED_Asym_Pause),
> +	.flags			= PHY_IS_INTERNAL,
> +	.link_change_notify	= rockchip_link_change_notify,
> +	.soft_reset		= genphy_soft_reset,
> +	.config_init		= rockchip_internal_phy_config_init,
> +	.config_aneg		= rockchip_config_aneg,
> +	.read_status		= genphy_read_status,
> +	.suspend		= genphy_suspend,
> +	.resume			= rockchip_phy_resume,
> +},
> +};
> +
> +module_phy_driver(rockchip_phy_driver);
> +
> +static struct mdio_device_id __maybe_unused rockchip_phy_tbl[] = {
> +	{ 0x1234d400, 0xfffffff0 },

Same comment for phy_id, use a define

Regards
Corentin Labbe

  reply	other threads:[~2017-08-02  6:20 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-08-02  6:15 [PATCH v3 00/11] Add the internal phy support David Wu
2017-08-02  6:15 ` David Wu
2017-08-02  6:15 ` David Wu
2017-08-02  6:15 ` [PATCH v3 01/11] net: phy: Add rockchip phy driver support David Wu
2017-08-02  6:15   ` David Wu
2017-08-02  6:20   ` Corentin Labbe [this message]
2017-08-02  6:20     ` Corentin Labbe
2017-08-02 13:21   ` Andrew Lunn
2017-08-02 13:21     ` Andrew Lunn
2017-08-09  7:01     ` David.Wu
2017-08-09  7:01       ` David.Wu
2017-08-02  6:15 ` [PATCH v3 02/11] multi_v7_defconfig: Make rockchip phy built-in David Wu
2017-08-02  6:15   ` David Wu
2017-08-02  6:15 ` [PATCH v3 03/11] arm64: defconfig: Enable CONFIG_ROCKCHIP_PHY David Wu
2017-08-02  6:15   ` David Wu
2017-08-02  6:15 ` [PATCH v3 04/11] net: stmmac: dwmac-rk: Remove unwanted code for rk3328_set_to_rmii() David Wu
2017-08-02  6:15   ` David Wu
     [not found] ` <1501654546-17292-1-git-send-email-david.wu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2017-08-02  6:21   ` [PATCH v3 05/11] net: stmmac: dwmac-rk: Add internal phy support David Wu
2017-08-02  6:21     ` David Wu
2017-08-02  6:21     ` David Wu
     [not found]     ` <1501654888-19514-1-git-send-email-david.wu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2017-08-02 17:38       ` Florian Fainelli
2017-08-02 17:38         ` Florian Fainelli
2017-08-02 17:38         ` Florian Fainelli
2017-08-03 11:06         ` Chen-Yu Tsai
2017-08-03 11:06           ` Chen-Yu Tsai
2017-08-03 11:06           ` Chen-Yu Tsai
2017-08-09  8:45           ` Corentin Labbe
2017-08-09  8:45             ` Corentin Labbe
2017-08-09  9:38             ` David.Wu
2017-08-09  9:38               ` David.Wu
2017-08-09  9:38               ` David.Wu
     [not found]               ` <a9fae87c-9df5-a250-5bc1-230be4af15cd-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2017-08-10  2:40                 ` Chen-Yu Tsai
2017-08-10  2:40                   ` Chen-Yu Tsai
2017-08-10  2:40                   ` Chen-Yu Tsai
2017-08-10  7:48                   ` David.Wu
2017-08-10  7:48                     ` David.Wu
2017-08-10  7:48                     ` David.Wu
2017-08-09 22:42             ` Florian Fainelli
2017-08-09 22:42               ` Florian Fainelli
2017-08-03 14:02         ` David.Wu
2017-08-03 14:02           ` David.Wu
2017-08-02  6:23   ` [PATCH v3 07/11] net: stmmac: dwmac-rk: Add internal phy supprot for rk3328 David Wu
2017-08-02  6:23     ` David Wu
2017-08-02  6:23     ` David Wu
2017-08-02  6:23   ` [PATCH v3 08/11] ARM: dts: rk322x: Add support internal phy for gmac David Wu
2017-08-02  6:23     ` David Wu
2017-08-02  6:23     ` David Wu
2017-08-02  6:24   ` [PATCH v3 10/11] ARM64: dts: rockchip: Add gmac2phy node support for rk3328 David Wu
2017-08-02  6:24     ` David Wu
2017-08-02  6:24     ` David Wu
     [not found]     ` <1501655097-21054-1-git-send-email-david.wu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2017-08-02 11:49       ` Sergei Shtylyov
2017-08-02 11:49         ` Sergei Shtylyov
2017-08-02 11:49         ` Sergei Shtylyov
2017-08-02 17:40     ` Florian Fainelli
2017-08-02 17:40       ` Florian Fainelli
2017-08-02  6:26   ` [PATCH v3 11/11] ARM64: dts: rockchip: Enable gmac2phy for rk3328-evb David Wu
2017-08-02  6:26     ` David Wu
2017-08-02  6:26     ` David Wu
2017-08-02  6:22 ` [PATCH v3 06/11] net: stmmac: dwmac-rk: Add internal phy support for rk3228 David Wu
2017-08-02  6:22   ` David Wu
2017-08-02  6:24 ` [PATCH v3 09/11] ARM: dts: rk3228-evb: Enable the internal phy for gmac David Wu
2017-08-02  6:24   ` David Wu

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