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From: Ingo Molnar <mingo@kernel.org>
To: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>,
	Andrew Morton <akpm@linux-foundation.org>,
	x86@kernel.org, Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
	Andi Kleen <ak@linux.intel.com>,
	Dave Hansen <dave.hansen@intel.com>,
	Andy Lutomirski <luto@amacapital.net>,
	Michal Hocko <mhocko@kernel.org>,
	linux-mm@kvack.org, linux-kernel@vger.kernel.org,
	Andy Lutomirski <luto@kernel.org>, Borislav Petkov <bp@alien8.de>,
	Josh Poimboeuf <jpoimboe@redhat.com>
Subject: Re: [PATCHv4 09/14] x86/mm: Handle boot-time paging mode switching at early boot
Date: Thu, 17 Aug 2017 11:05:05 +0200	[thread overview]
Message-ID: <20170817090504.weaflrqpi5qplinr@gmail.com> (raw)
In-Reply-To: <20170808125415.78842-10-kirill.shutemov@linux.intel.com>


* Kirill A. Shutemov <kirill.shutemov@linux.intel.com> wrote:

>  	/* Prepare to add new identity pagetables on demand. */
> diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S
> index daf8936d0628..077e8b45784c 100644
> --- a/arch/x86/entry/entry_64.S
> +++ b/arch/x86/entry/entry_64.S
> @@ -273,8 +273,20 @@ return_from_SYSCALL_64:
>  	 * Change top bits to match most significant bit (47th or 56th bit
>  	 * depending on paging mode) in the address.
>  	 */
> +#ifdef CONFIG_X86_5LEVEL
> +	testl	$1, p4d_folded(%rip)
> +	jnz	1f
> +	shl	$(64 - 57), %rcx
> +	sar	$(64 - 57), %rcx
> +	jmp	2f
> +1:
> +	shl	$(64 - 48), %rcx
> +	sar	$(64 - 48), %rcx
> +2:
> +#else
>  	shl	$(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
>  	sar	$(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
> +#endif

So I really, really hate this change, as it slows down everything, not just LA57 
hardware, and slows down a critical system call hot path. (I expect enterprise 
distros to enable CONFIG_X86_5LEVEL.)

Could this use alternatives patching instead?

Thanks,

	Ingo

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WARNING: multiple messages have this Message-ID (diff)
From: Ingo Molnar <mingo@kernel.org>
To: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>,
	Andrew Morton <akpm@linux-foundation.org>,
	x86@kernel.org, Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
	Andi Kleen <ak@linux.intel.com>,
	Dave Hansen <dave.hansen@intel.com>,
	Andy Lutomirski <luto@amacapital.net>,
	Michal Hocko <mhocko@kernel.org>,
	linux-mm@kvack.org, linux-kernel@vger.kernel.org,
	Andy Lutomirski <luto@kernel.org>, Borislav Petkov <bp@alien8.de>,
	Josh Poimboeuf <jpoimboe@redhat.com>
Subject: Re: [PATCHv4 09/14] x86/mm: Handle boot-time paging mode switching at early boot
Date: Thu, 17 Aug 2017 11:05:05 +0200	[thread overview]
Message-ID: <20170817090504.weaflrqpi5qplinr@gmail.com> (raw)
In-Reply-To: <20170808125415.78842-10-kirill.shutemov@linux.intel.com>


* Kirill A. Shutemov <kirill.shutemov@linux.intel.com> wrote:

>  	/* Prepare to add new identity pagetables on demand. */
> diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S
> index daf8936d0628..077e8b45784c 100644
> --- a/arch/x86/entry/entry_64.S
> +++ b/arch/x86/entry/entry_64.S
> @@ -273,8 +273,20 @@ return_from_SYSCALL_64:
>  	 * Change top bits to match most significant bit (47th or 56th bit
>  	 * depending on paging mode) in the address.
>  	 */
> +#ifdef CONFIG_X86_5LEVEL
> +	testl	$1, p4d_folded(%rip)
> +	jnz	1f
> +	shl	$(64 - 57), %rcx
> +	sar	$(64 - 57), %rcx
> +	jmp	2f
> +1:
> +	shl	$(64 - 48), %rcx
> +	sar	$(64 - 48), %rcx
> +2:
> +#else
>  	shl	$(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
>  	sar	$(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
> +#endif

So I really, really hate this change, as it slows down everything, not just LA57 
hardware, and slows down a critical system call hot path. (I expect enterprise 
distros to enable CONFIG_X86_5LEVEL.)

Could this use alternatives patching instead?

Thanks,

	Ingo

  reply	other threads:[~2017-08-17  9:05 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-08-08 12:54 [PATCHv4 00/14] Boot-time switching between 4- and 5-level paging Kirill A. Shutemov
2017-08-08 12:54 ` Kirill A. Shutemov
2017-08-08 12:54 ` [PATCHv4 01/14] mm/sparsemem: Allocate mem_section at runtime for SPARSEMEM_EXTREME Kirill A. Shutemov
2017-08-08 12:54   ` Kirill A. Shutemov
2017-08-14 14:29   ` Kirill A. Shutemov
2017-08-14 14:29     ` Kirill A. Shutemov
2017-08-08 12:54 ` [PATCHv4 02/14] mm/zsmalloc: Prepare to variable MAX_PHYSMEM_BITS Kirill A. Shutemov
2017-08-08 12:54   ` Kirill A. Shutemov
2017-08-08 12:54 ` [PATCHv4 03/14] x86/kasan: Use the same shadow offset for 4- and 5-level paging Kirill A. Shutemov
2017-08-08 12:54   ` Kirill A. Shutemov
2017-08-08 12:54 ` [PATCHv4 04/14] x86/xen: Provide pre-built page tables only for XEN_PV and XEN_PVH Kirill A. Shutemov
2017-08-08 12:54   ` Kirill A. Shutemov
2017-08-08 12:54 ` [PATCHv4 05/14] x86/xen: Drop 5-level paging support code from XEN_PV code Kirill A. Shutemov
2017-08-08 12:54   ` Kirill A. Shutemov
2017-08-09 11:54   ` Juergen Gross
2017-08-09 11:54     ` Juergen Gross
2017-08-08 12:54 ` [PATCHv4 06/14] x86/boot/compressed/64: Detect and handle 5-level paging at boot-time Kirill A. Shutemov
2017-08-08 12:54   ` Kirill A. Shutemov
2017-08-08 12:54 ` [PATCHv4 07/14] x86/mm: Make virtual memory layout movable for CONFIG_X86_5LEVEL Kirill A. Shutemov
2017-08-08 12:54   ` Kirill A. Shutemov
2017-08-08 12:54 ` [PATCHv4 08/14] x86/mm: Make PGDIR_SHIFT and PTRS_PER_P4D variable Kirill A. Shutemov
2017-08-08 12:54   ` Kirill A. Shutemov
2017-08-17  9:00   ` Ingo Molnar
2017-08-17  9:00     ` Ingo Molnar
2017-08-17 10:54     ` Kirill A. Shutemov
2017-08-17 10:54       ` Kirill A. Shutemov
2017-08-17 11:10       ` Ingo Molnar
2017-08-17 11:10         ` Ingo Molnar
2017-08-21 15:23         ` Kirill A. Shutemov
2017-08-21 15:23           ` Kirill A. Shutemov
2017-08-08 12:54 ` [PATCHv4 09/14] x86/mm: Handle boot-time paging mode switching at early boot Kirill A. Shutemov
2017-08-08 12:54   ` Kirill A. Shutemov
2017-08-17  9:05   ` Ingo Molnar [this message]
2017-08-17  9:05     ` Ingo Molnar
2017-08-17  9:10   ` Ingo Molnar
2017-08-17  9:10     ` Ingo Molnar
2017-08-08 12:54 ` [PATCHv4 10/14] x86/mm: Fold p4d page table layer at runtime Kirill A. Shutemov
2017-08-08 12:54   ` Kirill A. Shutemov
2017-08-08 12:54 ` [PATCHv4 11/14] x86/mm: Replace compile-time checks for 5-level with runtime-time Kirill A. Shutemov
2017-08-08 12:54   ` Kirill A. Shutemov
2017-08-17  9:17   ` Ingo Molnar
2017-08-17  9:17     ` Ingo Molnar
2017-08-08 12:54 ` [PATCHv4 12/14] x86/mm: Allow to boot without la57 if CONFIG_X86_5LEVEL=y Kirill A. Shutemov
2017-08-08 12:54   ` Kirill A. Shutemov
2017-08-08 12:54 ` [PATCHv4 13/14] x86/xen: Allow XEN_PV and XEN_PVH to be enabled with X86_5LEVEL Kirill A. Shutemov
2017-08-08 12:54   ` Kirill A. Shutemov
2017-08-09 11:50   ` Juergen Gross
2017-08-09 11:50     ` Juergen Gross
2017-08-08 12:54 ` [PATCHv4 14/14] x86/mm: Offset boot-time paging mode switching cost Kirill A. Shutemov
2017-08-08 12:54   ` Kirill A. Shutemov
2017-08-17  9:21   ` Ingo Molnar
2017-08-17  9:21     ` Ingo Molnar
2017-08-14 14:30 ` [PATCHv4 00/14] Boot-time switching between 4- and 5-level paging Kirill A. Shutemov
2017-08-14 14:30   ` Kirill A. Shutemov

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