From: Ingo Molnar <mingo@kernel.org>
To: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>,
Andrew Morton <akpm@linux-foundation.org>,
x86@kernel.org, Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
Andi Kleen <ak@linux.intel.com>,
Dave Hansen <dave.hansen@intel.com>,
Andy Lutomirski <luto@amacapital.net>,
Michal Hocko <mhocko@kernel.org>,
linux-mm@kvack.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCHv4 14/14] x86/mm: Offset boot-time paging mode switching cost
Date: Thu, 17 Aug 2017 11:21:50 +0200 [thread overview]
Message-ID: <20170817092150.imggg3pjguagvudd@gmail.com> (raw)
In-Reply-To: <20170808125415.78842-15-kirill.shutemov@linux.intel.com>
* Kirill A. Shutemov <kirill.shutemov@linux.intel.com> wrote:
> By this point we have functioning boot-time switching between 4- and
> 5-level paging mode. But naive approach comes with cost.
>
> Numbers below are for kernel build, allmodconfig, 5 times.
>
> CONFIG_X86_5LEVEL=n:
>
> Performance counter stats for 'sh -c make -j100 -B -k >/dev/null' (5 runs):
>
> 17308719.892691 task-clock:u (msec) # 26.772 CPUs utilized ( +- 0.11% )
> 0 context-switches:u # 0.000 K/sec
> 0 cpu-migrations:u # 0.000 K/sec
> 331,993,164 page-faults:u # 0.019 M/sec ( +- 0.01% )
> 43,614,978,867,455 cycles:u # 2.520 GHz ( +- 0.01% )
> 39,371,534,575,126 stalled-cycles-frontend:u # 90.27% frontend cycles idle ( +- 0.09% )
> 28,363,350,152,428 instructions:u # 0.65 insn per cycle
> # 1.39 stalled cycles per insn ( +- 0.00% )
> 6,316,784,066,413 branches:u # 364.948 M/sec ( +- 0.00% )
> 250,808,144,781 branch-misses:u # 3.97% of all branches ( +- 0.01% )
>
> 646.531974142 seconds time elapsed ( +- 1.15% )
>
> CONFIG_X86_5LEVEL=y:
>
> Performance counter stats for 'sh -c make -j100 -B -k >/dev/null' (5 runs):
>
> 17411536.780625 task-clock:u (msec) # 26.426 CPUs utilized ( +- 0.10% )
> 0 context-switches:u # 0.000 K/sec
> 0 cpu-migrations:u # 0.000 K/sec
> 331,868,663 page-faults:u # 0.019 M/sec ( +- 0.01% )
> 43,865,909,056,301 cycles:u # 2.519 GHz ( +- 0.01% )
> 39,740,130,365,581 stalled-cycles-frontend:u # 90.59% frontend cycles idle ( +- 0.05% )
> 28,363,358,997,959 instructions:u # 0.65 insn per cycle
> # 1.40 stalled cycles per insn ( +- 0.00% )
> 6,316,784,937,460 branches:u # 362.793 M/sec ( +- 0.00% )
> 251,531,919,485 branch-misses:u # 3.98% of all branches ( +- 0.00% )
>
> 658.886307752 seconds time elapsed ( +- 0.92% )
> The patch tries to fix the performance regression by using
>
> !cpu_feature_enabled(X86_FEATURE_LA57) instead of p4d_folded in all hot
> code paths. These will statically patch the target code for additional
> performance.
>
> Also, I had to re-write number of static inline helpers as macros.
> It was needed to break header dependency loop between cpufeature.h and
> pgtable_types.h.
>
> CONFIG_X86_5LEVEL=y + the patch:
>
> Performance counter stats for 'sh -c make -j100 -B -k >/dev/null' (5 runs):
>
> 17381990.268506 task-clock:u (msec) # 26.907 CPUs utilized ( +- 0.19% )
> 0 context-switches:u # 0.000 K/sec
> 0 cpu-migrations:u # 0.000 K/sec
> 331,862,625 page-faults:u # 0.019 M/sec ( +- 0.01% )
> 43,697,726,320,051 cycles:u # 2.514 GHz ( +- 0.03% )
> 39,480,408,690,401 stalled-cycles-frontend:u # 90.35% frontend cycles idle ( +- 0.05% )
> 28,363,394,221,388 instructions:u # 0.65 insn per cycle
> # 1.39 stalled cycles per insn ( +- 0.00% )
> 6,316,794,985,573 branches:u # 363.410 M/sec ( +- 0.00% )
> 251,013,232,547 branch-misses:u # 3.97% of all branches ( +- 0.01% )
>
> 645.991174661 seconds time elapsed ( +- 1.19% )
Ok - these measurements are very nice and address many of my worries about earlier
parts of the series.
Anyway, please split this patch up some more as well (as any of the optimizations
could regress by themselves), and my renaming suggestions still stand as well.
> @@ -11,6 +11,11 @@
> #undef CONFIG_PARAVIRT_SPINLOCKS
> #undef CONFIG_KASAN
>
> +#ifdef CONFIG_X86_5LEVEL
> +/* cpu_feature_enabled() cannot be used that early */
> +#define p4d_folded __p4d_folded
> +#endif
> +
> #include <linux/linkage.h>
> #include <linux/screen_info.h>
> #include <linux/elf.h>
> diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S
> index 077e8b45784c..702a1feb4991 100644
> --- a/arch/x86/entry/entry_64.S
> +++ b/arch/x86/entry/entry_64.S
> @@ -274,15 +274,8 @@ return_from_SYSCALL_64:
> * depending on paging mode) in the address.
> */
> #ifdef CONFIG_X86_5LEVEL
> - testl $1, p4d_folded(%rip)
> - jnz 1f
> - shl $(64 - 57), %rcx
> - sar $(64 - 57), %rcx
> - jmp 2f
> -1:
> - shl $(64 - 48), %rcx
> - sar $(64 - 48), %rcx
> -2:
> + ALTERNATIVE "shl $(64 - 48), %rcx; sar $(64 - 48), %rcx", \
> + "shl $(64 - 57), %rcx; sar $(64 - 57), %rcx", X86_FEATURE_LA57
Ignore my earlier suggestion to use alternatives, you already implemented it!
This is what I get for replying to a patch series in chronological order. ;-)
I suspect the syscall overhead was the main reason for the performance regression.
Thanks,
Ingo
--
To unsubscribe, send a message with 'unsubscribe linux-mm' in
the body to majordomo@kvack.org. For more info on Linux MM,
see: http://www.linux-mm.org/ .
Don't email: <a href=mailto:"dont@kvack.org"> email@kvack.org </a>
WARNING: multiple messages have this Message-ID (diff)
From: Ingo Molnar <mingo@kernel.org>
To: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>,
Andrew Morton <akpm@linux-foundation.org>,
x86@kernel.org, Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
Andi Kleen <ak@linux.intel.com>,
Dave Hansen <dave.hansen@intel.com>,
Andy Lutomirski <luto@amacapital.net>,
Michal Hocko <mhocko@kernel.org>,
linux-mm@kvack.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCHv4 14/14] x86/mm: Offset boot-time paging mode switching cost
Date: Thu, 17 Aug 2017 11:21:50 +0200 [thread overview]
Message-ID: <20170817092150.imggg3pjguagvudd@gmail.com> (raw)
In-Reply-To: <20170808125415.78842-15-kirill.shutemov@linux.intel.com>
* Kirill A. Shutemov <kirill.shutemov@linux.intel.com> wrote:
> By this point we have functioning boot-time switching between 4- and
> 5-level paging mode. But naive approach comes with cost.
>
> Numbers below are for kernel build, allmodconfig, 5 times.
>
> CONFIG_X86_5LEVEL=n:
>
> Performance counter stats for 'sh -c make -j100 -B -k >/dev/null' (5 runs):
>
> 17308719.892691 task-clock:u (msec) # 26.772 CPUs utilized ( +- 0.11% )
> 0 context-switches:u # 0.000 K/sec
> 0 cpu-migrations:u # 0.000 K/sec
> 331,993,164 page-faults:u # 0.019 M/sec ( +- 0.01% )
> 43,614,978,867,455 cycles:u # 2.520 GHz ( +- 0.01% )
> 39,371,534,575,126 stalled-cycles-frontend:u # 90.27% frontend cycles idle ( +- 0.09% )
> 28,363,350,152,428 instructions:u # 0.65 insn per cycle
> # 1.39 stalled cycles per insn ( +- 0.00% )
> 6,316,784,066,413 branches:u # 364.948 M/sec ( +- 0.00% )
> 250,808,144,781 branch-misses:u # 3.97% of all branches ( +- 0.01% )
>
> 646.531974142 seconds time elapsed ( +- 1.15% )
>
> CONFIG_X86_5LEVEL=y:
>
> Performance counter stats for 'sh -c make -j100 -B -k >/dev/null' (5 runs):
>
> 17411536.780625 task-clock:u (msec) # 26.426 CPUs utilized ( +- 0.10% )
> 0 context-switches:u # 0.000 K/sec
> 0 cpu-migrations:u # 0.000 K/sec
> 331,868,663 page-faults:u # 0.019 M/sec ( +- 0.01% )
> 43,865,909,056,301 cycles:u # 2.519 GHz ( +- 0.01% )
> 39,740,130,365,581 stalled-cycles-frontend:u # 90.59% frontend cycles idle ( +- 0.05% )
> 28,363,358,997,959 instructions:u # 0.65 insn per cycle
> # 1.40 stalled cycles per insn ( +- 0.00% )
> 6,316,784,937,460 branches:u # 362.793 M/sec ( +- 0.00% )
> 251,531,919,485 branch-misses:u # 3.98% of all branches ( +- 0.00% )
>
> 658.886307752 seconds time elapsed ( +- 0.92% )
> The patch tries to fix the performance regression by using
>
> !cpu_feature_enabled(X86_FEATURE_LA57) instead of p4d_folded in all hot
> code paths. These will statically patch the target code for additional
> performance.
>
> Also, I had to re-write number of static inline helpers as macros.
> It was needed to break header dependency loop between cpufeature.h and
> pgtable_types.h.
>
> CONFIG_X86_5LEVEL=y + the patch:
>
> Performance counter stats for 'sh -c make -j100 -B -k >/dev/null' (5 runs):
>
> 17381990.268506 task-clock:u (msec) # 26.907 CPUs utilized ( +- 0.19% )
> 0 context-switches:u # 0.000 K/sec
> 0 cpu-migrations:u # 0.000 K/sec
> 331,862,625 page-faults:u # 0.019 M/sec ( +- 0.01% )
> 43,697,726,320,051 cycles:u # 2.514 GHz ( +- 0.03% )
> 39,480,408,690,401 stalled-cycles-frontend:u # 90.35% frontend cycles idle ( +- 0.05% )
> 28,363,394,221,388 instructions:u # 0.65 insn per cycle
> # 1.39 stalled cycles per insn ( +- 0.00% )
> 6,316,794,985,573 branches:u # 363.410 M/sec ( +- 0.00% )
> 251,013,232,547 branch-misses:u # 3.97% of all branches ( +- 0.01% )
>
> 645.991174661 seconds time elapsed ( +- 1.19% )
Ok - these measurements are very nice and address many of my worries about earlier
parts of the series.
Anyway, please split this patch up some more as well (as any of the optimizations
could regress by themselves), and my renaming suggestions still stand as well.
> @@ -11,6 +11,11 @@
> #undef CONFIG_PARAVIRT_SPINLOCKS
> #undef CONFIG_KASAN
>
> +#ifdef CONFIG_X86_5LEVEL
> +/* cpu_feature_enabled() cannot be used that early */
> +#define p4d_folded __p4d_folded
> +#endif
> +
> #include <linux/linkage.h>
> #include <linux/screen_info.h>
> #include <linux/elf.h>
> diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S
> index 077e8b45784c..702a1feb4991 100644
> --- a/arch/x86/entry/entry_64.S
> +++ b/arch/x86/entry/entry_64.S
> @@ -274,15 +274,8 @@ return_from_SYSCALL_64:
> * depending on paging mode) in the address.
> */
> #ifdef CONFIG_X86_5LEVEL
> - testl $1, p4d_folded(%rip)
> - jnz 1f
> - shl $(64 - 57), %rcx
> - sar $(64 - 57), %rcx
> - jmp 2f
> -1:
> - shl $(64 - 48), %rcx
> - sar $(64 - 48), %rcx
> -2:
> + ALTERNATIVE "shl $(64 - 48), %rcx; sar $(64 - 48), %rcx", \
> + "shl $(64 - 57), %rcx; sar $(64 - 57), %rcx", X86_FEATURE_LA57
Ignore my earlier suggestion to use alternatives, you already implemented it!
This is what I get for replying to a patch series in chronological order. ;-)
I suspect the syscall overhead was the main reason for the performance regression.
Thanks,
Ingo
next prev parent reply other threads:[~2017-08-17 9:21 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-08 12:54 [PATCHv4 00/14] Boot-time switching between 4- and 5-level paging Kirill A. Shutemov
2017-08-08 12:54 ` Kirill A. Shutemov
2017-08-08 12:54 ` [PATCHv4 01/14] mm/sparsemem: Allocate mem_section at runtime for SPARSEMEM_EXTREME Kirill A. Shutemov
2017-08-08 12:54 ` Kirill A. Shutemov
2017-08-14 14:29 ` Kirill A. Shutemov
2017-08-14 14:29 ` Kirill A. Shutemov
2017-08-08 12:54 ` [PATCHv4 02/14] mm/zsmalloc: Prepare to variable MAX_PHYSMEM_BITS Kirill A. Shutemov
2017-08-08 12:54 ` Kirill A. Shutemov
2017-08-08 12:54 ` [PATCHv4 03/14] x86/kasan: Use the same shadow offset for 4- and 5-level paging Kirill A. Shutemov
2017-08-08 12:54 ` Kirill A. Shutemov
2017-08-08 12:54 ` [PATCHv4 04/14] x86/xen: Provide pre-built page tables only for XEN_PV and XEN_PVH Kirill A. Shutemov
2017-08-08 12:54 ` Kirill A. Shutemov
2017-08-08 12:54 ` [PATCHv4 05/14] x86/xen: Drop 5-level paging support code from XEN_PV code Kirill A. Shutemov
2017-08-08 12:54 ` Kirill A. Shutemov
2017-08-09 11:54 ` Juergen Gross
2017-08-09 11:54 ` Juergen Gross
2017-08-08 12:54 ` [PATCHv4 06/14] x86/boot/compressed/64: Detect and handle 5-level paging at boot-time Kirill A. Shutemov
2017-08-08 12:54 ` Kirill A. Shutemov
2017-08-08 12:54 ` [PATCHv4 07/14] x86/mm: Make virtual memory layout movable for CONFIG_X86_5LEVEL Kirill A. Shutemov
2017-08-08 12:54 ` Kirill A. Shutemov
2017-08-08 12:54 ` [PATCHv4 08/14] x86/mm: Make PGDIR_SHIFT and PTRS_PER_P4D variable Kirill A. Shutemov
2017-08-08 12:54 ` Kirill A. Shutemov
2017-08-17 9:00 ` Ingo Molnar
2017-08-17 9:00 ` Ingo Molnar
2017-08-17 10:54 ` Kirill A. Shutemov
2017-08-17 10:54 ` Kirill A. Shutemov
2017-08-17 11:10 ` Ingo Molnar
2017-08-17 11:10 ` Ingo Molnar
2017-08-21 15:23 ` Kirill A. Shutemov
2017-08-21 15:23 ` Kirill A. Shutemov
2017-08-08 12:54 ` [PATCHv4 09/14] x86/mm: Handle boot-time paging mode switching at early boot Kirill A. Shutemov
2017-08-08 12:54 ` Kirill A. Shutemov
2017-08-17 9:05 ` Ingo Molnar
2017-08-17 9:05 ` Ingo Molnar
2017-08-17 9:10 ` Ingo Molnar
2017-08-17 9:10 ` Ingo Molnar
2017-08-08 12:54 ` [PATCHv4 10/14] x86/mm: Fold p4d page table layer at runtime Kirill A. Shutemov
2017-08-08 12:54 ` Kirill A. Shutemov
2017-08-08 12:54 ` [PATCHv4 11/14] x86/mm: Replace compile-time checks for 5-level with runtime-time Kirill A. Shutemov
2017-08-08 12:54 ` Kirill A. Shutemov
2017-08-17 9:17 ` Ingo Molnar
2017-08-17 9:17 ` Ingo Molnar
2017-08-08 12:54 ` [PATCHv4 12/14] x86/mm: Allow to boot without la57 if CONFIG_X86_5LEVEL=y Kirill A. Shutemov
2017-08-08 12:54 ` Kirill A. Shutemov
2017-08-08 12:54 ` [PATCHv4 13/14] x86/xen: Allow XEN_PV and XEN_PVH to be enabled with X86_5LEVEL Kirill A. Shutemov
2017-08-08 12:54 ` Kirill A. Shutemov
2017-08-09 11:50 ` Juergen Gross
2017-08-09 11:50 ` Juergen Gross
2017-08-08 12:54 ` [PATCHv4 14/14] x86/mm: Offset boot-time paging mode switching cost Kirill A. Shutemov
2017-08-08 12:54 ` Kirill A. Shutemov
2017-08-17 9:21 ` Ingo Molnar [this message]
2017-08-17 9:21 ` Ingo Molnar
2017-08-14 14:30 ` [PATCHv4 00/14] Boot-time switching between 4- and 5-level paging Kirill A. Shutemov
2017-08-14 14:30 ` Kirill A. Shutemov
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20170817092150.imggg3pjguagvudd@gmail.com \
--to=mingo@kernel.org \
--cc=ak@linux.intel.com \
--cc=akpm@linux-foundation.org \
--cc=dave.hansen@intel.com \
--cc=hpa@zytor.com \
--cc=kirill.shutemov@linux.intel.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mm@kvack.org \
--cc=luto@amacapital.net \
--cc=mhocko@kernel.org \
--cc=mingo@redhat.com \
--cc=tglx@linutronix.de \
--cc=torvalds@linux-foundation.org \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.