From: Pranith Kumar <bobby.prani@gmail.com>
To: alex.bennee@linaro.org, Peter Maydell <peter.maydell@linaro.org>,
qemu-arm@nongnu.org (open list:ARM),
qemu-devel@nongnu.org (open list:All patches CC here)
Cc: qemu-devel@nongnu.org, rth@twiddle.net, pbonzini@redhat.com
Subject: [PATCH 1/5] target/arm: Remove stale comment
Date: Tue, 29 Aug 2017 02:33:09 -0400 [thread overview]
Message-ID: <20170829063313.10237-1-bobby.prani@gmail.com> (raw)
Update the comment which is not true since MTTCG.
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Pranith Kumar <bobby.prani@gmail.com>
---
target/arm/translate-a64.c | 4 ----
1 file changed, 4 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 2200e25be0..f42b155d7d 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -2012,10 +2012,6 @@ static void disas_ldst_excl(DisasContext *s, uint32_t insn)
}
tcg_addr = read_cpu_reg_sp(s, rn, 1);
- /* Note that since TCG is single threaded load-acquire/store-release
- * semantics require no extra if (is_lasr) { ... } handling.
- */
-
if (is_excl) {
if (!is_store) {
s->is_ldex = true;
--
2.13.0
WARNING: multiple messages have this Message-ID (diff)
From: Pranith Kumar <bobby.prani@gmail.com>
To: alex.bennee@linaro.org, Peter Maydell <peter.maydell@linaro.org>,
"open list:ARM" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: rth@twiddle.net, pbonzini@redhat.com
Subject: [Qemu-devel] [PATCH 1/5] target/arm: Remove stale comment
Date: Tue, 29 Aug 2017 02:33:09 -0400 [thread overview]
Message-ID: <20170829063313.10237-1-bobby.prani@gmail.com> (raw)
Update the comment which is not true since MTTCG.
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Pranith Kumar <bobby.prani@gmail.com>
---
target/arm/translate-a64.c | 4 ----
1 file changed, 4 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 2200e25be0..f42b155d7d 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -2012,10 +2012,6 @@ static void disas_ldst_excl(DisasContext *s, uint32_t insn)
}
tcg_addr = read_cpu_reg_sp(s, rn, 1);
- /* Note that since TCG is single threaded load-acquire/store-release
- * semantics require no extra if (is_lasr) { ... } handling.
- */
-
if (is_excl) {
if (!is_store) {
s->is_ldex = true;
--
2.13.0
next reply other threads:[~2017-08-29 6:33 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-29 6:33 Pranith Kumar [this message]
2017-08-29 6:33 ` [Qemu-devel] [PATCH 1/5] target/arm: Remove stale comment Pranith Kumar
2017-08-29 6:33 ` [Qemu-devel] [RFC v3 PATCH 2/5] cpus-common: Cache allocated work items Pranith Kumar
2017-09-05 12:28 ` Alex Bennée
2017-08-29 6:33 ` [RFC v3 PATCH 3/5] mttcg: Add tcg target default memory ordering Pranith Kumar
2017-08-29 6:33 ` [Qemu-devel] " Pranith Kumar
2017-08-29 14:51 ` Richard Henderson
2017-08-29 14:51 ` [Qemu-devel] " Richard Henderson
2017-08-29 6:33 ` [Qemu-devel] [RFC v3 PATCH 4/5] mttcg: Implement implicit ordering semantics Pranith Kumar
2017-08-29 14:53 ` Richard Henderson
2017-09-02 1:44 ` Emilio G. Cota
2017-08-29 6:33 ` [RFC v3 PATCH 5/5] tcg/softmmu: Increase size of TLB caches Pranith Kumar
2017-08-29 6:33 ` [Qemu-devel] " Pranith Kumar
2017-08-29 15:01 ` Richard Henderson
2017-08-29 15:01 ` [Qemu-devel] " Richard Henderson
2017-08-29 16:23 ` Pranith Kumar
2017-08-29 16:23 ` [Qemu-devel] " Pranith Kumar
2017-08-29 15:03 ` Richard Henderson
2017-08-29 15:03 ` [Qemu-devel] " Richard Henderson
2017-09-05 12:02 ` [PATCH 1/5] target/arm: Remove stale comment Alex Bennée
2017-09-05 12:02 ` [Qemu-devel] " Alex Bennée
2017-09-06 0:35 ` Pranith Kumar
2017-09-06 0:35 ` [Qemu-devel] " Pranith Kumar
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