From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 4/8] drm/i915: Enable voltage swing before enabling DDI_BUF_CTL.
Date: Wed, 30 Aug 2017 17:17:22 +0300 [thread overview]
Message-ID: <20170830141722.GF4914@intel.com> (raw)
In-Reply-To: <20170829232230.23051-4-rodrigo.vivi@intel.com>
On Tue, Aug 29, 2017 at 04:22:26PM -0700, Rodrigo Vivi wrote:
> Sequences for DisplayPort asks us to
> " Configure voltage swing and related IO settings.
> Refer to DDI Buffer section."
>
> before "Configure and enable DDI_BUF_CTL"
>
> On BXT and CNL this means to execute the ddi vswing sequences.
>
> At this point these sequences calls are getting duplicated for DP
> because they are all called from DP link trainning sequences.
>
> However this patch is not yet removing it before a futher discussion
> since spec also allows that during link training without disabling
> anything:
>
> "
> Notes
> Changing voltage swing during link training:
> Change the swing setting following the DDI Buffer section.
> The port does not need to be disabled.
> "
>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Imre is out atm so we didn't get his opinion, but I'm fine with this so
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_ddi.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index eedd29487e0b..506782c1a62a 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -2136,6 +2136,7 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
> struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> enum port port = intel_ddi_get_encoder_port(encoder);
> struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base);
> + uint32_t level = intel_ddi_dp_level(intel_dp);
>
> WARN_ON(link_mst && (port == PORT_A || port == PORT_E));
>
> @@ -2148,7 +2149,11 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
>
> intel_display_power_get(dev_priv, dig_port->ddi_io_power_domain);
>
> - if (!IS_GEN9_LP(dev_priv) && !IS_CANNONLAKE(dev_priv))
> + if (IS_CANNONLAKE(dev_priv))
> + cnl_ddi_vswing_sequence(encoder, level);
> + else if (IS_GEN9_LP(dev_priv))
> + bxt_ddi_vswing_sequence(dev_priv, level, port, encoder->type);
> + else
> intel_prepare_dp_ddi_buffers(encoder);
>
> intel_ddi_init_dp_buf_reg(encoder);
> --
> 2.13.2
--
Ville Syrjälä
Intel OTC
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next prev parent reply other threads:[~2017-08-30 14:17 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-29 23:22 [PATCH 1/8] drm/i915: Introduce intel_ddi_dp_level Rodrigo Vivi
2017-08-29 23:22 ` [PATCH 2/8] drm/i915: decouple gen9 and gen10 dp signal levels Rodrigo Vivi
2017-08-30 14:06 ` Ville Syrjälä
2017-08-29 23:22 ` [PATCH 3/8] drm/i915: Align vswing sequences with old ddi buffer registers Rodrigo Vivi
2017-08-30 14:16 ` Ville Syrjälä
2017-08-29 23:22 ` [PATCH 4/8] drm/i915: Enable voltage swing before enabling DDI_BUF_CTL Rodrigo Vivi
2017-08-30 14:17 ` Ville Syrjälä [this message]
2017-08-29 23:22 ` [PATCH 5/8] drm/i915/cnl: Move voltage check into ddi buf trans functions Rodrigo Vivi
2017-08-30 14:11 ` Ville Syrjälä
2017-08-29 23:22 ` [PATCH 6/8] drm/i915/cnl: Move ddi buf trans related functions up Rodrigo Vivi
2017-08-30 14:17 ` Ville Syrjälä
2017-08-29 23:22 ` [PATCH 7/8] drm/i915/cnl: Fix DDI hdmi level selection Rodrigo Vivi
2017-08-30 14:13 ` Ville Syrjälä
2017-08-29 23:22 ` [PATCH 8/8] drm/i915/cnl: Fix DP max voltage Rodrigo Vivi
2017-08-30 14:14 ` Ville Syrjälä
2017-08-30 14:20 ` Ville Syrjälä
2017-08-30 0:35 ` ✓ Fi.CI.BAT: success for series starting with [1/8] drm/i915: Introduce intel_ddi_dp_level Patchwork
2017-08-30 5:26 ` ✓ Fi.CI.IGT: " Patchwork
2017-08-30 14:15 ` [PATCH 1/8] " Ville Syrjälä
[not found] <Message-id: <20170830142037.GH4914@intel.com>
2017-08-31 0:00 ` [PATCH] drm/i915/cnl: Fix DP max voltage Rodrigo Vivi
2017-08-31 12:34 ` Ville Syrjälä
[not found] <Message-id: <20170831123436.GO4914@intel.com>
2017-08-31 14:53 ` Rodrigo Vivi
2017-08-31 15:06 ` Ville Syrjälä
2017-08-31 16:49 ` Vivi, Rodrigo
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