* [PATCH] drm: Introduce RGB 64-bit 16:16:16:16 float format @ 2017-11-23 8:56 ` Tina Zhang 0 siblings, 0 replies; 8+ messages in thread From: Tina Zhang @ 2017-11-23 8:56 UTC (permalink / raw) To: alex.williamson, kraxel, chris, joonas.lahtinen, zhenyuw, zhiyuan.lv, zhi.a.wang, kevin.tian, daniel, hang.yuan Cc: intel-gfx, intel-gvt-dev, linux-kernel, dri-devel This patch is from "[PATCH v19 0/6] drm/i915/gvt: Dma-buf support for GVT-g": https://lists.freedesktop.org/archives/intel-gvt-dev/2017-November/002508.html The RGB 64-bit 16:16:16:16 float pixel format is needed by some Apps in windows. The float format in each component is 1:5:10 MSb-sign:exponent: fraction. This patch is to introduce the format to drm, so that the windows guest's framebuffer in this kind of format can be recognized and used by linux host. Tina Zhang (1): drm: Introduce RGB 64-bit 16:16:16:16 float format include/uapi/drm/drm_fourcc.h | 4 ++++ 1 file changed, 4 insertions(+) -- 2.7.4 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH] drm: Introduce RGB 64-bit 16:16:16:16 float format @ 2017-11-23 8:56 ` Tina Zhang 0 siblings, 0 replies; 8+ messages in thread From: Tina Zhang @ 2017-11-23 8:56 UTC (permalink / raw) To: alex.williamson, kraxel, chris, joonas.lahtinen, zhenyuw, zhiyuan.lv, zhi.a.wang, kevin.tian, daniel, hang.yuan Cc: Tina Zhang, intel-gfx, intel-gvt-dev, linux-kernel, dri-devel This patch is from "[PATCH v19 0/6] drm/i915/gvt: Dma-buf support for GVT-g": https://lists.freedesktop.org/archives/intel-gvt-dev/2017-November/002508.html The RGB 64-bit 16:16:16:16 float pixel format is needed by some Apps in windows. The float format in each component is 1:5:10 MSb-sign:exponent: fraction. This patch is to introduce the format to drm, so that the windows guest's framebuffer in this kind of format can be recognized and used by linux host. Tina Zhang (1): drm: Introduce RGB 64-bit 16:16:16:16 float format include/uapi/drm/drm_fourcc.h | 4 ++++ 1 file changed, 4 insertions(+) -- 2.7.4 ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH] drm: Introduce RGB 64-bit 16:16:16:16 float format 2017-11-23 8:56 ` Tina Zhang @ 2017-11-23 8:56 ` Tina Zhang -1 siblings, 0 replies; 8+ messages in thread From: Tina Zhang @ 2017-11-23 8:56 UTC (permalink / raw) To: alex.williamson, kraxel, chris, joonas.lahtinen, zhenyuw, zhiyuan.lv, zhi.a.wang, kevin.tian, daniel, hang.yuan Cc: Daniel Vetter, intel-gfx, linux-kernel, dri-devel, Tina Zhang, Dave Airlie, intel-gvt-dev The RGB 64-bit 16:16:16:16 float pixel format is needed by some Apps in windows. The float format in each component is 1:5:10 MSb-sign:exponent: fraction. This patch is to introduce the format to drm, so that the windows guest's framebuffer in this kind of format can be recognized and used by linux host. v14: - add some details about the float pixel format. (Daniel) - add F suffix to the defined name. (Daniel) v12: - send to dri-devel at lists.freedesktop.org. (Ville) v9: - separated from framebuffer decoder patch. (Zhenyu) (Xiaoguang) Signed-off-by: Tina Zhang <tina.zhang@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Dave Airlie <airlied@redhat.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> --- include/uapi/drm/drm_fourcc.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h index 3ad838d..391d2e6 100644 --- a/include/uapi/drm/drm_fourcc.h +++ b/include/uapi/drm/drm_fourcc.h @@ -113,6 +113,10 @@ extern "C" { #define DRM_FORMAT_AYUV fourcc_code('A', 'Y', 'U', 'V') /* [31:0] A:Y:Cb:Cr 8:8:8:8 little endian */ +/* 64 bpp RGB 16:16:16:16 Floating Point */ +#define DRM_FORMAT_XRGB161616F fourcc_code('X', 'R', '3', 'F') /* [63:0] x:R:G:B 16:16:16:16 little endian */ +#define DRM_FORMAT_XBGR161616F fourcc_code('X', 'B', '3', 'F') /* [63:0] x:B:G:R 16:16:16:16 little endian */ + /* * 2 plane RGB + A * index 0 = RGB plane, same format as the corresponding non _A8 format has -- 2.7.4 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH] drm: Introduce RGB 64-bit 16:16:16:16 float format @ 2017-11-23 8:56 ` Tina Zhang 0 siblings, 0 replies; 8+ messages in thread From: Tina Zhang @ 2017-11-23 8:56 UTC (permalink / raw) To: alex.williamson, kraxel, chris, joonas.lahtinen, zhenyuw, zhiyuan.lv, zhi.a.wang, kevin.tian, daniel, hang.yuan Cc: Tina Zhang, intel-gfx, intel-gvt-dev, linux-kernel, dri-devel, Ville Syrjälä, Dave Airlie, Daniel Vetter The RGB 64-bit 16:16:16:16 float pixel format is needed by some Apps in windows. The float format in each component is 1:5:10 MSb-sign:exponent: fraction. This patch is to introduce the format to drm, so that the windows guest's framebuffer in this kind of format can be recognized and used by linux host. v14: - add some details about the float pixel format. (Daniel) - add F suffix to the defined name. (Daniel) v12: - send to dri-devel at lists.freedesktop.org. (Ville) v9: - separated from framebuffer decoder patch. (Zhenyu) (Xiaoguang) Signed-off-by: Tina Zhang <tina.zhang@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Dave Airlie <airlied@redhat.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> --- include/uapi/drm/drm_fourcc.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h index 3ad838d..391d2e6 100644 --- a/include/uapi/drm/drm_fourcc.h +++ b/include/uapi/drm/drm_fourcc.h @@ -113,6 +113,10 @@ extern "C" { #define DRM_FORMAT_AYUV fourcc_code('A', 'Y', 'U', 'V') /* [31:0] A:Y:Cb:Cr 8:8:8:8 little endian */ +/* 64 bpp RGB 16:16:16:16 Floating Point */ +#define DRM_FORMAT_XRGB161616F fourcc_code('X', 'R', '3', 'F') /* [63:0] x:R:G:B 16:16:16:16 little endian */ +#define DRM_FORMAT_XBGR161616F fourcc_code('X', 'B', '3', 'F') /* [63:0] x:B:G:R 16:16:16:16 little endian */ + /* * 2 plane RGB + A * index 0 = RGB plane, same format as the corresponding non _A8 format has -- 2.7.4 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH] drm: Introduce RGB 64-bit 16:16:16:16 float format 2017-11-23 8:56 ` Tina Zhang @ 2017-11-23 16:06 ` Ville Syrjälä -1 siblings, 0 replies; 8+ messages in thread From: Ville Syrjälä @ 2017-11-23 16:06 UTC (permalink / raw) To: Tina Zhang Cc: dri-devel, Daniel Vetter, intel-gfx, linux-kernel, zhiyuan.lv, Dave Airlie, hang.yuan, intel-gvt-dev, kraxel On Thu, Nov 23, 2017 at 04:56:56PM +0800, Tina Zhang wrote: > The RGB 64-bit 16:16:16:16 float pixel format is needed by some Apps in > windows. The float format in each component is 1:5:10 MSb-sign:exponent: > fraction. > > This patch is to introduce the format to drm, so that the windows guest's > framebuffer in this kind of format can be recognized and used by linux > host. > > v14: > - add some details about the float pixel format. (Daniel) > - add F suffix to the defined name. (Daniel) > > v12: > - send to dri-devel at lists.freedesktop.org. (Ville) > > v9: > - separated from framebuffer decoder patch. (Zhenyu) (Xiaoguang) > > Signed-off-by: Tina Zhang <tina.zhang@intel.com> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Cc: Dave Airlie <airlied@redhat.com> > Cc: Daniel Vetter <daniel.vetter@ffwll.ch> > --- > include/uapi/drm/drm_fourcc.h | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h > index 3ad838d..391d2e6 100644 > --- a/include/uapi/drm/drm_fourcc.h > +++ b/include/uapi/drm/drm_fourcc.h > @@ -113,6 +113,10 @@ extern "C" { > > #define DRM_FORMAT_AYUV fourcc_code('A', 'Y', 'U', 'V') /* [31:0] A:Y:Cb:Cr 8:8:8:8 little endian */ > > +/* 64 bpp RGB 16:16:16:16 Floating Point */ As before this is still extremely vague. Stating that each component is a IEEE-754 half-precision float (binary16) should cover it. Well, assuming that it really is one. > +#define DRM_FORMAT_XRGB161616F fourcc_code('X', 'R', '3', 'F') /* [63:0] x:R:G:B 16:16:16:16 little endian */ > +#define DRM_FORMAT_XBGR161616F fourcc_code('X', 'B', '3', 'F') /* [63:0] x:B:G:R 16:16:16:16 little endian */ Missing one 16 from that name to be consistent with the non-float stuff. Also maybe it should be (... '4', 'F')? '3' would seem to imply a 48 bit pixel. And of course it's still missing the actual implemntation for any driver. > + > /* > * 2 plane RGB + A > * index 0 = RGB plane, same format as the corresponding non _A8 format has > -- > 2.7.4 -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] drm: Introduce RGB 64-bit 16:16:16:16 float format @ 2017-11-23 16:06 ` Ville Syrjälä 0 siblings, 0 replies; 8+ messages in thread From: Ville Syrjälä @ 2017-11-23 16:06 UTC (permalink / raw) To: Tina Zhang Cc: alex.williamson, kraxel, chris, joonas.lahtinen, zhenyuw, zhiyuan.lv, zhi.a.wang, kevin.tian, daniel, hang.yuan, intel-gfx, intel-gvt-dev, linux-kernel, dri-devel, Dave Airlie, Daniel Vetter On Thu, Nov 23, 2017 at 04:56:56PM +0800, Tina Zhang wrote: > The RGB 64-bit 16:16:16:16 float pixel format is needed by some Apps in > windows. The float format in each component is 1:5:10 MSb-sign:exponent: > fraction. > > This patch is to introduce the format to drm, so that the windows guest's > framebuffer in this kind of format can be recognized and used by linux > host. > > v14: > - add some details about the float pixel format. (Daniel) > - add F suffix to the defined name. (Daniel) > > v12: > - send to dri-devel at lists.freedesktop.org. (Ville) > > v9: > - separated from framebuffer decoder patch. (Zhenyu) (Xiaoguang) > > Signed-off-by: Tina Zhang <tina.zhang@intel.com> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Cc: Dave Airlie <airlied@redhat.com> > Cc: Daniel Vetter <daniel.vetter@ffwll.ch> > --- > include/uapi/drm/drm_fourcc.h | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h > index 3ad838d..391d2e6 100644 > --- a/include/uapi/drm/drm_fourcc.h > +++ b/include/uapi/drm/drm_fourcc.h > @@ -113,6 +113,10 @@ extern "C" { > > #define DRM_FORMAT_AYUV fourcc_code('A', 'Y', 'U', 'V') /* [31:0] A:Y:Cb:Cr 8:8:8:8 little endian */ > > +/* 64 bpp RGB 16:16:16:16 Floating Point */ As before this is still extremely vague. Stating that each component is a IEEE-754 half-precision float (binary16) should cover it. Well, assuming that it really is one. > +#define DRM_FORMAT_XRGB161616F fourcc_code('X', 'R', '3', 'F') /* [63:0] x:R:G:B 16:16:16:16 little endian */ > +#define DRM_FORMAT_XBGR161616F fourcc_code('X', 'B', '3', 'F') /* [63:0] x:B:G:R 16:16:16:16 little endian */ Missing one 16 from that name to be consistent with the non-float stuff. Also maybe it should be (... '4', 'F')? '3' would seem to imply a 48 bit pixel. And of course it's still missing the actual implemntation for any driver. > + > /* > * 2 plane RGB + A > * index 0 = RGB plane, same format as the corresponding non _A8 format has > -- > 2.7.4 -- Ville Syrjälä Intel OTC ^ permalink raw reply [flat|nested] 8+ messages in thread
* ✓ Fi.CI.BAT: success for drm: Introduce RGB 64-bit 16:16:16:16 float format 2017-11-23 8:56 ` Tina Zhang (?) (?) @ 2017-11-23 10:04 ` Patchwork -1 siblings, 0 replies; 8+ messages in thread From: Patchwork @ 2017-11-23 10:04 UTC (permalink / raw) To: Tina Zhang; +Cc: intel-gfx == Series Details == Series: drm: Introduce RGB 64-bit 16:16:16:16 float format URL : https://patchwork.freedesktop.org/series/34283/ State : success == Summary == Series 34283v1 drm: Introduce RGB 64-bit 16:16:16:16 float format https://patchwork.freedesktop.org/api/1.0/series/34283/revisions/1/mbox/ Test kms_pipe_crc_basic: Subgroup suspend-read-crc-pipe-b: incomplete -> PASS (fi-snb-2520m) fdo#103713 fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713 fi-bdw-5557u total:289 pass:268 dwarn:0 dfail:0 fail:0 skip:21 time:445s fi-bdw-gvtdvm total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:456s fi-blb-e6850 total:289 pass:223 dwarn:1 dfail:0 fail:0 skip:65 time:385s fi-bsw-n3050 total:289 pass:243 dwarn:0 dfail:0 fail:0 skip:46 time:539s fi-bwr-2160 total:289 pass:183 dwarn:0 dfail:0 fail:0 skip:106 time:277s fi-bxt-dsi total:289 pass:259 dwarn:0 dfail:0 fail:0 skip:30 time:509s fi-bxt-j4205 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:508s fi-byt-j1900 total:289 pass:254 dwarn:0 dfail:0 fail:0 skip:35 time:505s fi-byt-n2820 total:289 pass:250 dwarn:0 dfail:0 fail:0 skip:39 time:490s fi-cfl-s2 total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:615s fi-elk-e7500 total:289 pass:229 dwarn:0 dfail:0 fail:0 skip:60 time:430s fi-gdg-551 total:289 pass:178 dwarn:1 dfail:0 fail:1 skip:109 time:265s fi-glk-1 total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:544s fi-hsw-4770 total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:428s fi-hsw-4770r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:439s fi-ilk-650 total:289 pass:228 dwarn:0 dfail:0 fail:0 skip:61 time:430s fi-ivb-3520m total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:495s fi-ivb-3770 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:464s fi-kbl-7500u total:289 pass:264 dwarn:1 dfail:0 fail:0 skip:24 time:480s fi-kbl-7560u total:289 pass:270 dwarn:0 dfail:0 fail:0 skip:19 time:530s fi-kbl-7567u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:473s fi-kbl-r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:538s fi-pnv-d510 total:289 pass:222 dwarn:1 dfail:0 fail:0 skip:66 time:579s fi-skl-6260u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:455s fi-skl-6600u total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:550s fi-skl-6700hq total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:564s fi-skl-6700k total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:530s fi-skl-6770hq total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:495s fi-skl-gvtdvm total:289 pass:266 dwarn:0 dfail:0 fail:0 skip:23 time:460s fi-snb-2520m total:289 pass:250 dwarn:0 dfail:0 fail:0 skip:39 time:563s fi-snb-2600 total:289 pass:249 dwarn:0 dfail:0 fail:0 skip:40 time:420s Blacklisted hosts: fi-cnl-y total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:558s fi-glk-dsi total:109 pass:96 dwarn:0 dfail:0 fail:0 skip:12 0df0feb7141cc848766a9475b51cc919c010eaa8 drm-tip: 2017y-11m-23d-09h-17m-34s UTC integration manifest 4fa3812945e1 drm: Introduce RGB 64-bit 16:16:16:16 float format == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7249/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 8+ messages in thread
* ✓ Fi.CI.IGT: success for drm: Introduce RGB 64-bit 16:16:16:16 float format 2017-11-23 8:56 ` Tina Zhang ` (2 preceding siblings ...) (?) @ 2017-11-23 13:03 ` Patchwork -1 siblings, 0 replies; 8+ messages in thread From: Patchwork @ 2017-11-23 13:03 UTC (permalink / raw) To: Tina Zhang; +Cc: intel-gfx == Series Details == Series: drm: Introduce RGB 64-bit 16:16:16:16 float format URL : https://patchwork.freedesktop.org/series/34283/ State : success == Summary == Test drv_selftest: Subgroup mock_sanitycheck: dmesg-warn -> PASS (shard-snb) fdo#103717 dmesg-warn -> PASS (shard-hsw) fdo#103719 Test kms_flip: Subgroup flip-vs-blocking-wf-vblank: fail -> PASS (shard-hsw) fdo#100368 Test pm_rpm: Subgroup modeset-stress-extra-wait: skip -> PASS (shard-hsw) Test drv_module_reload: Subgroup basic-no-display: pass -> DMESG-WARN (shard-hsw) fdo#102707 Test kms_setmode: Subgroup basic: fail -> PASS (shard-hsw) fdo#99912 fdo#103717 https://bugs.freedesktop.org/show_bug.cgi?id=103717 fdo#103719 https://bugs.freedesktop.org/show_bug.cgi?id=103719 fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707 fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912 shard-hsw total:2667 pass:1533 dwarn:2 dfail:0 fail:11 skip:1121 time:9569s shard-snb total:2649 pass:1293 dwarn:1 dfail:0 fail:13 skip:1341 time:8001s Blacklisted hosts: shard-apl total:2647 pass:1665 dwarn:2 dfail:0 fail:25 skip:954 time:13164s == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7249/shards.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2017-11-23 16:06 UTC | newest] Thread overview: 8+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2017-11-23 8:56 [PATCH] drm: Introduce RGB 64-bit 16:16:16:16 float format Tina Zhang 2017-11-23 8:56 ` Tina Zhang 2017-11-23 8:56 ` Tina Zhang 2017-11-23 8:56 ` Tina Zhang 2017-11-23 16:06 ` Ville Syrjälä 2017-11-23 16:06 ` Ville Syrjälä 2017-11-23 10:04 ` ✓ Fi.CI.BAT: success for " Patchwork 2017-11-23 13:03 ` ✓ Fi.CI.IGT: " Patchwork
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