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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>,
	intel-gfx@lists.freedesktop.org, stable@vger.kernel.org
Subject: Re: [PATCH 1/3] drm/i915: Pass the correct msgs to gmbus_is_index_read()
Date: Fri, 24 Nov 2017 18:06:40 +0200	[thread overview]
Message-ID: <20171124160640.GM10981@intel.com> (raw)
In-Reply-To: <20171124125528.GC10981@intel.com>

On Fri, Nov 24, 2017 at 02:55:28PM +0200, Ville Syrjälä wrote:
> On Thu, Nov 23, 2017 at 08:50:41PM +0000, Chris Wilson wrote:
> > Quoting Ville Syrjala (2017-11-23 19:41:55)
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > 
> > > We're supposed to examine msgs[i] and msgs[i+1] to see if they
> > > form a pair suitable for an indexed transfer. But in reality
> > > we're examining msgs[0] and msgs[1]. Fix this.
> > > 
> > > Cc: stable@vger.kernel.org
> > > Cc: Daniel Kurtz <djkurtz@chromium.org>
> > > Cc: Chris Wilson <chris@chris-wilson.co.uk>
> > > Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> > > Cc: Sean Paul <seanpaul@chromium.org>
> > > Fixes: 56f9eac05489 ("drm/i915/intel_i2c: use INDEX cycles for i2c read transactions")
> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/intel_i2c.c | 2 +-
> > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
> > > index eb5827110d8f..165375cbef2f 100644
> > > --- a/drivers/gpu/drm/i915/intel_i2c.c
> > > +++ b/drivers/gpu/drm/i915/intel_i2c.c
> > > @@ -484,7 +484,7 @@ do_gmbus_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, int num)
> > >  
> > >         for (; i < num; i += inc) {
> > >                 inc = 1;
> > > -               if (gmbus_is_index_read(msgs, i, num)) {
> > > +               if (gmbus_is_index_read(&msgs[i], i, num)) {
> > 
> > i is passed to gmbus_is_index_read() and used as an index into msgs. So
> > this should be accounted for right?
> 
> Doh. Yep, this patch is nonsense.

The two other patches pushed to dinq. Thanks catching my mistake with
this one.

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

WARNING: multiple messages have this Message-ID (diff)
From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>,
	intel-gfx@lists.freedesktop.org, stable@vger.kernel.org
Subject: Re: [Intel-gfx] [PATCH 1/3] drm/i915: Pass the correct msgs to gmbus_is_index_read()
Date: Fri, 24 Nov 2017 18:06:40 +0200	[thread overview]
Message-ID: <20171124160640.GM10981@intel.com> (raw)
In-Reply-To: <20171124125528.GC10981@intel.com>

On Fri, Nov 24, 2017 at 02:55:28PM +0200, Ville Syrj�l� wrote:
> On Thu, Nov 23, 2017 at 08:50:41PM +0000, Chris Wilson wrote:
> > Quoting Ville Syrjala (2017-11-23 19:41:55)
> > > From: Ville Syrj�l� <ville.syrjala@linux.intel.com>
> > > 
> > > We're supposed to examine msgs[i] and msgs[i+1] to see if they
> > > form a pair suitable for an indexed transfer. But in reality
> > > we're examining msgs[0] and msgs[1]. Fix this.
> > > 
> > > Cc: stable@vger.kernel.org
> > > Cc: Daniel Kurtz <djkurtz@chromium.org>
> > > Cc: Chris Wilson <chris@chris-wilson.co.uk>
> > > Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> > > Cc: Sean Paul <seanpaul@chromium.org>
> > > Fixes: 56f9eac05489 ("drm/i915/intel_i2c: use INDEX cycles for i2c read transactions")
> > > Signed-off-by: Ville Syrj�l� <ville.syrjala@linux.intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/intel_i2c.c | 2 +-
> > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
> > > index eb5827110d8f..165375cbef2f 100644
> > > --- a/drivers/gpu/drm/i915/intel_i2c.c
> > > +++ b/drivers/gpu/drm/i915/intel_i2c.c
> > > @@ -484,7 +484,7 @@ do_gmbus_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, int num)
> > >  
> > >         for (; i < num; i += inc) {
> > >                 inc = 1;
> > > -               if (gmbus_is_index_read(msgs, i, num)) {
> > > +               if (gmbus_is_index_read(&msgs[i], i, num)) {
> > 
> > i is passed to gmbus_is_index_read() and used as an index into msgs. So
> > this should be accounted for right?
> 
> Doh. Yep, this patch is nonsense.

The two other patches pushed to dinq. Thanks catching my mistake with
this one.

-- 
Ville Syrj�l�
Intel OTC

  reply	other threads:[~2017-11-24 16:06 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-11-23 19:41 [PATCH 1/3] drm/i915: Pass the correct msgs to gmbus_is_index_read() Ville Syrjala
2017-11-23 19:41 ` [PATCH 2/3] drm/i915: Don't try indexed reads to alternate slave addresses Ville Syrjala
2017-11-23 20:52   ` Chris Wilson
2017-11-23 19:41 ` [PATCH 3/3] drm/i915: Prevent zero length "index" write Ville Syrjala
2017-11-23 20:53   ` Chris Wilson
2017-11-23 20:12 ` ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Pass the correct msgs to gmbus_is_index_read() Patchwork
2017-11-23 20:50 ` [PATCH 1/3] " Chris Wilson
2017-11-24 12:55   ` Ville Syrjälä
2017-11-24 12:55     ` Ville Syrjälä
2017-11-24 16:06     ` Ville Syrjälä [this message]
2017-11-24 16:06       ` [Intel-gfx] " Ville Syrjälä
2017-11-23 23:39 ` ✓ Fi.CI.IGT: success for series starting with [1/3] " Patchwork

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