From: wens@csie.org (Chen-Yu Tsai)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 3/8] ARM: dts: sun9i: Add CPUCFG device node for A80 dtsi
Date: Thu, 4 Jan 2018 22:37:49 +0800 [thread overview]
Message-ID: <20180104143754.2425-4-wens@csie.org> (raw)
In-Reply-To: <20180104143754.2425-1-wens@csie.org>
CPUCFG is a collection of registers that are mapped to the SoC's signals
from each individual processor core and associated peripherals, such as
resets for processors, L1/L2 cache and other things.
These registers are used for SMP bringup and CPU hotplugging.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
arch/arm/boot/dts/sun9i-a80.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
index 85fb800af8ab..85ecb4d64cfd 100644
--- a/arch/arm/boot/dts/sun9i-a80.dtsi
+++ b/arch/arm/boot/dts/sun9i-a80.dtsi
@@ -363,6 +363,11 @@
#reset-cells = <1>;
};
+ cpucfg at 1700000 {
+ compatible = "allwinner,sun9i-a80-cpucfg";
+ reg = <0x01700000 0x100>;
+ };
+
mmc0: mmc at 1c0f000 {
compatible = "allwinner,sun9i-a80-mmc";
reg = <0x01c0f000 0x1000>;
--
2.15.1
WARNING: multiple messages have this Message-ID (diff)
From: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
To: Maxime Ripard
<maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
Russell King <linux-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org>,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>
Cc: Mylene JOSSERAND
<mylene.josserand-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org,
Nicolas Pitre
<nicolas.pitre-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
Dave Martin <Dave.Martin-5wv7dgnIgG8@public.gmane.org>
Subject: [PATCH v2 3/8] ARM: dts: sun9i: Add CPUCFG device node for A80 dtsi
Date: Thu, 4 Jan 2018 22:37:49 +0800 [thread overview]
Message-ID: <20180104143754.2425-4-wens@csie.org> (raw)
In-Reply-To: <20180104143754.2425-1-wens-jdAy2FN1RRM@public.gmane.org>
CPUCFG is a collection of registers that are mapped to the SoC's signals
from each individual processor core and associated peripherals, such as
resets for processors, L1/L2 cache and other things.
These registers are used for SMP bringup and CPU hotplugging.
Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
---
arch/arm/boot/dts/sun9i-a80.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
index 85fb800af8ab..85ecb4d64cfd 100644
--- a/arch/arm/boot/dts/sun9i-a80.dtsi
+++ b/arch/arm/boot/dts/sun9i-a80.dtsi
@@ -363,6 +363,11 @@
#reset-cells = <1>;
};
+ cpucfg@1700000 {
+ compatible = "allwinner,sun9i-a80-cpucfg";
+ reg = <0x01700000 0x100>;
+ };
+
mmc0: mmc@1c0f000 {
compatible = "allwinner,sun9i-a80-mmc";
reg = <0x01c0f000 0x1000>;
--
2.15.1
WARNING: multiple messages have this Message-ID (diff)
From: Chen-Yu Tsai <wens@csie.org>
To: Maxime Ripard <maxime.ripard@free-electrons.com>,
Russell King <linux@armlinux.org.uk>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>
Cc: Mylene JOSSERAND <mylene.josserand@free-electrons.com>,
Chen-Yu Tsai <wens@csie.org>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com,
Nicolas Pitre <nicolas.pitre@linaro.org>,
Dave Martin <Dave.Martin@arm.com>
Subject: [PATCH v2 3/8] ARM: dts: sun9i: Add CPUCFG device node for A80 dtsi
Date: Thu, 4 Jan 2018 22:37:49 +0800 [thread overview]
Message-ID: <20180104143754.2425-4-wens@csie.org> (raw)
In-Reply-To: <20180104143754.2425-1-wens@csie.org>
CPUCFG is a collection of registers that are mapped to the SoC's signals
from each individual processor core and associated peripherals, such as
resets for processors, L1/L2 cache and other things.
These registers are used for SMP bringup and CPU hotplugging.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
arch/arm/boot/dts/sun9i-a80.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
index 85fb800af8ab..85ecb4d64cfd 100644
--- a/arch/arm/boot/dts/sun9i-a80.dtsi
+++ b/arch/arm/boot/dts/sun9i-a80.dtsi
@@ -363,6 +363,11 @@
#reset-cells = <1>;
};
+ cpucfg@1700000 {
+ compatible = "allwinner,sun9i-a80-cpucfg";
+ reg = <0x01700000 0x100>;
+ };
+
mmc0: mmc@1c0f000 {
compatible = "allwinner,sun9i-a80-mmc";
reg = <0x01c0f000 0x1000>;
--
2.15.1
next prev parent reply other threads:[~2018-01-04 14:37 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-04 14:37 [PATCH v2 0/8] ARM: sun9i: SMP support with Multi-Cluster Power Management Chen-Yu Tsai
2018-01-04 14:37 ` Chen-Yu Tsai
2018-01-04 14:37 ` Chen-Yu Tsai
2018-01-04 14:37 ` [PATCH v2 1/8] ARM: sun9i: Support SMP on A80 with Multi-Cluster Power Management (MCPM) Chen-Yu Tsai
2018-01-04 14:37 ` Chen-Yu Tsai
2018-01-04 14:37 ` Chen-Yu Tsai
2018-01-04 14:37 ` [PATCH v2 2/8] ARM: dts: sun9i: Add CCI-400 device nodes for A80 Chen-Yu Tsai
2018-01-04 14:37 ` Chen-Yu Tsai
2018-01-04 14:37 ` Chen-Yu Tsai
2018-01-04 14:37 ` Chen-Yu Tsai [this message]
2018-01-04 14:37 ` [PATCH v2 3/8] ARM: dts: sun9i: Add CPUCFG device node for A80 dtsi Chen-Yu Tsai
2018-01-04 14:37 ` Chen-Yu Tsai
2018-01-04 14:37 ` [PATCH v2 4/8] ARM: dts: sun9i: Add PRCM device node for the " Chen-Yu Tsai
2018-01-04 14:37 ` Chen-Yu Tsai
2018-01-04 14:37 ` Chen-Yu Tsai
2018-01-04 14:37 ` [PATCH v2 5/8] ARM: sun9i: mcpm: Support CPU/cluster power down and hotplugging for cpu1~7 Chen-Yu Tsai
2018-01-04 14:37 ` Chen-Yu Tsai
2018-01-04 14:37 ` Chen-Yu Tsai
2018-01-04 14:37 ` [PATCH v2 6/8] dt-bindings: ARM: sunxi: Document A80 SoC secure SRAM usage by SMP hotplug Chen-Yu Tsai
2018-01-04 14:37 ` Chen-Yu Tsai
2018-01-04 14:37 ` Chen-Yu Tsai
2018-01-09 3:40 ` Rob Herring
2018-01-09 3:40 ` Rob Herring
2018-01-09 3:40 ` Rob Herring
2018-01-04 14:37 ` [PATCH v2 7/8] ARM: sun9i: mcpm: Support cpu0 hotplug Chen-Yu Tsai
2018-01-04 14:37 ` Chen-Yu Tsai
2018-01-04 14:37 ` Chen-Yu Tsai
2018-01-04 14:37 ` [PATCH v2 8/8] ARM: dts: sun9i: Add secure SRAM node used for MCPM SMP hotplug Chen-Yu Tsai
2018-01-04 14:37 ` Chen-Yu Tsai
2018-01-04 14:37 ` Chen-Yu Tsai
2018-01-04 14:58 ` [PATCH v2 0/8] ARM: sun9i: SMP support with Multi-Cluster Power Management Maxime Ripard
2018-01-04 14:58 ` Maxime Ripard
2018-01-04 18:04 ` Lorenzo Pieralisi
2018-01-04 18:04 ` Lorenzo Pieralisi
2018-01-04 18:04 ` Lorenzo Pieralisi
2018-01-04 20:56 ` Nicolas Pitre
2018-01-04 20:56 ` Nicolas Pitre
2018-01-04 20:56 ` Nicolas Pitre
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