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From: Vinod Koul <vinod.koul@intel.com>
To: Sean Wang <sean.wang@mediatek.com>
Cc: dan.j.williams@intel.com, robh+dt@kernel.org,
	mark.rutland@arm.com, dmaengine@vger.kernel.org,
	devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	Randy Dunlap <rdunlap@infradead.org>,
	Fengguang Wu <fengguang.wu@intel.com>,
	Julia Lawall <julia.lawall@lip6.fr>
Subject: [v5,2/3] dmaengine: mediatek: Add MediaTek High-Speed DMA controller for MT7622 and MT7623 SoC
Date: Fri, 2 Mar 2018 13:47:06 +0530	[thread overview]
Message-ID: <20180302081706.GL15443@localhost> (raw)

On Fri, Mar 02, 2018 at 02:47:51PM +0800, Sean Wang wrote:
> Hi, Vinod
> 
> On Thu, 2018-03-01 at 18:26 +0530, Vinod Koul wrote:
> > On Thu, Mar 01, 2018 at 06:27:01PM +0800, Sean Wang wrote:
> > > On Thu, 2018-03-01 at 13:53 +0530, Vinod Koul wrote:
> > > > On Sun, Feb 18, 2018 at 03:08:30AM +0800, sean.wang@mediatek.com wrote:
> > > > 
> > > > > @@ -0,0 +1,1054 @@
> > > > > +// SPDX-License-Identifier: GPL-2.0
> > > > // Copyright ...
> > > > 
> > > > The copyright line needs to follow SPDX tag line
> > > > 
> > > 
> > > okay, I will make it reorder and be something like that
> > > 
> > > // SPDX-License-Identifier: GPL-2.0
> > > /*
> > >  * Copyright (c) 2017-2018 MediaTek Inc.
> > >  * Author: Sean Wang <sean.wang@mediatek.com>
> > >  *
> > >  * Driver for MediaTek High-Speed DMA Controller
> > >  *
> > >  */
> > 
> > It needs to be:
> > 
> > // SPDX-License-Identifier: GPL-2.0
> > // Copyright (c) 2017-2018 MediaTek Inc.
> > 
> > /*
> >  * whatever else you want
> >  */
> > 
> > The first two lines are in C99 style comment and need to have SPDX tag and
> > Copyright info
> 
> Sure, I can do it using C99 style comments at the first two lines.
> 
> In addition, I'm really curious where we can find a reference to the
> rule and if it 's a strict rule for all the drivers.
> 
> Because I'm considering whether I should turn other driver into using
> the same rule.

Yes that seems to be the rule now https://lkml.org/lkml/2017/11/2/715

> > > > > +#define MTK_HSDMA_USEC_POLL		20
> > > > > +#define MTK_HSDMA_TIMEOUT_POLL		200000
> > > > > +#define MTK_HSDMA_DMA_BUSWIDTHS		BIT(DMA_SLAVE_BUSWIDTH_UNDEFINED)
> > > > 
> > > > Undefined buswidth??
> > 
> > ??
> 
> Sorry for I didn't answer the question in the short time.
> 
> After spending some time on a confirmation with design, it is
> DMA_SLAVE_BUSWIDTH_4_BYTES and not be configurable. 

Then it should be DMA_SLAVE_BUSWIDTH_4_BYTES and not
DMA_SLAVE_BUSWIDTH_UNDEFINED...

> > > > shouldn't we check if next is in range, we can crash if we get bad value
> > > > from hardware..
> > > 
> > > okay, there are checks for next with ddone bit check and null check in
> > > the corresponding descriptor as the following.
> > 
> > what if you get bad next value
> > 
> 
> next is not hardware value. it's maintained by software which is always
> between 0 to MTK_DMA_SIZE - 1, and definitely doesn't get a bad value.
> 
> > > 
> > > > > +		rxd = &pc->ring.rxd[next];
> > 
> > resulting in bad ref here
> 
> rxd is also definitely a good ref

not if next is out of range, say you read -1 or 200000?

WARNING: multiple messages have this Message-ID (diff)
From: Vinod Koul <vinod.koul@intel.com>
To: Sean Wang <sean.wang@mediatek.com>
Cc: dan.j.williams@intel.com, robh+dt@kernel.org,
	mark.rutland@arm.com, dmaengine@vger.kernel.org,
	devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	Randy Dunlap <rdunlap@infradead.org>,
	Fengguang Wu <fengguang.wu@intel.com>,
	Julia Lawall <julia.lawall@lip6.fr>
Subject: Re: [PATCH v5 2/3] dmaengine: mediatek: Add MediaTek High-Speed DMA controller for MT7622 and MT7623 SoC
Date: Fri, 2 Mar 2018 13:47:06 +0530	[thread overview]
Message-ID: <20180302081706.GL15443@localhost> (raw)
In-Reply-To: <1519973271.8089.166.camel@mtkswgap22>

On Fri, Mar 02, 2018 at 02:47:51PM +0800, Sean Wang wrote:
> Hi, Vinod
> 
> On Thu, 2018-03-01 at 18:26 +0530, Vinod Koul wrote:
> > On Thu, Mar 01, 2018 at 06:27:01PM +0800, Sean Wang wrote:
> > > On Thu, 2018-03-01 at 13:53 +0530, Vinod Koul wrote:
> > > > On Sun, Feb 18, 2018 at 03:08:30AM +0800, sean.wang@mediatek.com wrote:
> > > > 
> > > > > @@ -0,0 +1,1054 @@
> > > > > +// SPDX-License-Identifier: GPL-2.0
> > > > // Copyright ...
> > > > 
> > > > The copyright line needs to follow SPDX tag line
> > > > 
> > > 
> > > okay, I will make it reorder and be something like that
> > > 
> > > // SPDX-License-Identifier: GPL-2.0
> > > /*
> > >  * Copyright (c) 2017-2018 MediaTek Inc.
> > >  * Author: Sean Wang <sean.wang@mediatek.com>
> > >  *
> > >  * Driver for MediaTek High-Speed DMA Controller
> > >  *
> > >  */
> > 
> > It needs to be:
> > 
> > // SPDX-License-Identifier: GPL-2.0
> > // Copyright (c) 2017-2018 MediaTek Inc.
> > 
> > /*
> >  * whatever else you want
> >  */
> > 
> > The first two lines are in C99 style comment and need to have SPDX tag and
> > Copyright info
> 
> Sure, I can do it using C99 style comments at the first two lines.
> 
> In addition, I'm really curious where we can find a reference to the
> rule and if it 's a strict rule for all the drivers.
> 
> Because I'm considering whether I should turn other driver into using
> the same rule.

Yes that seems to be the rule now https://lkml.org/lkml/2017/11/2/715

> > > > > +#define MTK_HSDMA_USEC_POLL		20
> > > > > +#define MTK_HSDMA_TIMEOUT_POLL		200000
> > > > > +#define MTK_HSDMA_DMA_BUSWIDTHS		BIT(DMA_SLAVE_BUSWIDTH_UNDEFINED)
> > > > 
> > > > Undefined buswidth??
> > 
> > ??
> 
> Sorry for I didn't answer the question in the short time.
> 
> After spending some time on a confirmation with design, it is
> DMA_SLAVE_BUSWIDTH_4_BYTES and not be configurable. 

Then it should be DMA_SLAVE_BUSWIDTH_4_BYTES and not
DMA_SLAVE_BUSWIDTH_UNDEFINED...

> > > > shouldn't we check if next is in range, we can crash if we get bad value
> > > > from hardware..
> > > 
> > > okay, there are checks for next with ddone bit check and null check in
> > > the corresponding descriptor as the following.
> > 
> > what if you get bad next value
> > 
> 
> next is not hardware value. it's maintained by software which is always
> between 0 to MTK_DMA_SIZE - 1, and definitely doesn't get a bad value.
> 
> > > 
> > > > > +		rxd = &pc->ring.rxd[next];
> > 
> > resulting in bad ref here
> 
> rxd is also definitely a good ref

not if next is out of range, say you read -1 or 200000?

-- 
~Vinod

WARNING: multiple messages have this Message-ID (diff)
From: vinod.koul@intel.com (Vinod Koul)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 2/3] dmaengine: mediatek: Add MediaTek High-Speed DMA controller for MT7622 and MT7623 SoC
Date: Fri, 2 Mar 2018 13:47:06 +0530	[thread overview]
Message-ID: <20180302081706.GL15443@localhost> (raw)
In-Reply-To: <1519973271.8089.166.camel@mtkswgap22>

On Fri, Mar 02, 2018 at 02:47:51PM +0800, Sean Wang wrote:
> Hi, Vinod
> 
> On Thu, 2018-03-01 at 18:26 +0530, Vinod Koul wrote:
> > On Thu, Mar 01, 2018 at 06:27:01PM +0800, Sean Wang wrote:
> > > On Thu, 2018-03-01 at 13:53 +0530, Vinod Koul wrote:
> > > > On Sun, Feb 18, 2018 at 03:08:30AM +0800, sean.wang at mediatek.com wrote:
> > > > 
> > > > > @@ -0,0 +1,1054 @@
> > > > > +// SPDX-License-Identifier: GPL-2.0
> > > > // Copyright ...
> > > > 
> > > > The copyright line needs to follow SPDX tag line
> > > > 
> > > 
> > > okay, I will make it reorder and be something like that
> > > 
> > > // SPDX-License-Identifier: GPL-2.0
> > > /*
> > >  * Copyright (c) 2017-2018 MediaTek Inc.
> > >  * Author: Sean Wang <sean.wang@mediatek.com>
> > >  *
> > >  * Driver for MediaTek High-Speed DMA Controller
> > >  *
> > >  */
> > 
> > It needs to be:
> > 
> > // SPDX-License-Identifier: GPL-2.0
> > // Copyright (c) 2017-2018 MediaTek Inc.
> > 
> > /*
> >  * whatever else you want
> >  */
> > 
> > The first two lines are in C99 style comment and need to have SPDX tag and
> > Copyright info
> 
> Sure, I can do it using C99 style comments at the first two lines.
> 
> In addition, I'm really curious where we can find a reference to the
> rule and if it 's a strict rule for all the drivers.
> 
> Because I'm considering whether I should turn other driver into using
> the same rule.

Yes that seems to be the rule now https://lkml.org/lkml/2017/11/2/715

> > > > > +#define MTK_HSDMA_USEC_POLL		20
> > > > > +#define MTK_HSDMA_TIMEOUT_POLL		200000
> > > > > +#define MTK_HSDMA_DMA_BUSWIDTHS		BIT(DMA_SLAVE_BUSWIDTH_UNDEFINED)
> > > > 
> > > > Undefined buswidth??
> > 
> > ??
> 
> Sorry for I didn't answer the question in the short time.
> 
> After spending some time on a confirmation with design, it is
> DMA_SLAVE_BUSWIDTH_4_BYTES and not be configurable. 

Then it should be DMA_SLAVE_BUSWIDTH_4_BYTES and not
DMA_SLAVE_BUSWIDTH_UNDEFINED...

> > > > shouldn't we check if next is in range, we can crash if we get bad value
> > > > from hardware..
> > > 
> > > okay, there are checks for next with ddone bit check and null check in
> > > the corresponding descriptor as the following.
> > 
> > what if you get bad next value
> > 
> 
> next is not hardware value. it's maintained by software which is always
> between 0 to MTK_DMA_SIZE - 1, and definitely doesn't get a bad value.
> 
> > > 
> > > > > +		rxd = &pc->ring.rxd[next];
> > 
> > resulting in bad ref here
> 
> rxd is also definitely a good ref

not if next is out of range, say you read -1 or 200000?

-- 
~Vinod

             reply	other threads:[~2018-03-02  8:17 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-02  8:17 Vinod Koul [this message]
2018-03-02  8:17 ` [PATCH v5 2/3] dmaengine: mediatek: Add MediaTek High-Speed DMA controller for MT7622 and MT7623 SoC Vinod Koul
2018-03-02  8:17 ` Vinod Koul
  -- strict thread matches above, loose matches on Subject: below --
2018-03-02  9:51 [v5,2/3] " sean.wang
2018-03-02  9:51 ` [PATCH v5 2/3] " Sean Wang
2018-03-02  9:51 ` Sean Wang
2018-03-02  9:51 ` Sean Wang
2018-03-02  6:47 [v5,2/3] " sean.wang
2018-03-02  6:47 ` [PATCH v5 2/3] " Sean Wang
2018-03-02  6:47 ` Sean Wang
2018-03-02  6:47 ` Sean Wang
2018-03-01 12:56 [v5,2/3] " Vinod Koul
2018-03-01 12:56 ` [PATCH v5 2/3] " Vinod Koul
2018-03-01 12:56 ` Vinod Koul
2018-03-01 10:27 [v5,2/3] " sean.wang
2018-03-01 10:27 ` [PATCH v5 2/3] " Sean Wang
2018-03-01 10:27 ` Sean Wang
2018-03-01 10:27 ` Sean Wang
2018-03-01  8:23 [v5,2/3] " Vinod Koul
2018-03-01  8:23 ` [PATCH v5 2/3] " Vinod Koul
2018-03-01  8:23 ` Vinod Koul
2018-02-19 20:31 [v5,1/3] dt-bindings: dmaengine: Add MediaTek High-Speed DMA controller bindings Rob Herring
2018-02-19 20:31 ` [PATCH v5 1/3] " Rob Herring
2018-02-19 20:31 ` Rob Herring
2018-02-19 20:31 ` Rob Herring
2018-02-17 19:08 [v5,3/3] dmaengine: mediatek: update MAINTAINERS entry with MediaTek DMA driver sean.wang
2018-02-17 19:08 ` [PATCH v5 3/3] " sean.wang
2018-02-17 19:08 ` sean.wang at mediatek.com
2018-02-17 19:08 ` sean.wang
2018-02-17 19:08 [v5,2/3] dmaengine: mediatek: Add MediaTek High-Speed DMA controller for MT7622 and MT7623 SoC sean.wang
2018-02-17 19:08 ` [PATCH v5 2/3] " sean.wang
2018-02-17 19:08 ` sean.wang at mediatek.com
2018-02-17 19:08 ` sean.wang-NuS5LvNUpcJWk0Htik3J/w
2018-02-17 19:08 [v5,1/3] dt-bindings: dmaengine: Add MediaTek High-Speed DMA controller bindings sean.wang
2018-02-17 19:08 ` [PATCH v5 1/3] " sean.wang
2018-02-17 19:08 ` sean.wang at mediatek.com
2018-02-17 19:08 ` sean.wang-NuS5LvNUpcJWk0Htik3J/w
2018-02-17 19:08 [PATCH v5 0/3] add support for Mediatek High-Speed DMA controller on MT7622 and MT7623 SoC sean.wang
2018-02-17 19:08 ` sean.wang
2018-02-17 19:08 ` sean.wang at mediatek.com

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