From: Boris Brezillon <boris.brezillon@bootlin.com>
To: Peter Rosin <peda@axentia.se>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>,
Richard Weinberger <richard@nod.at>,
Josh Wu <rainyfeeling@outlook.com>,
Nicolas Ferre <nicolas.ferre@microchip.com>,
linux-kernel@vger.kernel.org, Marek Vasut <marek.vasut@gmail.com>,
linux-mtd@lists.infradead.org,
Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>,
Brian Norris <computersforpeace@gmail.com>,
David Woodhouse <dwmw2@infradead.org>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] mtd: nand: raw: atmel: add module param to avoid using dma
Date: Tue, 3 Apr 2018 09:32:29 +0200 [thread overview]
Message-ID: <20180403093229.66dd1dcf@bbrezillon> (raw)
In-Reply-To: <20180403091522.1a498544@bbrezillon>
On Tue, 3 Apr 2018 09:15:22 +0200
Boris Brezillon <boris.brezillon@bootlin.com> wrote:
>
> >
> > to
> >
> > 0 33--3--3--3333--
> > 1 33--3--3--3333--
> > 2 33--------------
> > 3 -3--------333---
> > 4 33--------------
> > 5 3---------------
> > 6 33--33-33333333-
> > 7 --1-1--3--------
> > 8 -1---1--3--3----
>
> Why do you change priority on slave 7 and 8 (AKA DDR port 0 and 1)?
> They don't seem to be used by the LCDC.
>
> > 9 --1-1--3-33-333-
>
> Shouldn't we have
>
> 9 -1---1--3--1----
>
> here?
Never mind. I just read the email where you explain the datasheet vs
reality mismatch after this one.
I guess we'll have to wait for a Nicolas' feedback here.
--
Boris Brezillon, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
WARNING: multiple messages have this Message-ID (diff)
From: boris.brezillon@bootlin.com (Boris Brezillon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] mtd: nand: raw: atmel: add module param to avoid using dma
Date: Tue, 3 Apr 2018 09:32:29 +0200 [thread overview]
Message-ID: <20180403093229.66dd1dcf@bbrezillon> (raw)
In-Reply-To: <20180403091522.1a498544@bbrezillon>
On Tue, 3 Apr 2018 09:15:22 +0200
Boris Brezillon <boris.brezillon@bootlin.com> wrote:
>
> >
> > to
> >
> > 0 33--3--3--3333--
> > 1 33--3--3--3333--
> > 2 33--------------
> > 3 -3--------333---
> > 4 33--------------
> > 5 3---------------
> > 6 33--33-33333333-
> > 7 --1-1--3--------
> > 8 -1---1--3--3----
>
> Why do you change priority on slave 7 and 8 (AKA DDR port 0 and 1)?
> They don't seem to be used by the LCDC.
>
> > 9 --1-1--3-33-333-
>
> Shouldn't we have
>
> 9 -1---1--3--1----
>
> here?
Never mind. I just read the email where you explain the datasheet vs
reality mismatch after this one.
I guess we'll have to wait for a Nicolas' feedback here.
--
Boris Brezillon, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
next prev parent reply other threads:[~2018-04-03 7:32 UTC|newest]
Thread overview: 117+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-29 13:10 [PATCH] mtd: nand: raw: atmel: add module param to avoid using dma Peter Rosin
2018-03-29 13:10 ` Peter Rosin
2018-03-29 13:33 ` Boris Brezillon
2018-03-29 13:33 ` Boris Brezillon
2018-03-29 13:37 ` Peter Rosin
2018-03-29 13:37 ` Peter Rosin
2018-03-29 13:44 ` Boris Brezillon
2018-03-29 13:44 ` Boris Brezillon
2018-03-29 14:27 ` Peter Rosin
2018-03-29 14:27 ` Peter Rosin
2018-03-30 21:43 ` Peter Rosin
2018-03-30 21:43 ` Peter Rosin
2018-04-02 12:22 ` Boris Brezillon
2018-04-02 12:22 ` Boris Brezillon
2018-04-02 17:59 ` Peter Rosin
2018-04-02 17:59 ` Peter Rosin
2018-04-02 19:28 ` Boris Brezillon
2018-04-02 19:28 ` Boris Brezillon
2018-04-02 20:20 ` Boris Brezillon
2018-04-02 20:20 ` Boris Brezillon
2018-04-02 20:32 ` Boris Brezillon
2018-04-02 20:32 ` Boris Brezillon
2018-04-03 6:11 ` Peter Rosin
2018-04-03 6:11 ` Peter Rosin
2018-04-03 7:18 ` Boris Brezillon
2018-04-03 7:18 ` Boris Brezillon
2018-04-11 14:44 ` Peter Rosin
2018-04-11 14:44 ` Peter Rosin
2018-04-11 14:59 ` Boris Brezillon
2018-04-11 14:59 ` Boris Brezillon
2018-04-11 15:10 ` Peter Rosin
2018-04-11 15:10 ` Peter Rosin
2018-04-11 15:34 ` Boris Brezillon
2018-04-11 15:34 ` Boris Brezillon
2018-04-11 15:34 ` Nicolas Ferre
2018-04-11 15:34 ` Nicolas Ferre
2018-04-12 7:18 ` Peter Rosin
2018-04-12 7:18 ` Peter Rosin
2018-05-22 18:03 ` Peter Rosin
2018-05-22 18:03 ` Peter Rosin
2018-05-23 10:42 ` Boris Brezillon
2018-05-23 10:42 ` Boris Brezillon
2018-05-25 14:51 ` Tudor Ambarus
2018-05-25 14:51 ` Tudor Ambarus
2018-05-26 17:40 ` Peter Rosin
2018-05-26 17:40 ` Peter Rosin
2018-05-27 9:18 ` Peter Rosin
2018-05-27 9:18 ` Peter Rosin
2018-05-27 22:11 ` Peter Rosin
2018-05-27 22:11 ` Peter Rosin
2018-05-28 10:10 ` Peter Rosin
2018-05-28 10:10 ` Peter Rosin
2018-05-28 14:27 ` Boris Brezillon
2018-05-28 14:27 ` Boris Brezillon
2018-05-28 15:52 ` Peter Rosin
2018-05-28 15:52 ` Peter Rosin
2018-05-28 16:09 ` Boris Brezillon
2018-05-28 16:09 ` Boris Brezillon
2018-05-28 16:09 ` Nicolas Ferre
2018-05-28 16:09 ` Nicolas Ferre
2018-05-29 6:30 ` Eugen Hristev
2018-05-29 6:30 ` Eugen Hristev
2018-05-29 7:10 ` Peter Rosin
2018-05-29 7:10 ` Peter Rosin
2018-05-29 7:25 ` Eugen Hristev
2018-05-29 7:25 ` Eugen Hristev
2018-05-29 14:49 ` Boris Brezillon
2018-05-29 14:49 ` Boris Brezillon
2018-05-29 15:01 ` Eugen Hristev
2018-05-29 15:01 ` Eugen Hristev
2018-05-29 15:15 ` Boris Brezillon
2018-05-29 15:15 ` Boris Brezillon
2018-05-29 15:21 ` Eugen Hristev
2018-05-29 15:21 ` Eugen Hristev
2018-05-29 15:46 ` Boris Brezillon
2018-05-29 15:46 ` Boris Brezillon
2018-05-29 17:57 ` Boris Brezillon
2018-05-29 17:57 ` Boris Brezillon
2018-05-29 21:37 ` Peter Rosin
2018-05-29 21:37 ` Peter Rosin
2018-06-04 15:46 ` Tudor Ambarus
2018-06-04 15:46 ` Tudor Ambarus
2018-06-04 16:03 ` Boris Brezillon
2018-06-04 16:03 ` Boris Brezillon
2022-06-16 15:54 ` SAMA5D3 Display FIFO underflow (Was: Re: [PATCH] mtd: nand: raw: atmel: add module param to avoid using dma) Ahmad Fatoum
2022-07-25 14:17 ` Ahmad Fatoum
2022-07-28 8:03 ` Tudor.Ambarus
2018-04-03 6:51 ` [PATCH] mtd: nand: raw: atmel: add module param to avoid using dma Peter Rosin
2018-04-03 6:51 ` Peter Rosin
2018-04-03 7:15 ` Boris Brezillon
2018-04-03 7:15 ` Boris Brezillon
2018-04-03 7:32 ` Boris Brezillon [this message]
2018-04-03 7:32 ` Boris Brezillon
2018-04-03 8:14 ` Peter Rosin
2018-04-03 8:14 ` Peter Rosin
2018-04-03 8:30 ` Boris Brezillon
2018-04-03 8:30 ` Boris Brezillon
2018-04-02 20:23 ` Peter Rosin
2018-04-02 20:23 ` Peter Rosin
2018-04-02 20:35 ` Boris Brezillon
2018-04-02 20:35 ` Boris Brezillon
2018-04-03 7:18 ` Alexandre Belloni
2018-04-03 7:18 ` Alexandre Belloni
2018-04-03 8:37 ` Peter Rosin
2018-04-03 8:37 ` Peter Rosin
2018-03-29 14:20 ` Nicolas Ferre
2018-03-29 14:20 ` Nicolas Ferre
2018-03-29 14:23 ` Peter Rosin
2018-03-29 14:23 ` Peter Rosin
2018-03-29 14:29 ` Boris Brezillon
2018-03-29 14:29 ` Boris Brezillon
2018-06-18 8:39 ` Boris Brezillon
2018-06-18 8:39 ` Boris Brezillon
2018-06-18 14:00 ` Miquel Raynal
2018-06-18 14:00 ` Miquel Raynal
2018-06-25 12:31 ` Miquel Raynal
2018-06-25 12:31 ` Miquel Raynal
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