* [PATCH V2 1/2] clk: imx6sx: add missing lvds2 clock to the clock tree
@ 2018-03-19 2:30 ` Anson Huang
0 siblings, 0 replies; 33+ messages in thread
From: Anson Huang @ 2018-03-19 2:30 UTC (permalink / raw)
To: shawnguo, kernel, fabio.estevam, robh+dt, mark.rutland, linux,
mturquette, sboyd, shengjiu.wang
Cc: Linux-imx, linux-arm-kernel, devicetree, linux-kernel, linux-clk
i.MX6SX has lvds2 (analog clock2), an I/O clock like lvds1.
And this lvds2, along with lvds1, can be used to provide
external clock source to the internal pll, such as pll4_audio
and pll5_video.
This patch mainly adds the lvds2 to the clock tree and fix its
relationship with pll accordingly.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
---
drivers/clk/imx/clk-imx6sx.c | 8 ++++++--
include/dt-bindings/clock/imx6sx-clock.h | 6 +++++-
2 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/imx/clk-imx6sx.c b/drivers/clk/imx/clk-imx6sx.c
index e6d389e..478ad0d 100644
--- a/drivers/clk/imx/clk-imx6sx.c
+++ b/drivers/clk/imx/clk-imx6sx.c
@@ -80,7 +80,7 @@ static const char *lvds_sels[] = {
"arm", "pll1_sys", "dummy", "dummy", "dummy", "dummy", "dummy", "pll5_video_div",
"dummy", "dummy", "pcie_ref_125m", "dummy", "usbphy1", "usbphy2",
};
-static const char *pll_bypass_src_sels[] = { "osc", "lvds1_in", };
+static const char *pll_bypass_src_sels[] = { "osc", "lvds1_in", "lvds2_in", "dummy", };
static const char *pll1_bypass_sels[] = { "pll1", "pll1_bypass_src", };
static const char *pll2_bypass_sels[] = { "pll2", "pll2_bypass_src", };
static const char *pll3_bypass_sels[] = { "pll3", "pll3_bypass_src", };
@@ -158,8 +158,9 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
clks[IMX6SX_CLK_IPP_DI0] = of_clk_get_by_name(ccm_node, "ipp_di0");
clks[IMX6SX_CLK_IPP_DI1] = of_clk_get_by_name(ccm_node, "ipp_di1");
- /* Clock source from external clock via CLK1 PAD */
+ /* Clock source from external clock via CLK1/2 PAD */
clks[IMX6SX_CLK_ANACLK1] = imx_obtain_fixed_clock("anaclk1", 0);
+ clks[IMX6SX_CLK_ANACLK2] = imx_obtain_fixed_clock("anaclk2", 0);
np = of_find_compatible_node(NULL, NULL, "fsl,imx6sx-anatop");
base = of_iomap(np, 0);
@@ -228,7 +229,9 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
clks[IMX6SX_CLK_PCIE_REF_125M] = imx_clk_gate("pcie_ref_125m", "pcie_ref", base + 0xe0, 19);
clks[IMX6SX_CLK_LVDS1_OUT] = imx_clk_gate_exclusive("lvds1_out", "lvds1_sel", base + 0x160, 10, BIT(12));
+ clks[IMX6SX_CLK_LVDS2_OUT] = imx_clk_gate_exclusive("lvds2_out", "lvds2_sel", base + 0x160, 11, BIT(13));
clks[IMX6SX_CLK_LVDS1_IN] = imx_clk_gate_exclusive("lvds1_in", "anaclk1", base + 0x160, 12, BIT(10));
+ clks[IMX6SX_CLK_LVDS2_IN] = imx_clk_gate_exclusive("lvds2_in", "anaclk2", base + 0x160, 13, BIT(11));
clks[IMX6SX_CLK_ENET_REF] = clk_register_divider_table(NULL, "enet_ref", "pll6_enet", 0,
base + 0xe0, 0, 2, 0, clk_enet_ref_table,
@@ -270,6 +273,7 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
/* name reg shift width parent_names num_parents */
clks[IMX6SX_CLK_LVDS1_SEL] = imx_clk_mux("lvds1_sel", base + 0x160, 0, 5, lvds_sels, ARRAY_SIZE(lvds_sels));
+ clks[IMX6SX_CLK_LVDS2_SEL] = imx_clk_mux("lvds2_sel", base + 0x160, 5, 5, lvds_sels, ARRAY_SIZE(lvds_sels));
np = ccm_node;
base = of_iomap(np, 0);
diff --git a/include/dt-bindings/clock/imx6sx-clock.h b/include/dt-bindings/clock/imx6sx-clock.h
index 36f0324..cd2d6c5 100644
--- a/include/dt-bindings/clock/imx6sx-clock.h
+++ b/include/dt-bindings/clock/imx6sx-clock.h
@@ -275,6 +275,10 @@
#define IMX6SX_PLL6_BYPASS 262
#define IMX6SX_PLL7_BYPASS 263
#define IMX6SX_CLK_SPDIF_GCLK 264
-#define IMX6SX_CLK_CLK_END 265
+#define IMX6SX_CLK_LVDS2_SEL 265
+#define IMX6SX_CLK_LVDS2_OUT 266
+#define IMX6SX_CLK_LVDS2_IN 267
+#define IMX6SX_CLK_ANACLK2 268
+#define IMX6SX_CLK_CLK_END 269
#endif /* __DT_BINDINGS_CLOCK_IMX6SX_H */
--
2.7.4
^ permalink raw reply related [flat|nested] 33+ messages in thread* [PATCH V2 1/2] clk: imx6sx: add missing lvds2 clock to the clock tree
@ 2018-03-19 2:30 ` Anson Huang
0 siblings, 0 replies; 33+ messages in thread
From: Anson Huang @ 2018-03-19 2:30 UTC (permalink / raw)
To: linux-arm-kernel
i.MX6SX has lvds2 (analog clock2), an I/O clock like lvds1.
And this lvds2, along with lvds1, can be used to provide
external clock source to the internal pll, such as pll4_audio
and pll5_video.
This patch mainly adds the lvds2 to the clock tree and fix its
relationship with pll accordingly.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
---
drivers/clk/imx/clk-imx6sx.c | 8 ++++++--
include/dt-bindings/clock/imx6sx-clock.h | 6 +++++-
2 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/imx/clk-imx6sx.c b/drivers/clk/imx/clk-imx6sx.c
index e6d389e..478ad0d 100644
--- a/drivers/clk/imx/clk-imx6sx.c
+++ b/drivers/clk/imx/clk-imx6sx.c
@@ -80,7 +80,7 @@ static const char *lvds_sels[] = {
"arm", "pll1_sys", "dummy", "dummy", "dummy", "dummy", "dummy", "pll5_video_div",
"dummy", "dummy", "pcie_ref_125m", "dummy", "usbphy1", "usbphy2",
};
-static const char *pll_bypass_src_sels[] = { "osc", "lvds1_in", };
+static const char *pll_bypass_src_sels[] = { "osc", "lvds1_in", "lvds2_in", "dummy", };
static const char *pll1_bypass_sels[] = { "pll1", "pll1_bypass_src", };
static const char *pll2_bypass_sels[] = { "pll2", "pll2_bypass_src", };
static const char *pll3_bypass_sels[] = { "pll3", "pll3_bypass_src", };
@@ -158,8 +158,9 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
clks[IMX6SX_CLK_IPP_DI0] = of_clk_get_by_name(ccm_node, "ipp_di0");
clks[IMX6SX_CLK_IPP_DI1] = of_clk_get_by_name(ccm_node, "ipp_di1");
- /* Clock source from external clock via CLK1 PAD */
+ /* Clock source from external clock via CLK1/2 PAD */
clks[IMX6SX_CLK_ANACLK1] = imx_obtain_fixed_clock("anaclk1", 0);
+ clks[IMX6SX_CLK_ANACLK2] = imx_obtain_fixed_clock("anaclk2", 0);
np = of_find_compatible_node(NULL, NULL, "fsl,imx6sx-anatop");
base = of_iomap(np, 0);
@@ -228,7 +229,9 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
clks[IMX6SX_CLK_PCIE_REF_125M] = imx_clk_gate("pcie_ref_125m", "pcie_ref", base + 0xe0, 19);
clks[IMX6SX_CLK_LVDS1_OUT] = imx_clk_gate_exclusive("lvds1_out", "lvds1_sel", base + 0x160, 10, BIT(12));
+ clks[IMX6SX_CLK_LVDS2_OUT] = imx_clk_gate_exclusive("lvds2_out", "lvds2_sel", base + 0x160, 11, BIT(13));
clks[IMX6SX_CLK_LVDS1_IN] = imx_clk_gate_exclusive("lvds1_in", "anaclk1", base + 0x160, 12, BIT(10));
+ clks[IMX6SX_CLK_LVDS2_IN] = imx_clk_gate_exclusive("lvds2_in", "anaclk2", base + 0x160, 13, BIT(11));
clks[IMX6SX_CLK_ENET_REF] = clk_register_divider_table(NULL, "enet_ref", "pll6_enet", 0,
base + 0xe0, 0, 2, 0, clk_enet_ref_table,
@@ -270,6 +273,7 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
/* name reg shift width parent_names num_parents */
clks[IMX6SX_CLK_LVDS1_SEL] = imx_clk_mux("lvds1_sel", base + 0x160, 0, 5, lvds_sels, ARRAY_SIZE(lvds_sels));
+ clks[IMX6SX_CLK_LVDS2_SEL] = imx_clk_mux("lvds2_sel", base + 0x160, 5, 5, lvds_sels, ARRAY_SIZE(lvds_sels));
np = ccm_node;
base = of_iomap(np, 0);
diff --git a/include/dt-bindings/clock/imx6sx-clock.h b/include/dt-bindings/clock/imx6sx-clock.h
index 36f0324..cd2d6c5 100644
--- a/include/dt-bindings/clock/imx6sx-clock.h
+++ b/include/dt-bindings/clock/imx6sx-clock.h
@@ -275,6 +275,10 @@
#define IMX6SX_PLL6_BYPASS 262
#define IMX6SX_PLL7_BYPASS 263
#define IMX6SX_CLK_SPDIF_GCLK 264
-#define IMX6SX_CLK_CLK_END 265
+#define IMX6SX_CLK_LVDS2_SEL 265
+#define IMX6SX_CLK_LVDS2_OUT 266
+#define IMX6SX_CLK_LVDS2_IN 267
+#define IMX6SX_CLK_ANACLK2 268
+#define IMX6SX_CLK_CLK_END 269
#endif /* __DT_BINDINGS_CLOCK_IMX6SX_H */
--
2.7.4
^ permalink raw reply related [flat|nested] 33+ messages in thread* [PATCH V2 2/2] ARM: dts: imx6sx-sabreauto: add external 24MHz clock source
2018-03-19 2:30 ` Anson Huang
(?)
@ 2018-03-19 2:30 ` Anson Huang
-1 siblings, 0 replies; 33+ messages in thread
From: Anson Huang @ 2018-03-19 2:30 UTC (permalink / raw)
To: shawnguo, kernel, fabio.estevam, robh+dt, mark.rutland, linux,
mturquette, sboyd, shengjiu.wang
Cc: Linux-imx, linux-arm-kernel, devicetree, linux-kernel, linux-clk
On i.MX6SX SabreAuto board, there is external 24MHz clock
source for analog clock2, add this clock source to clock tree.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
changes since V1:
remove unnecessary clocks container.
arch/arm/boot/dts/imx6sx-sabreauto.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/imx6sx-sabreauto.dts b/arch/arm/boot/dts/imx6sx-sabreauto.dts
index 72da5ac..a3b022b 100644
--- a/arch/arm/boot/dts/imx6sx-sabreauto.dts
+++ b/arch/arm/boot/dts/imx6sx-sabreauto.dts
@@ -18,6 +18,12 @@
reg = <0x80000000 0x80000000>;
};
+ codec_osc: anaclk2 {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <24576000>;
+ };
+
regulators {
compatible = "simple-bus";
#address-cells = <1>;
--
2.7.4
^ permalink raw reply related [flat|nested] 33+ messages in thread* [PATCH V2 2/2] ARM: dts: imx6sx-sabreauto: add external 24MHz clock source
@ 2018-03-19 2:30 ` Anson Huang
0 siblings, 0 replies; 33+ messages in thread
From: Anson Huang @ 2018-03-19 2:30 UTC (permalink / raw)
To: shawnguo, kernel, fabio.estevam, robh+dt, mark.rutland, linux,
mturquette, sboyd, shengjiu.wang
Cc: Linux-imx, linux-arm-kernel, devicetree, linux-kernel, linux-clk
On i.MX6SX SabreAuto board, there is external 24MHz clock
source for analog clock2, add this clock source to clock tree.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
changes since V1:
remove unnecessary clocks container.
arch/arm/boot/dts/imx6sx-sabreauto.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/imx6sx-sabreauto.dts b/arch/arm/boot/dts/imx6sx-sabreauto.dts
index 72da5ac..a3b022b 100644
--- a/arch/arm/boot/dts/imx6sx-sabreauto.dts
+++ b/arch/arm/boot/dts/imx6sx-sabreauto.dts
@@ -18,6 +18,12 @@
reg = <0x80000000 0x80000000>;
};
+ codec_osc: anaclk2 {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <24576000>;
+ };
+
regulators {
compatible = "simple-bus";
#address-cells = <1>;
--
2.7.4
^ permalink raw reply related [flat|nested] 33+ messages in thread* [PATCH V2 2/2] ARM: dts: imx6sx-sabreauto: add external 24MHz clock source
@ 2018-03-19 2:30 ` Anson Huang
0 siblings, 0 replies; 33+ messages in thread
From: Anson Huang @ 2018-03-19 2:30 UTC (permalink / raw)
To: linux-arm-kernel
On i.MX6SX SabreAuto board, there is external 24MHz clock
source for analog clock2, add this clock source to clock tree.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
changes since V1:
remove unnecessary clocks container.
arch/arm/boot/dts/imx6sx-sabreauto.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/imx6sx-sabreauto.dts b/arch/arm/boot/dts/imx6sx-sabreauto.dts
index 72da5ac..a3b022b 100644
--- a/arch/arm/boot/dts/imx6sx-sabreauto.dts
+++ b/arch/arm/boot/dts/imx6sx-sabreauto.dts
@@ -18,6 +18,12 @@
reg = <0x80000000 0x80000000>;
};
+ codec_osc: anaclk2 {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <24576000>;
+ };
+
regulators {
compatible = "simple-bus";
#address-cells = <1>;
--
2.7.4
^ permalink raw reply related [flat|nested] 33+ messages in thread* Re: [PATCH V2 2/2] ARM: dts: imx6sx-sabreauto: add external 24MHz clock source
2018-03-19 2:30 ` Anson Huang
@ 2018-04-17 14:22 ` Shawn Guo
-1 siblings, 0 replies; 33+ messages in thread
From: Shawn Guo @ 2018-04-17 14:22 UTC (permalink / raw)
To: Anson Huang
Cc: kernel, fabio.estevam, robh+dt, mark.rutland, linux, mturquette,
sboyd, shengjiu.wang, Linux-imx, linux-arm-kernel, devicetree,
linux-kernel, linux-clk
On Mon, Mar 19, 2018 at 10:30:45AM +0800, Anson Huang wrote:
> On i.MX6SX SabreAuto board, there is external 24MHz clock
> source for analog clock2, add this clock source to clock tree.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> ---
> changes since V1:
> remove unnecessary clocks container.
I understand this is suggested by Fabio, but I'm afraid that it's not
going to work with imx_obtain_fixed_clock() call, which is coded to
look for clocks under /clocks node.
Shawn
> arch/arm/boot/dts/imx6sx-sabreauto.dts | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx6sx-sabreauto.dts b/arch/arm/boot/dts/imx6sx-sabreauto.dts
> index 72da5ac..a3b022b 100644
> --- a/arch/arm/boot/dts/imx6sx-sabreauto.dts
> +++ b/arch/arm/boot/dts/imx6sx-sabreauto.dts
> @@ -18,6 +18,12 @@
> reg = <0x80000000 0x80000000>;
> };
>
> + codec_osc: anaclk2 {
> + #clock-cells = <0>;
> + compatible = "fixed-clock";
> + clock-frequency = <24576000>;
> + };
> +
> regulators {
> compatible = "simple-bus";
> #address-cells = <1>;
> --
> 2.7.4
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-clk" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 33+ messages in thread* [PATCH V2 2/2] ARM: dts: imx6sx-sabreauto: add external 24MHz clock source
@ 2018-04-17 14:22 ` Shawn Guo
0 siblings, 0 replies; 33+ messages in thread
From: Shawn Guo @ 2018-04-17 14:22 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Mar 19, 2018 at 10:30:45AM +0800, Anson Huang wrote:
> On i.MX6SX SabreAuto board, there is external 24MHz clock
> source for analog clock2, add this clock source to clock tree.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> ---
> changes since V1:
> remove unnecessary clocks container.
I understand this is suggested by Fabio, but I'm afraid that it's not
going to work with imx_obtain_fixed_clock() call, which is coded to
look for clocks under /clocks node.
Shawn
> arch/arm/boot/dts/imx6sx-sabreauto.dts | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx6sx-sabreauto.dts b/arch/arm/boot/dts/imx6sx-sabreauto.dts
> index 72da5ac..a3b022b 100644
> --- a/arch/arm/boot/dts/imx6sx-sabreauto.dts
> +++ b/arch/arm/boot/dts/imx6sx-sabreauto.dts
> @@ -18,6 +18,12 @@
> reg = <0x80000000 0x80000000>;
> };
>
> + codec_osc: anaclk2 {
> + #clock-cells = <0>;
> + compatible = "fixed-clock";
> + clock-frequency = <24576000>;
> + };
> +
> regulators {
> compatible = "simple-bus";
> #address-cells = <1>;
> --
> 2.7.4
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-clk" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 33+ messages in thread* Re: [PATCH V2 2/2] ARM: dts: imx6sx-sabreauto: add external 24MHz clock source
2018-04-17 14:22 ` Shawn Guo
(?)
@ 2018-04-19 3:17 ` Stephen Boyd
-1 siblings, 0 replies; 33+ messages in thread
From: Stephen Boyd @ 2018-04-19 3:17 UTC (permalink / raw)
To: Anson Huang, Shawn Guo
Cc: mark.rutland, devicetree, mturquette, linux-clk, linux,
linux-kernel, robh+dt, Linux-imx, kernel, fabio.estevam,
shengjiu.wang, linux-arm-kernel
Quoting Shawn Guo (2018-04-17 07:22:05)
> On Mon, Mar 19, 2018 at 10:30:45AM +0800, Anson Huang wrote:
> > On i.MX6SX SabreAuto board, there is external 24MHz clock
> > source for analog clock2, add this clock source to clock tree.
> > =
> > Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> > ---
> > changes since V1:
> > remove unnecessary clocks container.
> =
> I understand this is suggested by Fabio, but I'm afraid that it's not
> going to work with imx_obtain_fixed_clock() call, which is coded to
> look for clocks under /clocks node.
> =
Should patch #1 be dropped from clk tree?
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH V2 2/2] ARM: dts: imx6sx-sabreauto: add external 24MHz clock source
@ 2018-04-19 3:17 ` Stephen Boyd
0 siblings, 0 replies; 33+ messages in thread
From: Stephen Boyd @ 2018-04-19 3:17 UTC (permalink / raw)
To: Anson Huang, Shawn Guo
Cc: mark.rutland, devicetree, mturquette, linux-clk, linux,
linux-kernel, robh+dt, Linux-imx, kernel, fabio.estevam,
shengjiu.wang, linux-arm-kernel
Quoting Shawn Guo (2018-04-17 07:22:05)
> On Mon, Mar 19, 2018 at 10:30:45AM +0800, Anson Huang wrote:
> > On i.MX6SX SabreAuto board, there is external 24MHz clock
> > source for analog clock2, add this clock source to clock tree.
> >
> > Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> > ---
> > changes since V1:
> > remove unnecessary clocks container.
>
> I understand this is suggested by Fabio, but I'm afraid that it's not
> going to work with imx_obtain_fixed_clock() call, which is coded to
> look for clocks under /clocks node.
>
Should patch #1 be dropped from clk tree?
^ permalink raw reply [flat|nested] 33+ messages in thread
* [PATCH V2 2/2] ARM: dts: imx6sx-sabreauto: add external 24MHz clock source
@ 2018-04-19 3:17 ` Stephen Boyd
0 siblings, 0 replies; 33+ messages in thread
From: Stephen Boyd @ 2018-04-19 3:17 UTC (permalink / raw)
To: linux-arm-kernel
Quoting Shawn Guo (2018-04-17 07:22:05)
> On Mon, Mar 19, 2018 at 10:30:45AM +0800, Anson Huang wrote:
> > On i.MX6SX SabreAuto board, there is external 24MHz clock
> > source for analog clock2, add this clock source to clock tree.
> >
> > Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> > ---
> > changes since V1:
> > remove unnecessary clocks container.
>
> I understand this is suggested by Fabio, but I'm afraid that it's not
> going to work with imx_obtain_fixed_clock() call, which is coded to
> look for clocks under /clocks node.
>
Should patch #1 be dropped from clk tree?
^ permalink raw reply [flat|nested] 33+ messages in thread
* RE: [PATCH V2 2/2] ARM: dts: imx6sx-sabreauto: add external 24MHz clock source
2018-04-19 3:17 ` Stephen Boyd
(?)
@ 2018-04-19 3:23 ` Anson Huang
-1 siblings, 0 replies; 33+ messages in thread
From: Anson Huang @ 2018-04-19 3:23 UTC (permalink / raw)
To: Stephen Boyd, Shawn Guo
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
mturquette@baylibre.com, linux-clk@vger.kernel.org,
linux@armlinux.org.uk, linux-kernel@vger.kernel.org,
robh+dt@kernel.org, dl-linux-imx, kernel@pengutronix.de,
Fabio Estevam, S.j. Wang, linux-arm-kernel@lists.infradead.org
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Z2UtLS0tLQ0KPiBGcm9tOiBTdGVwaGVuIEJveWQgW21haWx0bzpzYm95ZEBrZXJuZWwub3JnXQ0K
PiBTZW50OiBUaHVyc2RheSwgQXByaWwgMTksIDIwMTggMTE6MTggQU0NCj4gVG86IEFuc29uIEh1
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b2J0YWluX2ZpeGVkX2Nsb2NrKCkgY2FsbCwgd2hpY2ggaXMgY29kZWQgdG8NCj4gPiBsb29rIGZv
ciBjbG9ja3MgdW5kZXIgL2Nsb2NrcyBub2RlLg0KPiA+DQo+IA0KPiBTaG91bGQgcGF0Y2ggIzEg
YmUgZHJvcHBlZCBmcm9tIGNsayB0cmVlPw0KDQpJZiBzbywgSSB0aGluayB3ZSBzaG91bGQgdXNl
IFYxIHBhdGNoIHRvIGtlZXAgY2xvY2tzIGNvbnRhaW5lcj8NCiANCkFuc29uLg0KDQoNCg0K
^ permalink raw reply [flat|nested] 33+ messages in thread
* RE: [PATCH V2 2/2] ARM: dts: imx6sx-sabreauto: add external 24MHz clock source
@ 2018-04-19 3:23 ` Anson Huang
0 siblings, 0 replies; 33+ messages in thread
From: Anson Huang @ 2018-04-19 3:23 UTC (permalink / raw)
To: Stephen Boyd, Shawn Guo
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
mturquette@baylibre.com, linux-clk@vger.kernel.org,
linux@armlinux.org.uk, linux-kernel@vger.kernel.org,
robh+dt@kernel.org, dl-linux-imx, kernel@pengutronix.de,
Fabio Estevam, S.j. Wang, linux-arm-kernel@lists.infradead.org
Anson Huang
Best Regards!
> -----Original Message-----
> From: Stephen Boyd [mailto:sboyd@kernel.org]
> Sent: Thursday, April 19, 2018 11:18 AM
> To: Anson Huang <anson.huang@nxp.com>; Shawn Guo
> <shawnguo@kernel.org>
> Cc: mark.rutland@arm.com; devicetree@vger.kernel.org;
> mturquette@baylibre.com; linux-clk@vger.kernel.org; linux@armlinux.org.uk;
> linux-kernel@vger.kernel.org; robh+dt@kernel.org; dl-linux-imx
> <linux-imx@nxp.com>; kernel@pengutronix.de; Fabio Estevam
> <fabio.estevam@nxp.com>; S.j. Wang <shengjiu.wang@nxp.com>;
> linux-arm-kernel@lists.infradead.org
> Subject: Re: [PATCH V2 2/2] ARM: dts: imx6sx-sabreauto: add external 24MHz
> clock source
>
> Quoting Shawn Guo (2018-04-17 07:22:05)
> > On Mon, Mar 19, 2018 at 10:30:45AM +0800, Anson Huang wrote:
> > > On i.MX6SX SabreAuto board, there is external 24MHz clock source for
> > > analog clock2, add this clock source to clock tree.
> > >
> > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> > > ---
> > > changes since V1:
> > > remove unnecessary clocks container.
> >
> > I understand this is suggested by Fabio, but I'm afraid that it's not
> > going to work with imx_obtain_fixed_clock() call, which is coded to
> > look for clocks under /clocks node.
> >
>
> Should patch #1 be dropped from clk tree?
If so, I think we should use V1 patch to keep clocks container?
Anson.
^ permalink raw reply [flat|nested] 33+ messages in thread
* [PATCH V2 2/2] ARM: dts: imx6sx-sabreauto: add external 24MHz clock source
@ 2018-04-19 3:23 ` Anson Huang
0 siblings, 0 replies; 33+ messages in thread
From: Anson Huang @ 2018-04-19 3:23 UTC (permalink / raw)
To: linux-arm-kernel
Anson Huang
Best Regards!
> -----Original Message-----
> From: Stephen Boyd [mailto:sboyd at kernel.org]
> Sent: Thursday, April 19, 2018 11:18 AM
> To: Anson Huang <anson.huang@nxp.com>; Shawn Guo
> <shawnguo@kernel.org>
> Cc: mark.rutland at arm.com; devicetree at vger.kernel.org;
> mturquette at baylibre.com; linux-clk at vger.kernel.org; linux at armlinux.org.uk;
> linux-kernel at vger.kernel.org; robh+dt at kernel.org; dl-linux-imx
> <linux-imx@nxp.com>; kernel at pengutronix.de; Fabio Estevam
> <fabio.estevam@nxp.com>; S.j. Wang <shengjiu.wang@nxp.com>;
> linux-arm-kernel at lists.infradead.org
> Subject: Re: [PATCH V2 2/2] ARM: dts: imx6sx-sabreauto: add external 24MHz
> clock source
>
> Quoting Shawn Guo (2018-04-17 07:22:05)
> > On Mon, Mar 19, 2018 at 10:30:45AM +0800, Anson Huang wrote:
> > > On i.MX6SX SabreAuto board, there is external 24MHz clock source for
> > > analog clock2, add this clock source to clock tree.
> > >
> > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> > > ---
> > > changes since V1:
> > > remove unnecessary clocks container.
> >
> > I understand this is suggested by Fabio, but I'm afraid that it's not
> > going to work with imx_obtain_fixed_clock() call, which is coded to
> > look for clocks under /clocks node.
> >
>
> Should patch #1 be dropped from clk tree?
If so, I think we should use V1 patch to keep clocks container?
Anson.
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH V2 2/2] ARM: dts: imx6sx-sabreauto: add external 24MHz clock source
2018-04-19 3:23 ` Anson Huang
@ 2018-04-19 14:03 ` Shawn Guo
-1 siblings, 0 replies; 33+ messages in thread
From: Shawn Guo @ 2018-04-19 14:03 UTC (permalink / raw)
To: Anson Huang
Cc: Stephen Boyd, mark.rutland@arm.com, devicetree@vger.kernel.org,
S.j. Wang, mturquette@baylibre.com, linux-kernel@vger.kernel.org,
linux@armlinux.org.uk, robh+dt@kernel.org, dl-linux-imx,
kernel@pengutronix.de, Fabio Estevam, linux-clk@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
On Thu, Apr 19, 2018 at 03:23:39AM +0000, Anson Huang wrote:
> If so, I think we should use V1 patch to keep clocks container?
Ah, right. I will just pick up v1 of patch #2.
Shawn
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH V2 2/2] ARM: dts: imx6sx-sabreauto: add external 24MHz clock source
2018-04-19 3:17 ` Stephen Boyd
@ 2018-04-19 14:02 ` Shawn Guo
-1 siblings, 0 replies; 33+ messages in thread
From: Shawn Guo @ 2018-04-19 14:02 UTC (permalink / raw)
To: Stephen Boyd
Cc: Anson Huang, mark.rutland, devicetree, mturquette, linux-clk,
linux, linux-kernel, robh+dt, Linux-imx, kernel, fabio.estevam,
shengjiu.wang, linux-arm-kernel
On Wed, Apr 18, 2018 at 08:17:35PM -0700, Stephen Boyd wrote:
> Quoting Shawn Guo (2018-04-17 07:22:05)
> > On Mon, Mar 19, 2018 at 10:30:45AM +0800, Anson Huang wrote:
> > > On i.MX6SX SabreAuto board, there is external 24MHz clock
> > > source for analog clock2, add this clock source to clock tree.
> > >
> > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> > > ---
> > > changes since V1:
> > > remove unnecessary clocks container.
> >
> > I understand this is suggested by Fabio, but I'm afraid that it's not
> > going to work with imx_obtain_fixed_clock() call, which is coded to
> > look for clocks under /clocks node.
> >
>
> Should patch #1 be dropped from clk tree?
No. Patch #1 is good.
Shawn
^ permalink raw reply [flat|nested] 33+ messages in thread
* [PATCH V2 2/2] ARM: dts: imx6sx-sabreauto: add external 24MHz clock source
@ 2018-04-19 14:02 ` Shawn Guo
0 siblings, 0 replies; 33+ messages in thread
From: Shawn Guo @ 2018-04-19 14:02 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Apr 18, 2018 at 08:17:35PM -0700, Stephen Boyd wrote:
> Quoting Shawn Guo (2018-04-17 07:22:05)
> > On Mon, Mar 19, 2018 at 10:30:45AM +0800, Anson Huang wrote:
> > > On i.MX6SX SabreAuto board, there is external 24MHz clock
> > > source for analog clock2, add this clock source to clock tree.
> > >
> > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> > > ---
> > > changes since V1:
> > > remove unnecessary clocks container.
> >
> > I understand this is suggested by Fabio, but I'm afraid that it's not
> > going to work with imx_obtain_fixed_clock() call, which is coded to
> > look for clocks under /clocks node.
> >
>
> Should patch #1 be dropped from clk tree?
No. Patch #1 is good.
Shawn
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH V2 2/2] ARM: dts: imx6sx-sabreauto: add external 24MHz clock source
2018-04-19 14:02 ` Shawn Guo
@ 2018-04-19 14:24 ` Shawn Guo
-1 siblings, 0 replies; 33+ messages in thread
From: Shawn Guo @ 2018-04-19 14:24 UTC (permalink / raw)
To: Stephen Boyd
Cc: Anson Huang, mark.rutland, devicetree, mturquette, linux-clk,
linux, linux-kernel, robh+dt, Linux-imx, kernel, fabio.estevam,
shengjiu.wang, linux-arm-kernel
On Thu, Apr 19, 2018 at 10:02:37PM +0800, Shawn Guo wrote:
> On Wed, Apr 18, 2018 at 08:17:35PM -0700, Stephen Boyd wrote:
> > Quoting Shawn Guo (2018-04-17 07:22:05)
> > > On Mon, Mar 19, 2018 at 10:30:45AM +0800, Anson Huang wrote:
> > > > On i.MX6SX SabreAuto board, there is external 24MHz clock
> > > > source for analog clock2, add this clock source to clock tree.
> > > >
> > > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> > > > ---
> > > > changes since V1:
> > > > remove unnecessary clocks container.
> > >
> > > I understand this is suggested by Fabio, but I'm afraid that it's not
> > > going to work with imx_obtain_fixed_clock() call, which is coded to
> > > look for clocks under /clocks node.
> > >
> >
> > Should patch #1 be dropped from clk tree?
>
> No. Patch #1 is good.
Sorry, Stephen. I just had a closer look at the driver code, and I
think it can be done in a better way. So please drop patch #1 for now.
Shawn
^ permalink raw reply [flat|nested] 33+ messages in thread
* [PATCH V2 2/2] ARM: dts: imx6sx-sabreauto: add external 24MHz clock source
@ 2018-04-19 14:24 ` Shawn Guo
0 siblings, 0 replies; 33+ messages in thread
From: Shawn Guo @ 2018-04-19 14:24 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Apr 19, 2018 at 10:02:37PM +0800, Shawn Guo wrote:
> On Wed, Apr 18, 2018 at 08:17:35PM -0700, Stephen Boyd wrote:
> > Quoting Shawn Guo (2018-04-17 07:22:05)
> > > On Mon, Mar 19, 2018 at 10:30:45AM +0800, Anson Huang wrote:
> > > > On i.MX6SX SabreAuto board, there is external 24MHz clock
> > > > source for analog clock2, add this clock source to clock tree.
> > > >
> > > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> > > > ---
> > > > changes since V1:
> > > > remove unnecessary clocks container.
> > >
> > > I understand this is suggested by Fabio, but I'm afraid that it's not
> > > going to work with imx_obtain_fixed_clock() call, which is coded to
> > > look for clocks under /clocks node.
> > >
> >
> > Should patch #1 be dropped from clk tree?
>
> No. Patch #1 is good.
Sorry, Stephen. I just had a closer look at the driver code, and I
think it can be done in a better way. So please drop patch #1 for now.
Shawn
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH V2 2/2] ARM: dts: imx6sx-sabreauto: add external 24MHz clock source
2018-04-19 14:24 ` Shawn Guo
(?)
@ 2018-04-19 19:32 ` Stephen Boyd
-1 siblings, 0 replies; 33+ messages in thread
From: Stephen Boyd @ 2018-04-19 19:32 UTC (permalink / raw)
To: Shawn Guo
Cc: Anson Huang, mark.rutland, devicetree, mturquette, linux-clk,
linux, linux-kernel, robh+dt, Linux-imx, kernel, fabio.estevam,
shengjiu.wang, linux-arm-kernel
Quoting Shawn Guo (2018-04-19 07:24:42)
> On Thu, Apr 19, 2018 at 10:02:37PM +0800, Shawn Guo wrote:
> > On Wed, Apr 18, 2018 at 08:17:35PM -0700, Stephen Boyd wrote:
> > > Quoting Shawn Guo (2018-04-17 07:22:05)
> > > > On Mon, Mar 19, 2018 at 10:30:45AM +0800, Anson Huang wrote:
> > > > > On i.MX6SX SabreAuto board, there is external 24MHz clock
> > > > > source for analog clock2, add this clock source to clock tree.
> > > > > =
> > > > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> > > > > ---
> > > > > changes since V1:
> > > > > remove unnecessary clocks container.
> > > > =
> > > > I understand this is suggested by Fabio, but I'm afraid that it's n=
ot
> > > > going to work with imx_obtain_fixed_clock() call, which is coded to
> > > > look for clocks under /clocks node.
> > > > =
> > > =
> > > Should patch #1 be dropped from clk tree?
> > =
> > No. Patch #1 is good.
> =
> Sorry, Stephen. I just had a closer look at the driver code, and I
> think it can be done in a better way. So please drop patch #1 for now.
> =
Ok.
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH V2 2/2] ARM: dts: imx6sx-sabreauto: add external 24MHz clock source
@ 2018-04-19 19:32 ` Stephen Boyd
0 siblings, 0 replies; 33+ messages in thread
From: Stephen Boyd @ 2018-04-19 19:32 UTC (permalink / raw)
To: Shawn Guo
Cc: Anson Huang, mark.rutland, devicetree, mturquette, linux-clk,
linux, linux-kernel, robh+dt, Linux-imx, kernel, fabio.estevam,
shengjiu.wang, linux-arm-kernel
Quoting Shawn Guo (2018-04-19 07:24:42)
> On Thu, Apr 19, 2018 at 10:02:37PM +0800, Shawn Guo wrote:
> > On Wed, Apr 18, 2018 at 08:17:35PM -0700, Stephen Boyd wrote:
> > > Quoting Shawn Guo (2018-04-17 07:22:05)
> > > > On Mon, Mar 19, 2018 at 10:30:45AM +0800, Anson Huang wrote:
> > > > > On i.MX6SX SabreAuto board, there is external 24MHz clock
> > > > > source for analog clock2, add this clock source to clock tree.
> > > > >
> > > > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> > > > > ---
> > > > > changes since V1:
> > > > > remove unnecessary clocks container.
> > > >
> > > > I understand this is suggested by Fabio, but I'm afraid that it's not
> > > > going to work with imx_obtain_fixed_clock() call, which is coded to
> > > > look for clocks under /clocks node.
> > > >
> > >
> > > Should patch #1 be dropped from clk tree?
> >
> > No. Patch #1 is good.
>
> Sorry, Stephen. I just had a closer look at the driver code, and I
> think it can be done in a better way. So please drop patch #1 for now.
>
Ok.
^ permalink raw reply [flat|nested] 33+ messages in thread
* [PATCH V2 2/2] ARM: dts: imx6sx-sabreauto: add external 24MHz clock source
@ 2018-04-19 19:32 ` Stephen Boyd
0 siblings, 0 replies; 33+ messages in thread
From: Stephen Boyd @ 2018-04-19 19:32 UTC (permalink / raw)
To: linux-arm-kernel
Quoting Shawn Guo (2018-04-19 07:24:42)
> On Thu, Apr 19, 2018 at 10:02:37PM +0800, Shawn Guo wrote:
> > On Wed, Apr 18, 2018 at 08:17:35PM -0700, Stephen Boyd wrote:
> > > Quoting Shawn Guo (2018-04-17 07:22:05)
> > > > On Mon, Mar 19, 2018 at 10:30:45AM +0800, Anson Huang wrote:
> > > > > On i.MX6SX SabreAuto board, there is external 24MHz clock
> > > > > source for analog clock2, add this clock source to clock tree.
> > > > >
> > > > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> > > > > ---
> > > > > changes since V1:
> > > > > remove unnecessary clocks container.
> > > >
> > > > I understand this is suggested by Fabio, but I'm afraid that it's not
> > > > going to work with imx_obtain_fixed_clock() call, which is coded to
> > > > look for clocks under /clocks node.
> > > >
> > >
> > > Should patch #1 be dropped from clk tree?
> >
> > No. Patch #1 is good.
>
> Sorry, Stephen. I just had a closer look at the driver code, and I
> think it can be done in a better way. So please drop patch #1 for now.
>
Ok.
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH V2 1/2] clk: imx6sx: add missing lvds2 clock to the clock tree
2018-03-19 2:30 ` Anson Huang
@ 2018-03-26 22:23 ` Rob Herring
-1 siblings, 0 replies; 33+ messages in thread
From: Rob Herring @ 2018-03-26 22:23 UTC (permalink / raw)
To: Anson Huang
Cc: shawnguo, kernel, fabio.estevam, mark.rutland, linux, mturquette,
sboyd, shengjiu.wang, Linux-imx, linux-arm-kernel, devicetree,
linux-kernel, linux-clk
On Mon, Mar 19, 2018 at 10:30:44AM +0800, Anson Huang wrote:
> i.MX6SX has lvds2 (analog clock2), an I/O clock like lvds1.
> And this lvds2, along with lvds1, can be used to provide
> external clock source to the internal pll, such as pll4_audio
> and pll5_video.
>
> This patch mainly adds the lvds2 to the clock tree and fix its
> relationship with pll accordingly.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
> ---
> drivers/clk/imx/clk-imx6sx.c | 8 ++++++--
> include/dt-bindings/clock/imx6sx-clock.h | 6 +++++-
> 2 files changed, 11 insertions(+), 3 deletions(-)
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 33+ messages in thread
* [PATCH V2 1/2] clk: imx6sx: add missing lvds2 clock to the clock tree
@ 2018-03-26 22:23 ` Rob Herring
0 siblings, 0 replies; 33+ messages in thread
From: Rob Herring @ 2018-03-26 22:23 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Mar 19, 2018 at 10:30:44AM +0800, Anson Huang wrote:
> i.MX6SX has lvds2 (analog clock2), an I/O clock like lvds1.
> And this lvds2, along with lvds1, can be used to provide
> external clock source to the internal pll, such as pll4_audio
> and pll5_video.
>
> This patch mainly adds the lvds2 to the clock tree and fix its
> relationship with pll accordingly.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
> ---
> drivers/clk/imx/clk-imx6sx.c | 8 ++++++--
> include/dt-bindings/clock/imx6sx-clock.h | 6 +++++-
> 2 files changed, 11 insertions(+), 3 deletions(-)
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH V2 1/2] clk: imx6sx: add missing lvds2 clock to the clock tree
2018-03-19 2:30 ` Anson Huang
(?)
@ 2018-04-16 18:32 ` Stephen Boyd
-1 siblings, 0 replies; 33+ messages in thread
From: Stephen Boyd @ 2018-04-16 18:32 UTC (permalink / raw)
To: Anson Huang, fabio.estevam, kernel, linux, mark.rutland,
mturquette, robh+dt, shawnguo, shengjiu.wang
Cc: Linux-imx, linux-arm-kernel, devicetree, linux-kernel, linux-clk
Quoting Anson Huang (2018-03-18 19:30:44)
> i.MX6SX has lvds2 (analog clock2), an I/O clock like lvds1.
> And this lvds2, along with lvds1, can be used to provide
> external clock source to the internal pll, such as pll4_audio
> and pll5_video.
> =
> This patch mainly adds the lvds2 to the clock tree and fix its
> relationship with pll accordingly.
> =
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
> ---
Applied to clk-next
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH V2 1/2] clk: imx6sx: add missing lvds2 clock to the clock tree
@ 2018-04-16 18:32 ` Stephen Boyd
0 siblings, 0 replies; 33+ messages in thread
From: Stephen Boyd @ 2018-04-16 18:32 UTC (permalink / raw)
To: Anson Huang, fabio.estevam, kernel, linux, mark.rutland,
mturquette, robh+dt, shawnguo, shengjiu.wang
Cc: Linux-imx, linux-arm-kernel, devicetree, linux-kernel, linux-clk
Quoting Anson Huang (2018-03-18 19:30:44)
> i.MX6SX has lvds2 (analog clock2), an I/O clock like lvds1.
> And this lvds2, along with lvds1, can be used to provide
> external clock source to the internal pll, such as pll4_audio
> and pll5_video.
>
> This patch mainly adds the lvds2 to the clock tree and fix its
> relationship with pll accordingly.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
> ---
Applied to clk-next
^ permalink raw reply [flat|nested] 33+ messages in thread
* [PATCH V2 1/2] clk: imx6sx: add missing lvds2 clock to the clock tree
@ 2018-04-16 18:32 ` Stephen Boyd
0 siblings, 0 replies; 33+ messages in thread
From: Stephen Boyd @ 2018-04-16 18:32 UTC (permalink / raw)
To: linux-arm-kernel
Quoting Anson Huang (2018-03-18 19:30:44)
> i.MX6SX has lvds2 (analog clock2), an I/O clock like lvds1.
> And this lvds2, along with lvds1, can be used to provide
> external clock source to the internal pll, such as pll4_audio
> and pll5_video.
>
> This patch mainly adds the lvds2 to the clock tree and fix its
> relationship with pll accordingly.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
> ---
Applied to clk-next
^ permalink raw reply [flat|nested] 33+ messages in thread
* Re: [PATCH V2 1/2] clk: imx6sx: add missing lvds2 clock to the clock tree
2018-03-19 2:30 ` Anson Huang
@ 2018-04-19 14:57 ` Shawn Guo
-1 siblings, 0 replies; 33+ messages in thread
From: Shawn Guo @ 2018-04-19 14:57 UTC (permalink / raw)
To: Anson Huang
Cc: kernel, fabio.estevam, robh+dt, mark.rutland, linux, mturquette,
sboyd, shengjiu.wang, Linux-imx, linux-arm-kernel, devicetree,
linux-kernel, linux-clk
On Mon, Mar 19, 2018 at 10:30:44AM +0800, Anson Huang wrote:
> i.MX6SX has lvds2 (analog clock2), an I/O clock like lvds1.
> And this lvds2, along with lvds1, can be used to provide
> external clock source to the internal pll, such as pll4_audio
> and pll5_video.
>
> This patch mainly adds the lvds2 to the clock tree and fix its
> relationship with pll accordingly.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
> ---
> drivers/clk/imx/clk-imx6sx.c | 8 ++++++--
> include/dt-bindings/clock/imx6sx-clock.h | 6 +++++-
> 2 files changed, 11 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/clk/imx/clk-imx6sx.c b/drivers/clk/imx/clk-imx6sx.c
> index e6d389e..478ad0d 100644
> --- a/drivers/clk/imx/clk-imx6sx.c
> +++ b/drivers/clk/imx/clk-imx6sx.c
> @@ -80,7 +80,7 @@ static const char *lvds_sels[] = {
> "arm", "pll1_sys", "dummy", "dummy", "dummy", "dummy", "dummy", "pll5_video_div",
> "dummy", "dummy", "pcie_ref_125m", "dummy", "usbphy1", "usbphy2",
> };
> -static const char *pll_bypass_src_sels[] = { "osc", "lvds1_in", };
> +static const char *pll_bypass_src_sels[] = { "osc", "lvds1_in", "lvds2_in", "dummy", };
> static const char *pll1_bypass_sels[] = { "pll1", "pll1_bypass_src", };
> static const char *pll2_bypass_sels[] = { "pll2", "pll2_bypass_src", };
> static const char *pll3_bypass_sels[] = { "pll3", "pll3_bypass_src", };
> @@ -158,8 +158,9 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
> clks[IMX6SX_CLK_IPP_DI0] = of_clk_get_by_name(ccm_node, "ipp_di0");
> clks[IMX6SX_CLK_IPP_DI1] = of_clk_get_by_name(ccm_node, "ipp_di1");
>
> - /* Clock source from external clock via CLK1 PAD */
> + /* Clock source from external clock via CLK1/2 PAD */
> clks[IMX6SX_CLK_ANACLK1] = imx_obtain_fixed_clock("anaclk1", 0);
> + clks[IMX6SX_CLK_ANACLK2] = imx_obtain_fixed_clock("anaclk2", 0);
It seems to me that anaclk clocks are similar to ipp_di, and could be
handled in the same way as ipp_di clocks. If that's the case, I would
suggest we do the following.
1. Kill clocks container node by dropping 'reg' property and naming
clock nodes uniquely. This is not strictly related to what we try
to do here, but just to address DT maintainers' concern on 'clocks'
container node.
clk_ckil: clock-ckil {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
clock-output-names = "ckil";
};
clk_osc: clock-osc {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
clock-output-names = "osc";
};
clk_ipp_di0: clock-ipp-di0 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
clock-output-names = "ipp_di0";
};
clk_ipp_di1: clock-ipp-di1 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
clock-output-names = "ipp_di1";
};
clks: ccm@20c4000 {
compatible = "fsl,imx6sx-ccm";
reg = <0x020c4000 0x4000>;
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
#clock-cells = <1>;
clocks = <&clk_ckil>, <&clk_osc>, <&clk_ipp_di0>, <&clk_ipp_di1>;
clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
};
2. Patch clock driver to have anaclk1 and anaclk2 handled in the same
way as ipp_di clocks.
clks[IMX6SX_CLK_ANACLK1] = of_clk_get_by_name(ccm_node, "anaclk1");
clks[IMX6SX_CLK_ANACLK2] = of_clk_get_by_name(ccm_node, "anaclk2");
3. Add anaclk1 and anaclk2 with clock-frequency being 0 by default, just
like ipp_di clocks.
clk_anaclk1: clock-anaclk1 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
clock-output-names = "anaclk1";
};
clk_anaclk2: clock-anaclk2 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
clock-output-names = "anaclk2";
};
clks: ccm@20c4000 {
compatible = "fsl,imx6sx-ccm";
reg = <0x020c4000 0x4000>;
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
#clock-cells = <1>;
clocks = <&clk_ckil>, <&clk_osc>,
<&clk_ipp_di0>, <&clk_ipp_di1>,
<&clk_anaclk1>, <&clk_anaclk2>;
clock-names = "ckil", "osc",
"ipp_di0", "ipp_di1",
"anaclk1", "anaclk2";
};
4. Overwrite anaclk2 clock-frequency in imx6sx-sabreauto.dts.
&clk_anaclk2 {
clock-frequency = <24576000>;
};
Please test and let me know whether it works or not. Thanks.
Shawn
>
> np = of_find_compatible_node(NULL, NULL, "fsl,imx6sx-anatop");
> base = of_iomap(np, 0);
> @@ -228,7 +229,9 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
> clks[IMX6SX_CLK_PCIE_REF_125M] = imx_clk_gate("pcie_ref_125m", "pcie_ref", base + 0xe0, 19);
>
> clks[IMX6SX_CLK_LVDS1_OUT] = imx_clk_gate_exclusive("lvds1_out", "lvds1_sel", base + 0x160, 10, BIT(12));
> + clks[IMX6SX_CLK_LVDS2_OUT] = imx_clk_gate_exclusive("lvds2_out", "lvds2_sel", base + 0x160, 11, BIT(13));
> clks[IMX6SX_CLK_LVDS1_IN] = imx_clk_gate_exclusive("lvds1_in", "anaclk1", base + 0x160, 12, BIT(10));
> + clks[IMX6SX_CLK_LVDS2_IN] = imx_clk_gate_exclusive("lvds2_in", "anaclk2", base + 0x160, 13, BIT(11));
>
> clks[IMX6SX_CLK_ENET_REF] = clk_register_divider_table(NULL, "enet_ref", "pll6_enet", 0,
> base + 0xe0, 0, 2, 0, clk_enet_ref_table,
> @@ -270,6 +273,7 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
>
> /* name reg shift width parent_names num_parents */
> clks[IMX6SX_CLK_LVDS1_SEL] = imx_clk_mux("lvds1_sel", base + 0x160, 0, 5, lvds_sels, ARRAY_SIZE(lvds_sels));
> + clks[IMX6SX_CLK_LVDS2_SEL] = imx_clk_mux("lvds2_sel", base + 0x160, 5, 5, lvds_sels, ARRAY_SIZE(lvds_sels));
>
> np = ccm_node;
> base = of_iomap(np, 0);
> diff --git a/include/dt-bindings/clock/imx6sx-clock.h b/include/dt-bindings/clock/imx6sx-clock.h
> index 36f0324..cd2d6c5 100644
> --- a/include/dt-bindings/clock/imx6sx-clock.h
> +++ b/include/dt-bindings/clock/imx6sx-clock.h
> @@ -275,6 +275,10 @@
> #define IMX6SX_PLL6_BYPASS 262
> #define IMX6SX_PLL7_BYPASS 263
> #define IMX6SX_CLK_SPDIF_GCLK 264
> -#define IMX6SX_CLK_CLK_END 265
> +#define IMX6SX_CLK_LVDS2_SEL 265
> +#define IMX6SX_CLK_LVDS2_OUT 266
> +#define IMX6SX_CLK_LVDS2_IN 267
> +#define IMX6SX_CLK_ANACLK2 268
> +#define IMX6SX_CLK_CLK_END 269
>
> #endif /* __DT_BINDINGS_CLOCK_IMX6SX_H */
> --
> 2.7.4
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-clk" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 33+ messages in thread* [PATCH V2 1/2] clk: imx6sx: add missing lvds2 clock to the clock tree
@ 2018-04-19 14:57 ` Shawn Guo
0 siblings, 0 replies; 33+ messages in thread
From: Shawn Guo @ 2018-04-19 14:57 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Mar 19, 2018 at 10:30:44AM +0800, Anson Huang wrote:
> i.MX6SX has lvds2 (analog clock2), an I/O clock like lvds1.
> And this lvds2, along with lvds1, can be used to provide
> external clock source to the internal pll, such as pll4_audio
> and pll5_video.
>
> This patch mainly adds the lvds2 to the clock tree and fix its
> relationship with pll accordingly.
>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
> ---
> drivers/clk/imx/clk-imx6sx.c | 8 ++++++--
> include/dt-bindings/clock/imx6sx-clock.h | 6 +++++-
> 2 files changed, 11 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/clk/imx/clk-imx6sx.c b/drivers/clk/imx/clk-imx6sx.c
> index e6d389e..478ad0d 100644
> --- a/drivers/clk/imx/clk-imx6sx.c
> +++ b/drivers/clk/imx/clk-imx6sx.c
> @@ -80,7 +80,7 @@ static const char *lvds_sels[] = {
> "arm", "pll1_sys", "dummy", "dummy", "dummy", "dummy", "dummy", "pll5_video_div",
> "dummy", "dummy", "pcie_ref_125m", "dummy", "usbphy1", "usbphy2",
> };
> -static const char *pll_bypass_src_sels[] = { "osc", "lvds1_in", };
> +static const char *pll_bypass_src_sels[] = { "osc", "lvds1_in", "lvds2_in", "dummy", };
> static const char *pll1_bypass_sels[] = { "pll1", "pll1_bypass_src", };
> static const char *pll2_bypass_sels[] = { "pll2", "pll2_bypass_src", };
> static const char *pll3_bypass_sels[] = { "pll3", "pll3_bypass_src", };
> @@ -158,8 +158,9 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
> clks[IMX6SX_CLK_IPP_DI0] = of_clk_get_by_name(ccm_node, "ipp_di0");
> clks[IMX6SX_CLK_IPP_DI1] = of_clk_get_by_name(ccm_node, "ipp_di1");
>
> - /* Clock source from external clock via CLK1 PAD */
> + /* Clock source from external clock via CLK1/2 PAD */
> clks[IMX6SX_CLK_ANACLK1] = imx_obtain_fixed_clock("anaclk1", 0);
> + clks[IMX6SX_CLK_ANACLK2] = imx_obtain_fixed_clock("anaclk2", 0);
It seems to me that anaclk clocks are similar to ipp_di, and could be
handled in the same way as ipp_di clocks. If that's the case, I would
suggest we do the following.
1. Kill clocks container node by dropping 'reg' property and naming
clock nodes uniquely. This is not strictly related to what we try
to do here, but just to address DT maintainers' concern on 'clocks'
container node.
clk_ckil: clock-ckil {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
clock-output-names = "ckil";
};
clk_osc: clock-osc {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
clock-output-names = "osc";
};
clk_ipp_di0: clock-ipp-di0 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
clock-output-names = "ipp_di0";
};
clk_ipp_di1: clock-ipp-di1 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
clock-output-names = "ipp_di1";
};
clks: ccm at 20c4000 {
compatible = "fsl,imx6sx-ccm";
reg = <0x020c4000 0x4000>;
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
#clock-cells = <1>;
clocks = <&clk_ckil>, <&clk_osc>, <&clk_ipp_di0>, <&clk_ipp_di1>;
clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
};
2. Patch clock driver to have anaclk1 and anaclk2 handled in the same
way as ipp_di clocks.
clks[IMX6SX_CLK_ANACLK1] = of_clk_get_by_name(ccm_node, "anaclk1");
clks[IMX6SX_CLK_ANACLK2] = of_clk_get_by_name(ccm_node, "anaclk2");
3. Add anaclk1 and anaclk2 with clock-frequency being 0 by default, just
like ipp_di clocks.
clk_anaclk1: clock-anaclk1 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
clock-output-names = "anaclk1";
};
clk_anaclk2: clock-anaclk2 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
clock-output-names = "anaclk2";
};
clks: ccm at 20c4000 {
compatible = "fsl,imx6sx-ccm";
reg = <0x020c4000 0x4000>;
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
#clock-cells = <1>;
clocks = <&clk_ckil>, <&clk_osc>,
<&clk_ipp_di0>, <&clk_ipp_di1>,
<&clk_anaclk1>, <&clk_anaclk2>;
clock-names = "ckil", "osc",
"ipp_di0", "ipp_di1",
"anaclk1", "anaclk2";
};
4. Overwrite anaclk2 clock-frequency in imx6sx-sabreauto.dts.
&clk_anaclk2 {
clock-frequency = <24576000>;
};
Please test and let me know whether it works or not. Thanks.
Shawn
>
> np = of_find_compatible_node(NULL, NULL, "fsl,imx6sx-anatop");
> base = of_iomap(np, 0);
> @@ -228,7 +229,9 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
> clks[IMX6SX_CLK_PCIE_REF_125M] = imx_clk_gate("pcie_ref_125m", "pcie_ref", base + 0xe0, 19);
>
> clks[IMX6SX_CLK_LVDS1_OUT] = imx_clk_gate_exclusive("lvds1_out", "lvds1_sel", base + 0x160, 10, BIT(12));
> + clks[IMX6SX_CLK_LVDS2_OUT] = imx_clk_gate_exclusive("lvds2_out", "lvds2_sel", base + 0x160, 11, BIT(13));
> clks[IMX6SX_CLK_LVDS1_IN] = imx_clk_gate_exclusive("lvds1_in", "anaclk1", base + 0x160, 12, BIT(10));
> + clks[IMX6SX_CLK_LVDS2_IN] = imx_clk_gate_exclusive("lvds2_in", "anaclk2", base + 0x160, 13, BIT(11));
>
> clks[IMX6SX_CLK_ENET_REF] = clk_register_divider_table(NULL, "enet_ref", "pll6_enet", 0,
> base + 0xe0, 0, 2, 0, clk_enet_ref_table,
> @@ -270,6 +273,7 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
>
> /* name reg shift width parent_names num_parents */
> clks[IMX6SX_CLK_LVDS1_SEL] = imx_clk_mux("lvds1_sel", base + 0x160, 0, 5, lvds_sels, ARRAY_SIZE(lvds_sels));
> + clks[IMX6SX_CLK_LVDS2_SEL] = imx_clk_mux("lvds2_sel", base + 0x160, 5, 5, lvds_sels, ARRAY_SIZE(lvds_sels));
>
> np = ccm_node;
> base = of_iomap(np, 0);
> diff --git a/include/dt-bindings/clock/imx6sx-clock.h b/include/dt-bindings/clock/imx6sx-clock.h
> index 36f0324..cd2d6c5 100644
> --- a/include/dt-bindings/clock/imx6sx-clock.h
> +++ b/include/dt-bindings/clock/imx6sx-clock.h
> @@ -275,6 +275,10 @@
> #define IMX6SX_PLL6_BYPASS 262
> #define IMX6SX_PLL7_BYPASS 263
> #define IMX6SX_CLK_SPDIF_GCLK 264
> -#define IMX6SX_CLK_CLK_END 265
> +#define IMX6SX_CLK_LVDS2_SEL 265
> +#define IMX6SX_CLK_LVDS2_OUT 266
> +#define IMX6SX_CLK_LVDS2_IN 267
> +#define IMX6SX_CLK_ANACLK2 268
> +#define IMX6SX_CLK_CLK_END 269
>
> #endif /* __DT_BINDINGS_CLOCK_IMX6SX_H */
> --
> 2.7.4
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-clk" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 33+ messages in thread* RE: [PATCH V2 1/2] clk: imx6sx: add missing lvds2 clock to the clock tree
2018-04-19 14:57 ` Shawn Guo
(?)
@ 2018-04-20 6:57 ` Anson Huang
-1 siblings, 0 replies; 33+ messages in thread
From: Anson Huang @ 2018-04-20 6:57 UTC (permalink / raw)
To: Shawn Guo
Cc: kernel@pengutronix.de, Fabio Estevam, robh+dt@kernel.org,
mark.rutland@arm.com, linux@armlinux.org.uk,
mturquette@baylibre.com, sboyd@kernel.org, S.j. Wang,
dl-linux-imx, linux-arm-kernel@lists.infradead.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-clk@vger.kernel.org
Anson Huang
Best Regards!
> -----Original Message-----
> From: Shawn Guo [mailto:shawnguo@kernel.org]
> Sent: Thursday, April 19, 2018 10:57 PM
> To: Anson Huang <anson.huang@nxp.com>
> Cc: kernel@pengutronix.de; Fabio Estevam <fabio.estevam@nxp.com>;
> robh+dt@kernel.org; mark.rutland@arm.com; linux@armlinux.org.uk;
> mturquette@baylibre.com; sboyd@kernel.org; S.j. Wang
> <shengjiu.wang@nxp.com>; dl-linux-imx <linux-imx@nxp.com>;
> linux-arm-kernel@lists.infradead.org; devicetree@vger.kernel.org;
> linux-kernel@vger.kernel.org; linux-clk@vger.kernel.org
> Subject: Re: [PATCH V2 1/2] clk: imx6sx: add missing lvds2 clock to the c=
lock tree
>=20
> On Mon, Mar 19, 2018 at 10:30:44AM +0800, Anson Huang wrote:
> > i.MX6SX has lvds2 (analog clock2), an I/O clock like lvds1.
> > And this lvds2, along with lvds1, can be used to provide external
> > clock source to the internal pll, such as pll4_audio and pll5_video.
> >
> > This patch mainly adds the lvds2 to the clock tree and fix its
> > relationship with pll accordingly.
> >
> > Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> > Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
> > ---
> > drivers/clk/imx/clk-imx6sx.c | 8 ++++++--
> > include/dt-bindings/clock/imx6sx-clock.h | 6 +++++-
> > 2 files changed, 11 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/clk/imx/clk-imx6sx.c
> > b/drivers/clk/imx/clk-imx6sx.c index e6d389e..478ad0d 100644
> > --- a/drivers/clk/imx/clk-imx6sx.c
> > +++ b/drivers/clk/imx/clk-imx6sx.c
> > @@ -80,7 +80,7 @@ static const char *lvds_sels[] =3D {
> > "arm", "pll1_sys", "dummy", "dummy", "dummy", "dummy", "dummy",
> "pll5_video_div",
> > "dummy", "dummy", "pcie_ref_125m", "dummy", "usbphy1", "usbphy2",
> > }; -static const char *pll_bypass_src_sels[] =3D { "osc", "lvds1_in", }=
;
> > +static const char *pll_bypass_src_sels[] =3D { "osc", "lvds1_in",
> > +"lvds2_in", "dummy", };
> > static const char *pll1_bypass_sels[] =3D { "pll1", "pll1_bypass_src",
> > }; static const char *pll2_bypass_sels[] =3D { "pll2",
> > "pll2_bypass_src", }; static const char *pll3_bypass_sels[] =3D {
> > "pll3", "pll3_bypass_src", }; @@ -158,8 +158,9 @@ static void __init
> imx6sx_clocks_init(struct device_node *ccm_node)
> > clks[IMX6SX_CLK_IPP_DI0] =3D of_clk_get_by_name(ccm_node, "ipp_di0");
> > clks[IMX6SX_CLK_IPP_DI1] =3D of_clk_get_by_name(ccm_node, "ipp_di1");
> >
> > - /* Clock source from external clock via CLK1 PAD */
> > + /* Clock source from external clock via CLK1/2 PAD */
> > clks[IMX6SX_CLK_ANACLK1] =3D imx_obtain_fixed_clock("anaclk1", 0);
> > + clks[IMX6SX_CLK_ANACLK2] =3D imx_obtain_fixed_clock("anaclk2", 0);
>=20
> It seems to me that anaclk clocks are similar to ipp_di, and could be han=
dled in
> the same way as ipp_di clocks. If that's the case, I would suggest we do=
the
> following.
>=20
> 1. Kill clocks container node by dropping 'reg' property and naming
> clock nodes uniquely. This is not strictly related to what we try
> to do here, but just to address DT maintainers' concern on 'clocks'
> container node.
>=20
> clk_ckil: clock-ckil {
> compatible =3D "fixed-clock";
> #clock-cells =3D <0>;
> clock-frequency =3D <32768>;
> clock-output-names =3D "ckil";
> };
>=20
> clk_osc: clock-osc {
> compatible =3D "fixed-clock";
> #clock-cells =3D <0>;
> clock-frequency =3D <24000000>;
> clock-output-names =3D "osc";
> };
>=20
> clk_ipp_di0: clock-ipp-di0 {
> compatible =3D "fixed-clock";
> #clock-cells =3D <0>;
> clock-frequency =3D <0>;
> clock-output-names =3D "ipp_di0";
> };
>=20
> clk_ipp_di1: clock-ipp-di1 {
> compatible =3D "fixed-clock";
> #clock-cells =3D <0>;
> clock-frequency =3D <0>;
> clock-output-names =3D "ipp_di1";
> };
>=20
> clks: ccm@20c4000 {
> compatible =3D "fsl,imx6sx-ccm";
> reg =3D <0x020c4000 0x4000>;
> interrupts =3D <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
> #clock-cells =3D <1>;
> clocks =3D <&clk_ckil>, <&clk_osc>, <&clk_ipp_di0>, <&clk_ipp_di1>;
> clock-names =3D "ckil", "osc", "ipp_di0", "ipp_di1";
> };
>=20
> 2. Patch clock driver to have anaclk1 and anaclk2 handled in the same
> way as ipp_di clocks.
>=20
> clks[IMX6SX_CLK_ANACLK1] =3D of_clk_get_by_name(ccm_node, "anaclk1");
> clks[IMX6SX_CLK_ANACLK2] =3D of_clk_get_by_name(ccm_node, "anaclk2");
>=20
> 3. Add anaclk1 and anaclk2 with clock-frequency being 0 by default, just
> like ipp_di clocks.
>=20
> clk_anaclk1: clock-anaclk1 {
> compatible =3D "fixed-clock";
> #clock-cells =3D <0>;
> clock-frequency =3D <0>;
> clock-output-names =3D "anaclk1";
> };
>=20
> clk_anaclk2: clock-anaclk2 {
> compatible =3D "fixed-clock";
> #clock-cells =3D <0>;
> clock-frequency =3D <0>;
> clock-output-names =3D "anaclk2";
> };
>=20
> clks: ccm@20c4000 {
> compatible =3D "fsl,imx6sx-ccm";
> reg =3D <0x020c4000 0x4000>;
> interrupts =3D <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
> #clock-cells =3D <1>;
> clocks =3D <&clk_ckil>, <&clk_osc>,
> <&clk_ipp_di0>, <&clk_ipp_di1>,
> <&clk_anaclk1>, <&clk_anaclk2>;
> clock-names =3D "ckil", "osc",
> "ipp_di0", "ipp_di1",
> "anaclk1", "anaclk2";
> };
>=20
> 4. Overwrite anaclk2 clock-frequency in imx6sx-sabreauto.dts.
>=20
> &clk_anaclk2 {
> clock-frequency =3D <24576000>;
> };
>=20
> Please test and let me know whether it works or not. Thanks.
>=20
> Shawn
It is working, see below clk tree dump, I will send a V3 patch, thanks.
Anson.=20
root@imx6qpdlsolox:~# cat /sys/kernel/debug/clk/clk_summary
enable prepare protect
clock count count count rate acc=
uracy phase
---------------------------------------------------------------------------=
-------------
dummy 3 3 0 0 =
0 0
cko1_sel 0 0 0 0 =
0 0
cko1_podf 0 0 0 0 =
0 0
cko1 0 0 0 0 =
0 0
cko 0 0 0 0 =
0 0
usbphy2_gate 1 1 0 0 =
0 0
usbphy1_gate 1 1 0 0 =
0 0
anaclk2 0 0 0 24576000 =
0 0
lvds2_in 0 0 0 24576000 =
0 0
anaclk1 0 0 0 0 =
0 0
lvds1_in 0 0 0 0 =
0 0
ipp_di1 0 0 0 0 =
0 0
ipp_di0 0 0 0 0 =
0 0
osc 6 6 0 24000000 =
0 0
>=20
> >
> > np =3D of_find_compatible_node(NULL, NULL, "fsl,imx6sx-anatop");
> > base =3D of_iomap(np, 0);
> > @@ -228,7 +229,9 @@ static void __init imx6sx_clocks_init(struct
> device_node *ccm_node)
> > clks[IMX6SX_CLK_PCIE_REF_125M] =3D imx_clk_gate("pcie_ref_125m",
> > "pcie_ref", base + 0xe0, 19);
> >
> > clks[IMX6SX_CLK_LVDS1_OUT] =3D imx_clk_gate_exclusive("lvds1_out",
> > "lvds1_sel", base + 0x160, 10, BIT(12));
> > + clks[IMX6SX_CLK_LVDS2_OUT] =3D imx_clk_gate_exclusive("lvds2_out",
> > +"lvds2_sel", base + 0x160, 11, BIT(13));
> > clks[IMX6SX_CLK_LVDS1_IN] =3D imx_clk_gate_exclusive("lvds1_in",
> "anaclk1", base + 0x160, 12, BIT(10));
> > + clks[IMX6SX_CLK_LVDS2_IN] =3D imx_clk_gate_exclusive("lvds2_in",
> "anaclk2", base + 0x160, 13, BIT(11));
> >
> > clks[IMX6SX_CLK_ENET_REF] =3D clk_register_divider_table(NULL,
> "enet_ref", "pll6_enet", 0,
> > base + 0xe0, 0, 2, 0, clk_enet_ref_table, @@ -270,6 +273,7 @@
> > static void __init imx6sx_clocks_init(struct device_node *ccm_node)
> >
> > /* name
> reg shift width parent_names num_parents */
> > clks[IMX6SX_CLK_LVDS1_SEL] =3D imx_clk_mux("lvds1_sel",
> base + 0x160, 0, 5, lvds_sels, ARRAY_SIZE(lvds_sels));
> > + clks[IMX6SX_CLK_LVDS2_SEL] =3D imx_clk_mux("lvds2_sel",
> base + 0x160, 5, 5, lvds_sels, ARRAY_SIZE(lvds_sels));
> >
> > np =3D ccm_node;
> > base =3D of_iomap(np, 0);
> > diff --git a/include/dt-bindings/clock/imx6sx-clock.h
> > b/include/dt-bindings/clock/imx6sx-clock.h
> > index 36f0324..cd2d6c5 100644
> > --- a/include/dt-bindings/clock/imx6sx-clock.h
> > +++ b/include/dt-bindings/clock/imx6sx-clock.h
> > @@ -275,6 +275,10 @@
> > #define IMX6SX_PLL6_BYPASS 262
> > #define IMX6SX_PLL7_BYPASS 263
> > #define IMX6SX_CLK_SPDIF_GCLK 264
> > -#define IMX6SX_CLK_CLK_END 265
> > +#define IMX6SX_CLK_LVDS2_SEL 265
> > +#define IMX6SX_CLK_LVDS2_OUT 266
> > +#define IMX6SX_CLK_LVDS2_IN 267
> > +#define IMX6SX_CLK_ANACLK2 268
> > +#define IMX6SX_CLK_CLK_END 269
> >
> > #endif /* __DT_BINDINGS_CLOCK_IMX6SX_H */
> > --
> > 2.7.4
> >
> > --
> > To unsubscribe from this list: send the line "unsubscribe linux-clk"
> > in the body of a message to majordomo@vger.kernel.org More majordomo
> > info at
> > https://emea01.safelinks.protection.outlook.com/?url=3Dhttp%3A%2F%2Fvge=
r
> > .kernel.org%2Fmajordomo-info.html&data=3D02%7C01%7CAnson.Huang%40nx
> p.com
> > %7Cfaec2b0e3f024446b4b908d5a605f71c%7C686ea1d3bc2b4c6fa92cd99c5c
> 301635
> > %7C0%7C0%7C636597466911971203&sdata=3DYXDSFv3JbKb26ncEJmpf0kUUp1
> DdVY6Fmc
> > utQZW1%2FM8%3D&reserved=3D0
^ permalink raw reply [flat|nested] 33+ messages in thread* RE: [PATCH V2 1/2] clk: imx6sx: add missing lvds2 clock to the clock tree
@ 2018-04-20 6:57 ` Anson Huang
0 siblings, 0 replies; 33+ messages in thread
From: Anson Huang @ 2018-04-20 6:57 UTC (permalink / raw)
To: Shawn Guo
Cc: kernel@pengutronix.de, Fabio Estevam, robh+dt@kernel.org,
mark.rutland@arm.com, linux@armlinux.org.uk,
mturquette@baylibre.com, sboyd@kernel.org, S.j. Wang,
dl-linux-imx, linux-arm-kernel@lists.infradead.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-clk@vger.kernel.org
Anson Huang
Best Regards!
> -----Original Message-----
> From: Shawn Guo [mailto:shawnguo@kernel.org]
> Sent: Thursday, April 19, 2018 10:57 PM
> To: Anson Huang <anson.huang@nxp.com>
> Cc: kernel@pengutronix.de; Fabio Estevam <fabio.estevam@nxp.com>;
> robh+dt@kernel.org; mark.rutland@arm.com; linux@armlinux.org.uk;
> mturquette@baylibre.com; sboyd@kernel.org; S.j. Wang
> <shengjiu.wang@nxp.com>; dl-linux-imx <linux-imx@nxp.com>;
> linux-arm-kernel@lists.infradead.org; devicetree@vger.kernel.org;
> linux-kernel@vger.kernel.org; linux-clk@vger.kernel.org
> Subject: Re: [PATCH V2 1/2] clk: imx6sx: add missing lvds2 clock to the clock tree
>
> On Mon, Mar 19, 2018 at 10:30:44AM +0800, Anson Huang wrote:
> > i.MX6SX has lvds2 (analog clock2), an I/O clock like lvds1.
> > And this lvds2, along with lvds1, can be used to provide external
> > clock source to the internal pll, such as pll4_audio and pll5_video.
> >
> > This patch mainly adds the lvds2 to the clock tree and fix its
> > relationship with pll accordingly.
> >
> > Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> > Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
> > ---
> > drivers/clk/imx/clk-imx6sx.c | 8 ++++++--
> > include/dt-bindings/clock/imx6sx-clock.h | 6 +++++-
> > 2 files changed, 11 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/clk/imx/clk-imx6sx.c
> > b/drivers/clk/imx/clk-imx6sx.c index e6d389e..478ad0d 100644
> > --- a/drivers/clk/imx/clk-imx6sx.c
> > +++ b/drivers/clk/imx/clk-imx6sx.c
> > @@ -80,7 +80,7 @@ static const char *lvds_sels[] = {
> > "arm", "pll1_sys", "dummy", "dummy", "dummy", "dummy", "dummy",
> "pll5_video_div",
> > "dummy", "dummy", "pcie_ref_125m", "dummy", "usbphy1", "usbphy2",
> > }; -static const char *pll_bypass_src_sels[] = { "osc", "lvds1_in", };
> > +static const char *pll_bypass_src_sels[] = { "osc", "lvds1_in",
> > +"lvds2_in", "dummy", };
> > static const char *pll1_bypass_sels[] = { "pll1", "pll1_bypass_src",
> > }; static const char *pll2_bypass_sels[] = { "pll2",
> > "pll2_bypass_src", }; static const char *pll3_bypass_sels[] = {
> > "pll3", "pll3_bypass_src", }; @@ -158,8 +158,9 @@ static void __init
> imx6sx_clocks_init(struct device_node *ccm_node)
> > clks[IMX6SX_CLK_IPP_DI0] = of_clk_get_by_name(ccm_node, "ipp_di0");
> > clks[IMX6SX_CLK_IPP_DI1] = of_clk_get_by_name(ccm_node, "ipp_di1");
> >
> > - /* Clock source from external clock via CLK1 PAD */
> > + /* Clock source from external clock via CLK1/2 PAD */
> > clks[IMX6SX_CLK_ANACLK1] = imx_obtain_fixed_clock("anaclk1", 0);
> > + clks[IMX6SX_CLK_ANACLK2] = imx_obtain_fixed_clock("anaclk2", 0);
>
> It seems to me that anaclk clocks are similar to ipp_di, and could be handled in
> the same way as ipp_di clocks. If that's the case, I would suggest we do the
> following.
>
> 1. Kill clocks container node by dropping 'reg' property and naming
> clock nodes uniquely. This is not strictly related to what we try
> to do here, but just to address DT maintainers' concern on 'clocks'
> container node.
>
> clk_ckil: clock-ckil {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> clock-frequency = <32768>;
> clock-output-names = "ckil";
> };
>
> clk_osc: clock-osc {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> clock-frequency = <24000000>;
> clock-output-names = "osc";
> };
>
> clk_ipp_di0: clock-ipp-di0 {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> clock-frequency = <0>;
> clock-output-names = "ipp_di0";
> };
>
> clk_ipp_di1: clock-ipp-di1 {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> clock-frequency = <0>;
> clock-output-names = "ipp_di1";
> };
>
> clks: ccm@20c4000 {
> compatible = "fsl,imx6sx-ccm";
> reg = <0x020c4000 0x4000>;
> interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
> #clock-cells = <1>;
> clocks = <&clk_ckil>, <&clk_osc>, <&clk_ipp_di0>, <&clk_ipp_di1>;
> clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
> };
>
> 2. Patch clock driver to have anaclk1 and anaclk2 handled in the same
> way as ipp_di clocks.
>
> clks[IMX6SX_CLK_ANACLK1] = of_clk_get_by_name(ccm_node, "anaclk1");
> clks[IMX6SX_CLK_ANACLK2] = of_clk_get_by_name(ccm_node, "anaclk2");
>
> 3. Add anaclk1 and anaclk2 with clock-frequency being 0 by default, just
> like ipp_di clocks.
>
> clk_anaclk1: clock-anaclk1 {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> clock-frequency = <0>;
> clock-output-names = "anaclk1";
> };
>
> clk_anaclk2: clock-anaclk2 {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> clock-frequency = <0>;
> clock-output-names = "anaclk2";
> };
>
> clks: ccm@20c4000 {
> compatible = "fsl,imx6sx-ccm";
> reg = <0x020c4000 0x4000>;
> interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
> #clock-cells = <1>;
> clocks = <&clk_ckil>, <&clk_osc>,
> <&clk_ipp_di0>, <&clk_ipp_di1>,
> <&clk_anaclk1>, <&clk_anaclk2>;
> clock-names = "ckil", "osc",
> "ipp_di0", "ipp_di1",
> "anaclk1", "anaclk2";
> };
>
> 4. Overwrite anaclk2 clock-frequency in imx6sx-sabreauto.dts.
>
> &clk_anaclk2 {
> clock-frequency = <24576000>;
> };
>
> Please test and let me know whether it works or not. Thanks.
>
> Shawn
It is working, see below clk tree dump, I will send a V3 patch, thanks.
Anson.
root@imx6qpdlsolox:~# cat /sys/kernel/debug/clk/clk_summary
enable prepare protect
clock count count count rate accuracy phase
----------------------------------------------------------------------------------------
dummy 3 3 0 0 0 0
cko1_sel 0 0 0 0 0 0
cko1_podf 0 0 0 0 0 0
cko1 0 0 0 0 0 0
cko 0 0 0 0 0 0
usbphy2_gate 1 1 0 0 0 0
usbphy1_gate 1 1 0 0 0 0
anaclk2 0 0 0 24576000 0 0
lvds2_in 0 0 0 24576000 0 0
anaclk1 0 0 0 0 0 0
lvds1_in 0 0 0 0 0 0
ipp_di1 0 0 0 0 0 0
ipp_di0 0 0 0 0 0 0
osc 6 6 0 24000000 0 0
>
> >
> > np = of_find_compatible_node(NULL, NULL, "fsl,imx6sx-anatop");
> > base = of_iomap(np, 0);
> > @@ -228,7 +229,9 @@ static void __init imx6sx_clocks_init(struct
> device_node *ccm_node)
> > clks[IMX6SX_CLK_PCIE_REF_125M] = imx_clk_gate("pcie_ref_125m",
> > "pcie_ref", base + 0xe0, 19);
> >
> > clks[IMX6SX_CLK_LVDS1_OUT] = imx_clk_gate_exclusive("lvds1_out",
> > "lvds1_sel", base + 0x160, 10, BIT(12));
> > + clks[IMX6SX_CLK_LVDS2_OUT] = imx_clk_gate_exclusive("lvds2_out",
> > +"lvds2_sel", base + 0x160, 11, BIT(13));
> > clks[IMX6SX_CLK_LVDS1_IN] = imx_clk_gate_exclusive("lvds1_in",
> "anaclk1", base + 0x160, 12, BIT(10));
> > + clks[IMX6SX_CLK_LVDS2_IN] = imx_clk_gate_exclusive("lvds2_in",
> "anaclk2", base + 0x160, 13, BIT(11));
> >
> > clks[IMX6SX_CLK_ENET_REF] = clk_register_divider_table(NULL,
> "enet_ref", "pll6_enet", 0,
> > base + 0xe0, 0, 2, 0, clk_enet_ref_table, @@ -270,6 +273,7 @@
> > static void __init imx6sx_clocks_init(struct device_node *ccm_node)
> >
> > /* name
> reg shift width parent_names num_parents */
> > clks[IMX6SX_CLK_LVDS1_SEL] = imx_clk_mux("lvds1_sel",
> base + 0x160, 0, 5, lvds_sels, ARRAY_SIZE(lvds_sels));
> > + clks[IMX6SX_CLK_LVDS2_SEL] = imx_clk_mux("lvds2_sel",
> base + 0x160, 5, 5, lvds_sels, ARRAY_SIZE(lvds_sels));
> >
> > np = ccm_node;
> > base = of_iomap(np, 0);
> > diff --git a/include/dt-bindings/clock/imx6sx-clock.h
> > b/include/dt-bindings/clock/imx6sx-clock.h
> > index 36f0324..cd2d6c5 100644
> > --- a/include/dt-bindings/clock/imx6sx-clock.h
> > +++ b/include/dt-bindings/clock/imx6sx-clock.h
> > @@ -275,6 +275,10 @@
> > #define IMX6SX_PLL6_BYPASS 262
> > #define IMX6SX_PLL7_BYPASS 263
> > #define IMX6SX_CLK_SPDIF_GCLK 264
> > -#define IMX6SX_CLK_CLK_END 265
> > +#define IMX6SX_CLK_LVDS2_SEL 265
> > +#define IMX6SX_CLK_LVDS2_OUT 266
> > +#define IMX6SX_CLK_LVDS2_IN 267
> > +#define IMX6SX_CLK_ANACLK2 268
> > +#define IMX6SX_CLK_CLK_END 269
> >
> > #endif /* __DT_BINDINGS_CLOCK_IMX6SX_H */
> > --
> > 2.7.4
> >
> > --
> > To unsubscribe from this list: send the line "unsubscribe linux-clk"
> > in the body of a message to majordomo@vger.kernel.org More majordomo
> > info at
> > https://emea01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fvger
> > .kernel.org%2Fmajordomo-info.html&data=02%7C01%7CAnson.Huang%40nx
> p.com
> > %7Cfaec2b0e3f024446b4b908d5a605f71c%7C686ea1d3bc2b4c6fa92cd99c5c
> 301635
> > %7C0%7C0%7C636597466911971203&sdata=YXDSFv3JbKb26ncEJmpf0kUUp1
> DdVY6Fmc
> > utQZW1%2FM8%3D&reserved=0
^ permalink raw reply [flat|nested] 33+ messages in thread* [PATCH V2 1/2] clk: imx6sx: add missing lvds2 clock to the clock tree
@ 2018-04-20 6:57 ` Anson Huang
0 siblings, 0 replies; 33+ messages in thread
From: Anson Huang @ 2018-04-20 6:57 UTC (permalink / raw)
To: linux-arm-kernel
Anson Huang
Best Regards!
> -----Original Message-----
> From: Shawn Guo [mailto:shawnguo at kernel.org]
> Sent: Thursday, April 19, 2018 10:57 PM
> To: Anson Huang <anson.huang@nxp.com>
> Cc: kernel at pengutronix.de; Fabio Estevam <fabio.estevam@nxp.com>;
> robh+dt at kernel.org; mark.rutland at arm.com; linux at armlinux.org.uk;
> mturquette at baylibre.com; sboyd at kernel.org; S.j. Wang
> <shengjiu.wang@nxp.com>; dl-linux-imx <linux-imx@nxp.com>;
> linux-arm-kernel at lists.infradead.org; devicetree at vger.kernel.org;
> linux-kernel at vger.kernel.org; linux-clk at vger.kernel.org
> Subject: Re: [PATCH V2 1/2] clk: imx6sx: add missing lvds2 clock to the clock tree
>
> On Mon, Mar 19, 2018 at 10:30:44AM +0800, Anson Huang wrote:
> > i.MX6SX has lvds2 (analog clock2), an I/O clock like lvds1.
> > And this lvds2, along with lvds1, can be used to provide external
> > clock source to the internal pll, such as pll4_audio and pll5_video.
> >
> > This patch mainly adds the lvds2 to the clock tree and fix its
> > relationship with pll accordingly.
> >
> > Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> > Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
> > ---
> > drivers/clk/imx/clk-imx6sx.c | 8 ++++++--
> > include/dt-bindings/clock/imx6sx-clock.h | 6 +++++-
> > 2 files changed, 11 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/clk/imx/clk-imx6sx.c
> > b/drivers/clk/imx/clk-imx6sx.c index e6d389e..478ad0d 100644
> > --- a/drivers/clk/imx/clk-imx6sx.c
> > +++ b/drivers/clk/imx/clk-imx6sx.c
> > @@ -80,7 +80,7 @@ static const char *lvds_sels[] = {
> > "arm", "pll1_sys", "dummy", "dummy", "dummy", "dummy", "dummy",
> "pll5_video_div",
> > "dummy", "dummy", "pcie_ref_125m", "dummy", "usbphy1", "usbphy2",
> > }; -static const char *pll_bypass_src_sels[] = { "osc", "lvds1_in", };
> > +static const char *pll_bypass_src_sels[] = { "osc", "lvds1_in",
> > +"lvds2_in", "dummy", };
> > static const char *pll1_bypass_sels[] = { "pll1", "pll1_bypass_src",
> > }; static const char *pll2_bypass_sels[] = { "pll2",
> > "pll2_bypass_src", }; static const char *pll3_bypass_sels[] = {
> > "pll3", "pll3_bypass_src", }; @@ -158,8 +158,9 @@ static void __init
> imx6sx_clocks_init(struct device_node *ccm_node)
> > clks[IMX6SX_CLK_IPP_DI0] = of_clk_get_by_name(ccm_node, "ipp_di0");
> > clks[IMX6SX_CLK_IPP_DI1] = of_clk_get_by_name(ccm_node, "ipp_di1");
> >
> > - /* Clock source from external clock via CLK1 PAD */
> > + /* Clock source from external clock via CLK1/2 PAD */
> > clks[IMX6SX_CLK_ANACLK1] = imx_obtain_fixed_clock("anaclk1", 0);
> > + clks[IMX6SX_CLK_ANACLK2] = imx_obtain_fixed_clock("anaclk2", 0);
>
> It seems to me that anaclk clocks are similar to ipp_di, and could be handled in
> the same way as ipp_di clocks. If that's the case, I would suggest we do the
> following.
>
> 1. Kill clocks container node by dropping 'reg' property and naming
> clock nodes uniquely. This is not strictly related to what we try
> to do here, but just to address DT maintainers' concern on 'clocks'
> container node.
>
> clk_ckil: clock-ckil {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> clock-frequency = <32768>;
> clock-output-names = "ckil";
> };
>
> clk_osc: clock-osc {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> clock-frequency = <24000000>;
> clock-output-names = "osc";
> };
>
> clk_ipp_di0: clock-ipp-di0 {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> clock-frequency = <0>;
> clock-output-names = "ipp_di0";
> };
>
> clk_ipp_di1: clock-ipp-di1 {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> clock-frequency = <0>;
> clock-output-names = "ipp_di1";
> };
>
> clks: ccm at 20c4000 {
> compatible = "fsl,imx6sx-ccm";
> reg = <0x020c4000 0x4000>;
> interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
> #clock-cells = <1>;
> clocks = <&clk_ckil>, <&clk_osc>, <&clk_ipp_di0>, <&clk_ipp_di1>;
> clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
> };
>
> 2. Patch clock driver to have anaclk1 and anaclk2 handled in the same
> way as ipp_di clocks.
>
> clks[IMX6SX_CLK_ANACLK1] = of_clk_get_by_name(ccm_node, "anaclk1");
> clks[IMX6SX_CLK_ANACLK2] = of_clk_get_by_name(ccm_node, "anaclk2");
>
> 3. Add anaclk1 and anaclk2 with clock-frequency being 0 by default, just
> like ipp_di clocks.
>
> clk_anaclk1: clock-anaclk1 {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> clock-frequency = <0>;
> clock-output-names = "anaclk1";
> };
>
> clk_anaclk2: clock-anaclk2 {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> clock-frequency = <0>;
> clock-output-names = "anaclk2";
> };
>
> clks: ccm at 20c4000 {
> compatible = "fsl,imx6sx-ccm";
> reg = <0x020c4000 0x4000>;
> interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
> #clock-cells = <1>;
> clocks = <&clk_ckil>, <&clk_osc>,
> <&clk_ipp_di0>, <&clk_ipp_di1>,
> <&clk_anaclk1>, <&clk_anaclk2>;
> clock-names = "ckil", "osc",
> "ipp_di0", "ipp_di1",
> "anaclk1", "anaclk2";
> };
>
> 4. Overwrite anaclk2 clock-frequency in imx6sx-sabreauto.dts.
>
> &clk_anaclk2 {
> clock-frequency = <24576000>;
> };
>
> Please test and let me know whether it works or not. Thanks.
>
> Shawn
It is working, see below clk tree dump, I will send a V3 patch, thanks.
Anson.
root at imx6qpdlsolox:~# cat /sys/kernel/debug/clk/clk_summary
enable prepare protect
clock count count count rate accuracy phase
----------------------------------------------------------------------------------------
dummy 3 3 0 0 0 0
cko1_sel 0 0 0 0 0 0
cko1_podf 0 0 0 0 0 0
cko1 0 0 0 0 0 0
cko 0 0 0 0 0 0
usbphy2_gate 1 1 0 0 0 0
usbphy1_gate 1 1 0 0 0 0
anaclk2 0 0 0 24576000 0 0
lvds2_in 0 0 0 24576000 0 0
anaclk1 0 0 0 0 0 0
lvds1_in 0 0 0 0 0 0
ipp_di1 0 0 0 0 0 0
ipp_di0 0 0 0 0 0 0
osc 6 6 0 24000000 0 0
>
> >
> > np = of_find_compatible_node(NULL, NULL, "fsl,imx6sx-anatop");
> > base = of_iomap(np, 0);
> > @@ -228,7 +229,9 @@ static void __init imx6sx_clocks_init(struct
> device_node *ccm_node)
> > clks[IMX6SX_CLK_PCIE_REF_125M] = imx_clk_gate("pcie_ref_125m",
> > "pcie_ref", base + 0xe0, 19);
> >
> > clks[IMX6SX_CLK_LVDS1_OUT] = imx_clk_gate_exclusive("lvds1_out",
> > "lvds1_sel", base + 0x160, 10, BIT(12));
> > + clks[IMX6SX_CLK_LVDS2_OUT] = imx_clk_gate_exclusive("lvds2_out",
> > +"lvds2_sel", base + 0x160, 11, BIT(13));
> > clks[IMX6SX_CLK_LVDS1_IN] = imx_clk_gate_exclusive("lvds1_in",
> "anaclk1", base + 0x160, 12, BIT(10));
> > + clks[IMX6SX_CLK_LVDS2_IN] = imx_clk_gate_exclusive("lvds2_in",
> "anaclk2", base + 0x160, 13, BIT(11));
> >
> > clks[IMX6SX_CLK_ENET_REF] = clk_register_divider_table(NULL,
> "enet_ref", "pll6_enet", 0,
> > base + 0xe0, 0, 2, 0, clk_enet_ref_table, @@ -270,6 +273,7 @@
> > static void __init imx6sx_clocks_init(struct device_node *ccm_node)
> >
> > /* name
> reg shift width parent_names num_parents */
> > clks[IMX6SX_CLK_LVDS1_SEL] = imx_clk_mux("lvds1_sel",
> base + 0x160, 0, 5, lvds_sels, ARRAY_SIZE(lvds_sels));
> > + clks[IMX6SX_CLK_LVDS2_SEL] = imx_clk_mux("lvds2_sel",
> base + 0x160, 5, 5, lvds_sels, ARRAY_SIZE(lvds_sels));
> >
> > np = ccm_node;
> > base = of_iomap(np, 0);
> > diff --git a/include/dt-bindings/clock/imx6sx-clock.h
> > b/include/dt-bindings/clock/imx6sx-clock.h
> > index 36f0324..cd2d6c5 100644
> > --- a/include/dt-bindings/clock/imx6sx-clock.h
> > +++ b/include/dt-bindings/clock/imx6sx-clock.h
> > @@ -275,6 +275,10 @@
> > #define IMX6SX_PLL6_BYPASS 262
> > #define IMX6SX_PLL7_BYPASS 263
> > #define IMX6SX_CLK_SPDIF_GCLK 264
> > -#define IMX6SX_CLK_CLK_END 265
> > +#define IMX6SX_CLK_LVDS2_SEL 265
> > +#define IMX6SX_CLK_LVDS2_OUT 266
> > +#define IMX6SX_CLK_LVDS2_IN 267
> > +#define IMX6SX_CLK_ANACLK2 268
> > +#define IMX6SX_CLK_CLK_END 269
> >
> > #endif /* __DT_BINDINGS_CLOCK_IMX6SX_H */
> > --
> > 2.7.4
> >
> > --
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