[MODERATED] Re: [patch V11 05/16] SSB 5

[Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>]

On Wed, May 16, 2018 at 09:55:34AM +0200, speck for Paolo Bonzini wrote:
> On 11/05/2018 01:50, speck for Konrad Rzeszutek Wilk wrote:
> >> Was this with MSR lists unconditionally, or with MSR list combined with 
> >> the "wait for the first write" approach?
> > It was the unconditional. The patch went through a bunch of iterations and this
> > is what we ended up testing - but it showed around 2-3% performance degradation
> > when doing TPCC-like workloads. I am trying to track down exactly what hardware
> > that was done against.
> 
> FWIW the Xen people found the same.  Isn't there some magic in how

Oh. I didn't know anybody else cared about TPCC except Oracle.

> SPEC_CTRL is implemented, to avoid serialization?

As I understand it, it depends on the CPU family - some are latched, while others
have it more like a reset button. And some probably do nothing.

> 
> Also we don't use MSR save lists at all, so we might get some fixed
> overhead when we change the MSR save count from zero to nonzero.
> 
> Paolo
>