All of lore.kernel.org
 help / color / mirror / Atom feed
From: Vinod Koul <vinod.koul@linaro.org>
To: Wen He <wen.he_1@nxp.com>
Cc: "dmaengine@vger.kernel.org" <dmaengine@vger.kernel.org>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	Leo Li <leoyang.li@nxp.com>, Jiafei Pan <jiafei.pan@nxp.com>,
	Jiaheng Fan <jiaheng.fan@nxp.com>
Subject: [v5,2/6] dmaengine: fsl-qdma: Add qDMA controller driver for Layerscape SoCs
Date: Wed, 30 May 2018 15:57:44 +0530	[thread overview]
Message-ID: <20180530102744.GE16230@vkoul-mobl> (raw)

On 29-05-18, 10:38, Wen He wrote:

> > > > > +	/*
> > > > > +	 * Clear the command queue interrupt detect register for all
> > queues.
> > > > > +	 */
> > > > > +	qdma_writel(fsl_qdma, 0xffffffff, block + FSL_QDMA_BCQIDR(0));
> > > >
> > > > bunch of writes with 0xffffffff, can you explain why? Also helps to
> > > > make a macro for this
> > > >
> > >
> > > Maybe I missed that I should defined the value to the macro and add
> > comment.
> > > Right?
> > 
> > that would help, but why are you writing 0xffffffff at all these places?
> 
> This value is from the datasheet.
> Should I write comments to here?

Yes that would help explaining what this does..

> > > > > +static void fsl_qdma_issue_pending(struct dma_chan *chan) {
> > > > > +	struct fsl_qdma_chan *fsl_chan = to_fsl_qdma_chan(chan);
> > > > > +	struct fsl_qdma_queue *fsl_queue = fsl_chan->queue;
> > > > > +	unsigned long flags;
> > > > > +
> > > > > +	spin_lock_irqsave(&fsl_queue->queue_lock, flags);
> > > > > +	spin_lock(&fsl_chan->vchan.lock);
> > > > > +	if (vchan_issue_pending(&fsl_chan->vchan))
> > > > > +		fsl_qdma_enqueue_desc(fsl_chan);
> > > > > +	spin_unlock(&fsl_chan->vchan.lock);
> > > > > +	spin_unlock_irqrestore(&fsl_queue->queue_lock, flags);
> > > >
> > > > why do we need two locks, and since you are doing vchan why should
> > > > you add your own lock on top
> > > >
> > >
> > > Yes, we need two locks.
> > > As you know, the QDMA support multiple virtualized blocks for multi-core
> > support.
> > > so we need to make sure that muliti-core access issues.
> > 
> > but why cant you use vchan lock for all?
> > 
> 
> We can't only use vchan lock for all. otherwise enqueue action will be interrupted.

I think it is possible to use only vchan lock

WARNING: multiple messages have this Message-ID (diff)
From: Vinod Koul <vinod.koul@linaro.org>
To: Wen He <wen.he_1@nxp.com>
Cc: "dmaengine@vger.kernel.org" <dmaengine@vger.kernel.org>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	Leo Li <leoyang.li@nxp.com>, Jiafei Pan <jiafei.pan@nxp.com>,
	Jiaheng Fan <jiaheng.fan@nxp.com>
Subject: Re: [v5 2/6] dmaengine: fsl-qdma: Add qDMA controller driver for Layerscape SoCs
Date: Wed, 30 May 2018 15:57:44 +0530	[thread overview]
Message-ID: <20180530102744.GE16230@vkoul-mobl> (raw)
In-Reply-To: <AM6PR0402MB3382F92D1123CDCA0E0075EDE26D0@AM6PR0402MB3382.eurprd04.prod.outlook.com>

On 29-05-18, 10:38, Wen He wrote:

> > > > > +	/*
> > > > > +	 * Clear the command queue interrupt detect register for all
> > queues.
> > > > > +	 */
> > > > > +	qdma_writel(fsl_qdma, 0xffffffff, block + FSL_QDMA_BCQIDR(0));
> > > >
> > > > bunch of writes with 0xffffffff, can you explain why? Also helps to
> > > > make a macro for this
> > > >
> > >
> > > Maybe I missed that I should defined the value to the macro and add
> > comment.
> > > Right?
> > 
> > that would help, but why are you writing 0xffffffff at all these places?
> 
> This value is from the datasheet.
> Should I write comments to here?

Yes that would help explaining what this does..

> > > > > +static void fsl_qdma_issue_pending(struct dma_chan *chan) {
> > > > > +	struct fsl_qdma_chan *fsl_chan = to_fsl_qdma_chan(chan);
> > > > > +	struct fsl_qdma_queue *fsl_queue = fsl_chan->queue;
> > > > > +	unsigned long flags;
> > > > > +
> > > > > +	spin_lock_irqsave(&fsl_queue->queue_lock, flags);
> > > > > +	spin_lock(&fsl_chan->vchan.lock);
> > > > > +	if (vchan_issue_pending(&fsl_chan->vchan))
> > > > > +		fsl_qdma_enqueue_desc(fsl_chan);
> > > > > +	spin_unlock(&fsl_chan->vchan.lock);
> > > > > +	spin_unlock_irqrestore(&fsl_queue->queue_lock, flags);
> > > >
> > > > why do we need two locks, and since you are doing vchan why should
> > > > you add your own lock on top
> > > >
> > >
> > > Yes, we need two locks.
> > > As you know, the QDMA support multiple virtualized blocks for multi-core
> > support.
> > > so we need to make sure that muliti-core access issues.
> > 
> > but why cant you use vchan lock for all?
> > 
> 
> We can't only use vchan lock for all. otherwise enqueue action will be interrupted.

I think it is possible to use only vchan lock

-- 
~Vinod

             reply	other threads:[~2018-05-30 10:27 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-30 10:27 Vinod Koul [this message]
2018-05-30 10:27 ` [v5 2/6] dmaengine: fsl-qdma: Add qDMA controller driver for Layerscape SoCs Vinod Koul
  -- strict thread matches above, loose matches on Subject: below --
2018-06-14  7:26 [v5,2/6] " Vinod Koul
2018-06-14  7:26 ` [v5 2/6] " Vinod
2018-06-14  2:15 [v5,2/6] " Wen He
2018-06-14  2:15 ` [v5 2/6] " Wen He
2018-06-12 16:32 [v5,2/6] " Li Yang
2018-06-12 16:32 ` [v5 2/6] " Li Yang
2018-06-12  4:00 [v5,2/6] " Vinod Koul
2018-06-12  4:00 ` [v5 2/6] " Vinod
2018-06-11  8:14 [v5,2/6] " Wen He
2018-06-11  8:14 ` [v5 2/6] " Wen He
2018-06-05 17:24 [v5,2/6] " Li Yang
2018-06-05 17:24 ` [v5 2/6] " Li Yang
2018-06-05 16:30 [v5,2/6] " Vinod Koul
2018-06-05 16:30 ` [v5 2/6] " Vinod
2018-06-05 16:28 [v5,2/6] " Vinod Koul
2018-06-05 16:28 ` [v5 2/6] " Vinod
2018-06-04  9:53 [v5,2/6] " Wen He
2018-06-04  9:53 ` [v5 2/6] " Wen He
2018-05-31  1:58 [v5,2/6] " Wen He
2018-05-31  1:58 ` [v5 2/6] " Wen He
2018-05-31  0:49 [v5,3/6] dt-bindings: fsl-qdma: Add NXP Layerscpae qDMA controller bindings Rob Herring
2018-05-31  0:49 ` [v5 3/6] " Rob Herring
2018-05-30 18:51 [v5,2/6] dmaengine: fsl-qdma: Add qDMA controller driver for Layerscape SoCs Li Yang
2018-05-30 18:51 ` [v5 2/6] " Li Yang
2018-05-29 10:38 [v5,2/6] " Wen He
2018-05-29 10:38 ` [v5 2/6] " Wen He
2018-05-29 10:22 [v5,1/6] dmaengine: fsldma: Replace DMA_IN/OUT by FSL_DMA_IN/OUT Wen He
2018-05-29 10:22 ` [v5 1/6] " Wen He
2018-05-29 10:21 [v5,1/6] " Vinod Koul
2018-05-29 10:21 ` [v5 1/6] " Vinod
2018-05-29 10:19 [v5,2/6] dmaengine: fsl-qdma: Add qDMA controller driver for Layerscape SoCs Vinod Koul
2018-05-29 10:19 ` [v5 2/6] " Vinod
2018-05-29 10:14 [v5,1/6] dmaengine: fsldma: Replace DMA_IN/OUT by FSL_DMA_IN/OUT Wen He
2018-05-29 10:14 ` [v5 1/6] " Wen He
2018-05-29  9:59 [v5,2/6] dmaengine: fsl-qdma: Add qDMA controller driver for Layerscape SoCs Wen He
2018-05-29  9:59 ` [v5 2/6] " Wen He
2018-05-29  7:07 [v5,2/6] " Vinod Koul
2018-05-29  7:07 ` [v5 2/6] " Vinod
2018-05-29  4:49 [v5,1/6] dmaengine: fsldma: Replace DMA_IN/OUT by FSL_DMA_IN/OUT Vinod Koul
2018-05-29  4:49 ` [v5 1/6] " Vinod
2018-05-25 11:19 [v5,6/6] arm: dts: ls1021a: add qdma device tree nodes Wen He
2018-05-25 11:19 ` [v5 6/6] " Wen He
2018-05-25 11:19 [v5,5/6] arm64: dts: ls1046a: " Wen He
2018-05-25 11:19 ` [v5 5/6] " Wen He
2018-05-25 11:19 [v5,4/6] arm64: dts: ls1043a: " Wen He
2018-05-25 11:19 ` [v5 4/6] " Wen He
2018-05-25 11:19 [v5,3/6] dt-bindings: fsl-qdma: Add NXP Layerscpae qDMA controller bindings Wen He
2018-05-25 11:19 ` [v5 3/6] " Wen He
2018-05-25 11:19 [v5,2/6] dmaengine: fsl-qdma: Add qDMA controller driver for Layerscape SoCs Wen He
2018-05-25 11:19 ` [v5 2/6] " Wen He
2018-05-25 11:19 [v5,1/6] dmaengine: fsldma: Replace DMA_IN/OUT by FSL_DMA_IN/OUT Wen He
2018-05-25 11:19 ` [v5 1/6] " Wen He

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20180530102744.GE16230@vkoul-mobl \
    --to=vinod.koul@linaro.org \
    --cc=devicetree@vger.kernel.org \
    --cc=dmaengine@vger.kernel.org \
    --cc=jiafei.pan@nxp.com \
    --cc=jiaheng.fan@nxp.com \
    --cc=leoyang.li@nxp.com \
    --cc=robh+dt@kernel.org \
    --cc=wen.he_1@nxp.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.