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From: Andi Kleen <ak@linux.intel.com>
To: speck@linutronix.de
Subject: [MODERATED] Re: [PATCH 1/2] L1TF KVM v2 1
Date: Wed, 20 Jun 2018 13:13:09 -0700	[thread overview]
Message-ID: <20180620201309.GR30690@tassilo.jf.intel.com> (raw)
In-Reply-To: <20180620164207.31771-2-pbonzini@redhat.com>

> +
> +/*
> + * The L1D cache is 32 KiB on Skylake, but to flush it we have to read in
> + * 64 KiB because the replacement algorithm is not exactly LRU.
> + */
> +#define L1D_CACHE_ORDER 4
> +static void *__read_mostly empty_zero_pages;

I thought we agreed to remove this? We should be only using the MSR based flush
methods, as microcode updates are needed in any case for other things.

-Andi

  reply	other threads:[~2018-06-20 20:13 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-20 16:42 [MODERATED] [PATCH 0/2] L1TF KVM v2 0 Paolo Bonzini
2018-06-20 16:42 ` [MODERATED] [PATCH 1/2] L1TF KVM v2 1 Paolo Bonzini
2018-06-20 20:13   ` Andi Kleen [this message]
2018-06-20 20:16     ` Thomas Gleixner
2018-06-20 20:31       ` [MODERATED] " Konrad Rzeszutek Wilk
2018-06-20 20:49         ` Thomas Gleixner
2018-06-20 20:52         ` [MODERATED] " Jiri Kosina
2018-06-20 20:24     ` Jiri Kosina
2018-06-20 21:01   ` Konrad Rzeszutek Wilk
2018-06-20 21:43     ` Konrad Rzeszutek Wilk
2018-06-21  8:15   ` Peter Zijlstra
2018-06-20 16:42 ` [MODERATED] [PATCH 2/2] L1TF KVM v2 2 Paolo Bonzini
2018-06-20 20:25   ` [MODERATED] " Jiri Kosina
2018-06-20 20:32     ` Konrad Rzeszutek Wilk

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