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* add support for Xilinx PCIe root ports on RISC-V v2
@ 2018-08-01 15:14 ` Christoph Hellwig
  0 siblings, 0 replies; 42+ messages in thread
From: Christoph Hellwig @ 2018-08-01 15:14 UTC (permalink / raw)
  To: Lorenzo Pieralisi, Bjorn Helgaas
  Cc: Palmer Dabbelt, Wesley W . Terpstra, Arnd Bergmann, linux-pci,
	linux-riscv

Hi all,

this series with patches originally from Palmer and Wesley adds support
for the pcie-xilinx host driver on RISC-V boards.  The interesting part
about that is that the IP blocks is limited to 32-bit DMA internally,
which didn't seem to be an issue with the existing users, but shows
up easily with the Sifive RISC-V boards that have physical memory
wired up above 4G.

Note that patches 1 and 2 depend on changes in the dma-mapping tree
to add the bus_dma_mask field to struct device and would have to merge
through the dma-mapping tree or a shared stable branch.  Patch 3 could
be merged independently.

Changes since v1:
 - move the add_dev method to struct pci_host_bridge
 - use the new bus_dma_mask field

^ permalink raw reply	[flat|nested] 42+ messages in thread
* add support for Xilinx PCIe root ports on RISC-V v3
@ 2018-08-04 10:13 Christoph Hellwig
  2018-08-04 10:14   ` Christoph Hellwig
  0 siblings, 1 reply; 42+ messages in thread
From: Christoph Hellwig @ 2018-08-04 10:13 UTC (permalink / raw)
  To: Lorenzo Pieralisi, Bjorn Helgaas
  Cc: Palmer Dabbelt, Wesley W . Terpstra, Arnd Bergmann, linux-pci,
	linux-riscv

Hi all,

this series with patches originally from Palmer and Wesley adds support
for the pcie-xilinx host driver on RISC-V boards.  The interesting part
about that is that the IP blocks is limited to 32-bit DMA internally,
which didn't seem to be an issue with the existing users, but shows
up easily with the Sifive RISC-V boards that have physical memory
wired up above 4G.

Note that patches 1 and 2 depend on changes in the dma-mapping tree
to add the bus_dma_mask field to struct device and would have to merge
through the dma-mapping tree or a shared stable branch.  Patch 3 could
be merged independently.

Changes since v2:
 - rename the add_dev callback to add_device and allow it to return an
   error code (to allow it to replace pcibios_add_device in the future)

Changes since v1:
 - move the add_dev method to struct pci_host_bridge
 - use the new bus_dma_mask field

^ permalink raw reply	[flat|nested] 42+ messages in thread

end of thread, other threads:[~2018-08-17 15:47 UTC | newest]

Thread overview: 42+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-08-01 15:14 add support for Xilinx PCIe root ports on RISC-V v2 Christoph Hellwig
2018-08-01 15:14 ` Christoph Hellwig
2018-08-01 15:14 ` [PATCH 1/3] PCI: add a callback to struct pci_host_bridge for adding a new device Christoph Hellwig
2018-08-01 15:14   ` Christoph Hellwig
2018-08-02 16:54   ` Lorenzo Pieralisi
2018-08-02 16:54     ` Lorenzo Pieralisi
2018-08-04 10:11     ` Christoph Hellwig
2018-08-04 10:11       ` Christoph Hellwig
2018-08-15 19:52     ` Bjorn Helgaas
2018-08-15 19:52       ` Bjorn Helgaas
2018-08-16 20:59       ` Bjorn Helgaas
2018-08-16 20:59         ` Bjorn Helgaas
2018-08-16 21:04         ` Arnd Bergmann
2018-08-16 21:04           ` Arnd Bergmann
2018-08-17 15:25           ` Lorenzo Pieralisi
2018-08-17 15:25             ` Lorenzo Pieralisi
2018-08-17 15:47             ` Arnd Bergmann
2018-08-17 15:47               ` Arnd Bergmann
2018-08-01 15:14 ` [PATCH 2/3] PCI/xilinx: Work-around for hardware DMA limit (32 bits) Christoph Hellwig
2018-08-01 15:14   ` Christoph Hellwig
2018-08-01 15:14 ` [PATCH 3/3] PCI/xilinx: Depend on OF instead of the ARCH Christoph Hellwig
2018-08-01 15:14   ` Christoph Hellwig
2018-08-02 16:56   ` Lorenzo Pieralisi
2018-08-02 16:56     ` Lorenzo Pieralisi
2018-08-04 10:12     ` Christoph Hellwig
2018-08-04 10:12       ` Christoph Hellwig
2018-08-01 23:02 ` add support for Xilinx PCIe root ports on RISC-V v2 Wesley Terpstra
2018-08-01 23:02   ` Wesley Terpstra
2018-08-02  7:14   ` Christoph Hellwig
2018-08-02  7:14     ` Christoph Hellwig
  -- strict thread matches above, loose matches on Subject: below --
2018-08-04 10:13 add support for Xilinx PCIe root ports on RISC-V v3 Christoph Hellwig
2018-08-04 10:14 ` [PATCH 1/3] PCI: add a callback to struct pci_host_bridge for adding a new device Christoph Hellwig
2018-08-04 10:14   ` Christoph Hellwig
2018-08-06 11:23   ` Lorenzo Pieralisi
2018-08-06 11:23     ` Lorenzo Pieralisi
2018-08-06 12:30     ` Christoph Hellwig
2018-08-06 12:30       ` Christoph Hellwig
2018-08-06 13:54       ` Arnd Bergmann
2018-08-06 13:54         ` Arnd Bergmann
2018-08-06 14:55         ` Lorenzo Pieralisi
2018-08-06 14:55           ` Lorenzo Pieralisi
2018-08-06 19:49           ` Arnd Bergmann
2018-08-06 19:49             ` Arnd Bergmann

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