From: Christoph Hellwig <hch@lst.de>
To: Wesley Terpstra <wesley@sifive.com>
Cc: Christoph Hellwig <hch@lst.de>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Arnd Bergmann <arnd@arndb.de>,
linux-pci@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: Re: [PATCH 2/3] PCI/xilinx: Work-around for hardware DMA limit (32 bits)
Date: Mon, 6 Aug 2018 18:34:16 +0200 [thread overview]
Message-ID: <20180806163416.GA18429@lst.de> (raw)
In-Reply-To: <CAMgXwTjcjdiBN9yksL9zuZQyGjckC+F+qwzSm32RjjFSWHFCPQ@mail.gmail.com>
On Mon, Aug 06, 2018 at 09:21:40AM -0700, Wesley Terpstra wrote:
> On Mon, Aug 6, 2018 at 5:35 AM, Christoph Hellwig <hch@lst.de> wrote:
> > Note that we already have the mechanism for firmware directed dma limits
> > in place, it is called the dma-ranges DT property. If we can get the
> > SiFive firmware to set it up properly the RISC-V swiotlb code will
> > just do the right thing.
>
> Does this mean we only need to set the dma-ranges property inside the
> pci DTS node? No changes to the driver needed?
The code looks at the DT parent of the PCI bridge device. Take a look
at drivers/pci/pci-driver.c:pci_dma_configure() and
drivers/of/device.c:of_dma_configure() in 4.18-rc (for older kernels
the involved functions are slightly different, but the functionality
is the same).
WARNING: multiple messages have this Message-ID (diff)
From: hch@lst.de (Christoph Hellwig)
To: linux-riscv@lists.infradead.org
Subject: [PATCH 2/3] PCI/xilinx: Work-around for hardware DMA limit (32 bits)
Date: Mon, 6 Aug 2018 18:34:16 +0200 [thread overview]
Message-ID: <20180806163416.GA18429@lst.de> (raw)
In-Reply-To: <CAMgXwTjcjdiBN9yksL9zuZQyGjckC+F+qwzSm32RjjFSWHFCPQ@mail.gmail.com>
On Mon, Aug 06, 2018 at 09:21:40AM -0700, Wesley Terpstra wrote:
> On Mon, Aug 6, 2018 at 5:35 AM, Christoph Hellwig <hch@lst.de> wrote:
> > Note that we already have the mechanism for firmware directed dma limits
> > in place, it is called the dma-ranges DT property. If we can get the
> > SiFive firmware to set it up properly the RISC-V swiotlb code will
> > just do the right thing.
>
> Does this mean we only need to set the dma-ranges property inside the
> pci DTS node? No changes to the driver needed?
The code looks at the DT parent of the PCI bridge device. Take a look
at drivers/pci/pci-driver.c:pci_dma_configure() and
drivers/of/device.c:of_dma_configure() in 4.18-rc (for older kernels
the involved functions are slightly different, but the functionality
is the same).
next prev parent reply other threads:[~2018-08-06 18:38 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-04 10:13 add support for Xilinx PCIe root ports on RISC-V v3 Christoph Hellwig
2018-08-04 10:13 ` Christoph Hellwig
2018-08-04 10:14 ` [PATCH 1/3] PCI: add a callback to struct pci_host_bridge for adding a new device Christoph Hellwig
2018-08-04 10:14 ` Christoph Hellwig
2018-08-06 11:23 ` Lorenzo Pieralisi
2018-08-06 11:23 ` Lorenzo Pieralisi
2018-08-06 12:30 ` Christoph Hellwig
2018-08-06 12:30 ` Christoph Hellwig
2018-08-06 13:54 ` Arnd Bergmann
2018-08-06 13:54 ` Arnd Bergmann
2018-08-06 14:55 ` Lorenzo Pieralisi
2018-08-06 14:55 ` Lorenzo Pieralisi
2018-08-06 19:49 ` Arnd Bergmann
2018-08-06 19:49 ` Arnd Bergmann
2018-08-04 10:14 ` [PATCH 2/3] PCI/xilinx: Work-around for hardware DMA limit (32 bits) Christoph Hellwig
2018-08-04 10:14 ` Christoph Hellwig
2018-08-05 20:02 ` Wesley Terpstra
2018-08-05 20:02 ` Wesley Terpstra
2018-08-06 12:35 ` Christoph Hellwig
2018-08-06 12:35 ` Christoph Hellwig
2018-08-06 13:40 ` Lorenzo Pieralisi
2018-08-06 13:40 ` Lorenzo Pieralisi
2018-08-06 15:33 ` Christoph Hellwig
2018-08-06 15:33 ` Christoph Hellwig
2018-08-06 16:21 ` Wesley Terpstra
2018-08-06 16:21 ` Wesley Terpstra
2018-08-06 16:34 ` Christoph Hellwig [this message]
2018-08-06 16:34 ` Christoph Hellwig
2018-08-04 10:14 ` [PATCH 3/3] PCI/xilinx: Depend on OF instead of the ARCH Christoph Hellwig
2018-08-04 10:14 ` Christoph Hellwig
2018-08-06 10:52 ` Lorenzo Pieralisi
2018-08-06 10:52 ` Lorenzo Pieralisi
-- strict thread matches above, loose matches on Subject: below --
2018-08-01 15:14 add support for Xilinx PCIe root ports on RISC-V v2 Christoph Hellwig
2018-08-01 15:14 ` [PATCH 2/3] PCI/xilinx: Work-around for hardware DMA limit (32 bits) Christoph Hellwig
2018-08-01 15:14 ` Christoph Hellwig
2018-06-19 14:16 add support for Xilinx PCIe root ports on RISC-V Christoph Hellwig
2018-06-19 14:16 ` [PATCH 2/3] PCI/xilinx: Work-around for hardware DMA limit (32 bits) Christoph Hellwig
2018-06-19 14:16 ` Christoph Hellwig
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