From: Borislav Petkov <bp@alien8.de>
To: Manish Narani <manish.narani@xilinx.com>, robh+dt@kernel.org
Cc: mark.rutland@arm.com, michal.simek@xilinx.com,
mchehab@kernel.org, leoyang.li@nxp.com, amit.kucheria@linaro.org,
olof@lixom.net, sgoud@xilinx.com, anirudh@xilinx.com,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-edac@vger.kernel.org
Subject: [v5,4/4] arm64: zynqmp: Add DDRC node
Date: Wed, 5 Sep 2018 12:20:53 +0200 [thread overview]
Message-ID: <20180905102053.GE2237@zn.tnic> (raw)
On Fri, Aug 31, 2018 at 06:57:50PM +0530, Manish Narani wrote:
> Add ddrc memory controller node in dts. The size mentioned in dts is
> 0x30000, because we need to access DDR_QOS INTR registers located at
> 0xFD090208 from this driver.
>
> Signed-off-by: Manish Narani <manish.narani@xilinx.com>
> ---
> arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> index 29ce234..a81d3b16 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> @@ -355,6 +355,13 @@
> xlnx,bus-width = <64>;
> };
>
> + mc: memory-controller@fd070000 {
> + compatible = "xlnx,zynqmp-ddrc-2.40a";
> + reg = <0x0 0xfd070000 0x0 0x30000>;
> + interrupt-parent = <&gic>;
> + interrupts = <0 112 4>;
> + };
> +
> gem0: ethernet@ff0b0000 {
> compatible = "cdns,zynqmp-gem", "cdns,gem";
> status = "disabled";
> --
This still needs Rob's ACK.
WARNING: multiple messages have this Message-ID (diff)
From: bp@alien8.de (Borislav Petkov)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 4/4] arm64: zynqmp: Add DDRC node
Date: Wed, 5 Sep 2018 12:20:53 +0200 [thread overview]
Message-ID: <20180905102053.GE2237@zn.tnic> (raw)
In-Reply-To: <1535722070-10394-5-git-send-email-manish.narani@xilinx.com>
On Fri, Aug 31, 2018 at 06:57:50PM +0530, Manish Narani wrote:
> Add ddrc memory controller node in dts. The size mentioned in dts is
> 0x30000, because we need to access DDR_QOS INTR registers located at
> 0xFD090208 from this driver.
>
> Signed-off-by: Manish Narani <manish.narani@xilinx.com>
> ---
> arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> index 29ce234..a81d3b16 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> @@ -355,6 +355,13 @@
> xlnx,bus-width = <64>;
> };
>
> + mc: memory-controller at fd070000 {
> + compatible = "xlnx,zynqmp-ddrc-2.40a";
> + reg = <0x0 0xfd070000 0x0 0x30000>;
> + interrupt-parent = <&gic>;
> + interrupts = <0 112 4>;
> + };
> +
> gem0: ethernet at ff0b0000 {
> compatible = "cdns,zynqmp-gem", "cdns,gem";
> status = "disabled";
> --
This still needs Rob's ACK.
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
WARNING: multiple messages have this Message-ID (diff)
From: Borislav Petkov <bp@alien8.de>
To: Manish Narani <manish.narani@xilinx.com>, robh+dt@kernel.org
Cc: mark.rutland@arm.com, michal.simek@xilinx.com,
mchehab@kernel.org, leoyang.li@nxp.com, amit.kucheria@linaro.org,
olof@lixom.net, sgoud@xilinx.com, anirudh@xilinx.com,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-edac@vger.kernel.org
Subject: Re: [PATCH v5 4/4] arm64: zynqmp: Add DDRC node
Date: Wed, 5 Sep 2018 12:20:53 +0200 [thread overview]
Message-ID: <20180905102053.GE2237@zn.tnic> (raw)
In-Reply-To: <1535722070-10394-5-git-send-email-manish.narani@xilinx.com>
On Fri, Aug 31, 2018 at 06:57:50PM +0530, Manish Narani wrote:
> Add ddrc memory controller node in dts. The size mentioned in dts is
> 0x30000, because we need to access DDR_QOS INTR registers located at
> 0xFD090208 from this driver.
>
> Signed-off-by: Manish Narani <manish.narani@xilinx.com>
> ---
> arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> index 29ce234..a81d3b16 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> @@ -355,6 +355,13 @@
> xlnx,bus-width = <64>;
> };
>
> + mc: memory-controller@fd070000 {
> + compatible = "xlnx,zynqmp-ddrc-2.40a";
> + reg = <0x0 0xfd070000 0x0 0x30000>;
> + interrupt-parent = <&gic>;
> + interrupts = <0 112 4>;
> + };
> +
> gem0: ethernet@ff0b0000 {
> compatible = "cdns,zynqmp-gem", "cdns,gem";
> status = "disabled";
> --
This still needs Rob's ACK.
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
next reply other threads:[~2018-09-05 10:20 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-05 10:20 Borislav Petkov [this message]
2018-09-05 10:20 ` [PATCH v5 4/4] arm64: zynqmp: Add DDRC node Borislav Petkov
2018-09-05 10:20 ` Borislav Petkov
-- strict thread matches above, loose matches on Subject: below --
2018-09-06 16:14 [v5,3/4] edac: synopsys: Add EDAC ECC support for ZynqMP DDRC Manish Narani
2018-09-06 16:14 ` [PATCH v5 3/4] " Manish Narani
2018-09-06 16:14 ` Manish Narani
2018-09-06 16:14 ` Manish Narani
2018-09-06 15:53 [v5,1/4] edac: synps: Add platform specific structures for ddrc controller Manish Narani
2018-09-06 15:53 ` [PATCH v5 1/4] " Manish Narani
2018-09-06 15:53 ` Manish Narani
2018-09-06 15:21 [v5,2/4] dt: bindings: Document ZynqMP DDRC in Synopsys documentation Manish Narani
2018-09-06 15:21 ` [PATCH v5 2/4] " Manish Narani
2018-09-06 15:21 ` Manish Narani
2018-09-05 10:19 [v5,3/4] edac: synopsys: Add EDAC ECC support for ZynqMP DDRC Borislav Petkov
2018-09-05 10:19 ` [PATCH v5 3/4] " Borislav Petkov
2018-09-05 10:19 ` Borislav Petkov
2018-09-04 16:58 [v5,1/4] edac: synps: Add platform specific structures for ddrc controller Borislav Petkov
2018-09-04 16:58 ` [PATCH v5 1/4] " Borislav Petkov
2018-09-04 16:58 ` Borislav Petkov
2018-09-04 14:16 [v5,2/4] dt: bindings: Document ZynqMP DDRC in Synopsys documentation Rob Herring
2018-09-04 14:16 ` [PATCH v5 2/4] " Rob Herring
2018-09-04 14:16 ` Rob Herring
2018-08-31 13:27 [v5,4/4] arm64: zynqmp: Add DDRC node Manish Narani
2018-08-31 13:27 ` [PATCH v5 4/4] " Manish Narani
2018-08-31 13:27 ` Manish Narani
2018-08-31 13:27 ` Manish Narani
2018-08-31 13:27 [v5,3/4] edac: synopsys: Add EDAC ECC support for ZynqMP DDRC Manish Narani
2018-08-31 13:27 ` [PATCH v5 3/4] " Manish Narani
2018-08-31 13:27 ` Manish Narani
2018-08-31 13:27 ` Manish Narani
2018-08-31 13:27 [v5,2/4] dt: bindings: Document ZynqMP DDRC in Synopsys documentation Manish Narani
2018-08-31 13:27 ` [PATCH v5 2/4] " Manish Narani
2018-08-31 13:27 ` Manish Narani
2018-08-31 13:27 ` Manish Narani
2018-08-31 13:27 [v5,1/4] edac: synps: Add platform specific structures for ddrc controller Manish Narani
2018-08-31 13:27 ` [PATCH v5 1/4] " Manish Narani
2018-08-31 13:27 ` Manish Narani
2018-08-31 13:27 ` Manish Narani
2018-08-31 13:27 [PATCH v5 0/4] EDAC: Enhancements to Synopsys EDAC driver Manish Narani
2018-08-31 13:27 ` Manish Narani
2018-08-31 13:27 ` Manish Narani
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