From: Borislav Petkov <bp@alien8.de>
To: Manish Narani <manish.narani@xilinx.com>
Cc: robh+dt@kernel.org, mark.rutland@arm.com, mchehab@kernel.org,
michal.simek@xilinx.com, leoyang.li@nxp.com,
sudeep.holla@arm.com, amit.kucheria@linaro.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-edac@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: [v7,4/7] edac: synopsys: Add macro defines for ZynqMP DDRC
Date: Mon, 24 Sep 2018 11:22:26 +0200 [thread overview]
Message-ID: <20180924092226.GA20187@zn.tnic> (raw)
On Mon, Sep 17, 2018 at 07:55:02PM +0530, Manish Narani wrote:
> Add macro defines for ZynqMP DDR controller. These macros will be used
> for ZyqnMP ECC operations.
>
> Signed-off-by: Manish Narani <manish.narani@xilinx.com>
> ---
> drivers/edac/synopsys_edac.c | 168 +++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 168 insertions(+)
>
> diff --git a/drivers/edac/synopsys_edac.c b/drivers/edac/synopsys_edac.c
> index eb458e5..6bf7959 100644
> --- a/drivers/edac/synopsys_edac.c
> +++ b/drivers/edac/synopsys_edac.c
> @@ -97,6 +97,174 @@
> #define SCRUB_MODE_MASK 0x7
> #define SCRUB_MODE_SECDED 0x4
>
> +/* DDR ECC Quirks */
> +#define DDR_ECC_INTR_SUPPORT BIT(0)
> +#define DDR_ECC_DATA_POISON_SUPPORT BIT(1)
All those new additions are one column further to the left than the old
ones. Why?
Is there some significance here or can they all be vertically aligned?
WARNING: multiple messages have this Message-ID (diff)
From: bp@alien8.de (Borislav Petkov)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v7 4/7] edac: synopsys: Add macro defines for ZynqMP DDRC
Date: Mon, 24 Sep 2018 11:22:26 +0200 [thread overview]
Message-ID: <20180924092226.GA20187@zn.tnic> (raw)
In-Reply-To: <1537194305-9243-5-git-send-email-manish.narani@xilinx.com>
On Mon, Sep 17, 2018 at 07:55:02PM +0530, Manish Narani wrote:
> Add macro defines for ZynqMP DDR controller. These macros will be used
> for ZyqnMP ECC operations.
>
> Signed-off-by: Manish Narani <manish.narani@xilinx.com>
> ---
> drivers/edac/synopsys_edac.c | 168 +++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 168 insertions(+)
>
> diff --git a/drivers/edac/synopsys_edac.c b/drivers/edac/synopsys_edac.c
> index eb458e5..6bf7959 100644
> --- a/drivers/edac/synopsys_edac.c
> +++ b/drivers/edac/synopsys_edac.c
> @@ -97,6 +97,174 @@
> #define SCRUB_MODE_MASK 0x7
> #define SCRUB_MODE_SECDED 0x4
>
> +/* DDR ECC Quirks */
> +#define DDR_ECC_INTR_SUPPORT BIT(0)
> +#define DDR_ECC_DATA_POISON_SUPPORT BIT(1)
All those new additions are one column further to the left than the old
ones. Why?
Is there some significance here or can they all be vertically aligned?
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
WARNING: multiple messages have this Message-ID (diff)
From: Borislav Petkov <bp@alien8.de>
To: Manish Narani <manish.narani@xilinx.com>
Cc: robh+dt@kernel.org, mark.rutland@arm.com, mchehab@kernel.org,
michal.simek@xilinx.com, leoyang.li@nxp.com,
sudeep.holla@arm.com, amit.kucheria@linaro.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-edac@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v7 4/7] edac: synopsys: Add macro defines for ZynqMP DDRC
Date: Mon, 24 Sep 2018 11:22:26 +0200 [thread overview]
Message-ID: <20180924092226.GA20187@zn.tnic> (raw)
In-Reply-To: <1537194305-9243-5-git-send-email-manish.narani@xilinx.com>
On Mon, Sep 17, 2018 at 07:55:02PM +0530, Manish Narani wrote:
> Add macro defines for ZynqMP DDR controller. These macros will be used
> for ZyqnMP ECC operations.
>
> Signed-off-by: Manish Narani <manish.narani@xilinx.com>
> ---
> drivers/edac/synopsys_edac.c | 168 +++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 168 insertions(+)
>
> diff --git a/drivers/edac/synopsys_edac.c b/drivers/edac/synopsys_edac.c
> index eb458e5..6bf7959 100644
> --- a/drivers/edac/synopsys_edac.c
> +++ b/drivers/edac/synopsys_edac.c
> @@ -97,6 +97,174 @@
> #define SCRUB_MODE_MASK 0x7
> #define SCRUB_MODE_SECDED 0x4
>
> +/* DDR ECC Quirks */
> +#define DDR_ECC_INTR_SUPPORT BIT(0)
> +#define DDR_ECC_DATA_POISON_SUPPORT BIT(1)
All those new additions are one column further to the left than the old
ones. Why?
Is there some significance here or can they all be vertically aligned?
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
next reply other threads:[~2018-09-24 9:22 UTC|newest]
Thread overview: 83+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-24 9:22 Borislav Petkov [this message]
2018-09-24 9:22 ` [PATCH v7 4/7] edac: synopsys: Add macro defines for ZynqMP DDRC Borislav Petkov
2018-09-24 9:22 ` Borislav Petkov
-- strict thread matches above, loose matches on Subject: below --
2018-09-24 10:41 [v7,4/7] " Borislav Petkov
2018-09-24 10:41 ` [PATCH v7 4/7] " Borislav Petkov
2018-09-24 10:41 ` Borislav Petkov
2018-09-24 10:29 [v7,4/7] " Manish Narani
2018-09-24 10:29 ` [PATCH v7 4/7] " Manish Narani
2018-09-24 10:29 ` Manish Narani
2018-09-24 10:20 [v7,5/7] edac: synopsys: Add EDAC ECC support " Manish Narani
2018-09-24 10:20 ` [PATCH v7 5/7] " Manish Narani
2018-09-24 10:20 ` Manish Narani
2018-09-24 10:16 [v7,2/7] edac: synps: Add platform specific structures for ddrc controller Manish Narani
2018-09-24 10:16 ` [PATCH v7 2/7] " Manish Narani
2018-09-24 10:16 ` Manish Narani
2018-09-24 10:07 [v7,2/7] " Manish Narani
2018-09-24 10:07 ` [PATCH v7 2/7] " Manish Narani
2018-09-24 10:07 ` Manish Narani
2018-09-24 9:53 [v7,7/7] edac: synopsys: Add Error Injection support for ZynqMP DDRC Borislav Petkov
2018-09-24 9:53 ` [PATCH v7 7/7] " Borislav Petkov
2018-09-24 9:53 ` Borislav Petkov
2018-09-21 12:57 [v7,6/7] arm64: zynqmp: Add DDRC node Borislav Petkov
2018-09-21 12:57 ` [PATCH v7 6/7] " Borislav Petkov
2018-09-21 12:57 ` Borislav Petkov
2018-09-21 12:56 [v7,5/7] edac: synopsys: Add EDAC ECC support for ZynqMP DDRC Borislav Petkov
2018-09-21 12:56 ` [PATCH v7 5/7] " Borislav Petkov
2018-09-21 12:56 ` Borislav Petkov
2018-09-21 9:15 [v7,2/7] edac: synps: Add platform specific structures for ddrc controller Borislav Petkov
2018-09-21 9:15 ` [PATCH v7 2/7] " Borislav Petkov
2018-09-21 9:15 ` Borislav Petkov
2018-09-21 9:07 [v7,2/7] " Borislav Petkov
2018-09-21 9:07 ` [PATCH v7 2/7] " Borislav Petkov
2018-09-21 9:07 ` Borislav Petkov
2018-09-19 13:33 [v7,2/7] " Manish Narani
2018-09-19 13:33 ` [PATCH v7 2/7] " Manish Narani
2018-09-19 13:33 ` Manish Narani
2018-09-19 11:15 [v7,2/7] " Borislav Petkov
2018-09-19 11:15 ` [PATCH v7 2/7] " Borislav Petkov
2018-09-19 11:15 ` Borislav Petkov
2018-09-19 5:14 [v7,2/7] " Manish Narani
2018-09-19 5:14 ` [PATCH v7 2/7] " Manish Narani
2018-09-19 5:14 ` Manish Narani
2018-09-19 5:08 [v7,1/7] edac: synopsys: Fix code comments and naming convention Manish Narani
2018-09-19 5:08 ` [PATCH v7 1/7] " Manish Narani
2018-09-19 5:08 ` Manish Narani
2018-09-18 7:55 [v7,2/7] edac: synps: Add platform specific structures for ddrc controller Borislav Petkov
2018-09-18 7:55 ` [PATCH v7 2/7] " Borislav Petkov
2018-09-18 7:55 ` Borislav Petkov
2018-09-18 7:55 ` Borislav Petkov
2018-09-18 7:53 [v7,1/7] edac: synopsys: Fix code comments and naming convention Borislav Petkov
2018-09-18 7:53 ` [PATCH v7 1/7] " Borislav Petkov
2018-09-18 7:53 ` Borislav Petkov
2018-09-17 14:25 [v7,7/7] edac: synopsys: Add Error Injection support for ZynqMP DDRC Manish Narani
2018-09-17 14:25 ` [PATCH v7 7/7] " Manish Narani
2018-09-17 14:25 ` Manish Narani
2018-09-17 14:25 ` Manish Narani
2018-09-17 14:25 [v7,6/7] arm64: zynqmp: Add DDRC node Manish Narani
2018-09-17 14:25 ` [PATCH v7 6/7] " Manish Narani
2018-09-17 14:25 ` Manish Narani
2018-09-17 14:25 ` Manish Narani
2018-09-17 14:25 [v7,5/7] edac: synopsys: Add EDAC ECC support for ZynqMP DDRC Manish Narani
2018-09-17 14:25 ` [PATCH v7 5/7] " Manish Narani
2018-09-17 14:25 ` Manish Narani
2018-09-17 14:25 ` Manish Narani
2018-09-17 14:25 [v7,4/7] edac: synopsys: Add macro defines " Manish Narani
2018-09-17 14:25 ` [PATCH v7 4/7] " Manish Narani
2018-09-17 14:25 ` Manish Narani
2018-09-17 14:25 ` Manish Narani
2018-09-17 14:25 [v7,3/7] dt: bindings: Document ZynqMP DDRC in Synopsys documentation Manish Narani
2018-09-17 14:25 ` [PATCH v7 3/7] " Manish Narani
2018-09-17 14:25 ` Manish Narani
2018-09-17 14:25 ` Manish Narani
2018-09-17 14:25 [v7,2/7] edac: synps: Add platform specific structures for ddrc controller Manish Narani
2018-09-17 14:25 ` [PATCH v7 2/7] " Manish Narani
2018-09-17 14:25 ` Manish Narani
2018-09-17 14:25 ` Manish Narani
2018-09-17 14:24 [v7,1/7] edac: synopsys: Fix code comments and naming convention Manish Narani
2018-09-17 14:24 ` [PATCH v7 1/7] " Manish Narani
2018-09-17 14:24 ` Manish Narani
2018-09-17 14:24 ` Manish Narani
2018-09-17 14:24 [PATCH v7 0/7] EDAC: Enhancements to Synopsys EDAC driver Manish Narani
2018-09-17 14:24 ` Manish Narani
2018-09-17 14:24 ` Manish Narani
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