From: Rob Herring <robh@kernel.org>
To: Xiaowei Bao <xiaowei.bao@nxp.com>
Cc: bhelgaas@google.com, mark.rutland@arm.com, shawnguo@kernel.org,
leoyang.li@nxp.com, kishon@ti.com, lorenzo.pieralisi@arm.com,
arnd@arndb.de, gregkh@linuxfoundation.org, minghuan.Lian@nxp.com,
mingkai.hu@nxp.com, roy.zang@nxp.com,
kstewart@linuxfoundation.org, cyrille.pitchen@free-electrons.com,
pombredanne@nexb.com, shawn.lin@rock-chips.com,
niklas.cassel@axis.com, linux-pci@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH 3/6] PCI: layerscape: Add the EP mode support
Date: Thu, 25 Oct 2018 16:52:46 -0500 [thread overview]
Message-ID: <20181025215246.GA14861@bogus> (raw)
In-Reply-To: <20181025110901.5680-3-xiaowei.bao@nxp.com>
On Thu, Oct 25, 2018 at 07:08:58PM +0800, Xiaowei Bao wrote:
> Add the EP mode support.
>
> Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
> ---
> .../devicetree/bindings/pci/layerscape-pci.txt | 3 +++
> 1 files changed, 3 insertions(+), 0 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
> index 66df1e8..d3d7be1 100644
> --- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt
> +++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
> @@ -13,12 +13,15 @@ information.
>
> Required properties:
> - compatible: should contain the platform identifier such as:
> + RC mode:
> "fsl,ls1021a-pcie", "snps,dw-pcie"
> "fsl,ls2080a-pcie", "fsl,ls2085a-pcie", "snps,dw-pcie"
> "fsl,ls2088a-pcie"
> "fsl,ls1088a-pcie"
> "fsl,ls1046a-pcie"
> "fsl,ls1012a-pcie"
> + EP mode:
> + "fsl,ls-pcie-ep"
You need SoC specific compatibles for the same reasons as the RC.
Rob
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Xiaowei Bao <xiaowei.bao@nxp.com>
Cc: mark.rutland@arm.com, roy.zang@nxp.com,
lorenzo.pieralisi@arm.com, arnd@arndb.de,
devicetree@vger.kernel.org, gregkh@linuxfoundation.org,
kstewart@linuxfoundation.org, niklas.cassel@axis.com,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
kishon@ti.com, minghuan.Lian@nxp.com,
cyrille.pitchen@free-electrons.com,
linux-arm-kernel@lists.infradead.org, pombredanne@nexb.com,
bhelgaas@google.com, leoyang.li@nxp.com, shawnguo@kernel.org,
shawn.lin@rock-chips.com, mingkai.hu@nxp.com,
linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH 3/6] PCI: layerscape: Add the EP mode support
Date: Thu, 25 Oct 2018 16:52:46 -0500 [thread overview]
Message-ID: <20181025215246.GA14861@bogus> (raw)
In-Reply-To: <20181025110901.5680-3-xiaowei.bao@nxp.com>
On Thu, Oct 25, 2018 at 07:08:58PM +0800, Xiaowei Bao wrote:
> Add the EP mode support.
>
> Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
> ---
> .../devicetree/bindings/pci/layerscape-pci.txt | 3 +++
> 1 files changed, 3 insertions(+), 0 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
> index 66df1e8..d3d7be1 100644
> --- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt
> +++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
> @@ -13,12 +13,15 @@ information.
>
> Required properties:
> - compatible: should contain the platform identifier such as:
> + RC mode:
> "fsl,ls1021a-pcie", "snps,dw-pcie"
> "fsl,ls2080a-pcie", "fsl,ls2085a-pcie", "snps,dw-pcie"
> "fsl,ls2088a-pcie"
> "fsl,ls1088a-pcie"
> "fsl,ls1046a-pcie"
> "fsl,ls1012a-pcie"
> + EP mode:
> + "fsl,ls-pcie-ep"
You need SoC specific compatibles for the same reasons as the RC.
Rob
WARNING: multiple messages have this Message-ID (diff)
From: robh@kernel.org (Rob Herring)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 3/6] PCI: layerscape: Add the EP mode support
Date: Thu, 25 Oct 2018 16:52:46 -0500 [thread overview]
Message-ID: <20181025215246.GA14861@bogus> (raw)
In-Reply-To: <20181025110901.5680-3-xiaowei.bao@nxp.com>
On Thu, Oct 25, 2018 at 07:08:58PM +0800, Xiaowei Bao wrote:
> Add the EP mode support.
>
> Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
> ---
> .../devicetree/bindings/pci/layerscape-pci.txt | 3 +++
> 1 files changed, 3 insertions(+), 0 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
> index 66df1e8..d3d7be1 100644
> --- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt
> +++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
> @@ -13,12 +13,15 @@ information.
>
> Required properties:
> - compatible: should contain the platform identifier such as:
> + RC mode:
> "fsl,ls1021a-pcie", "snps,dw-pcie"
> "fsl,ls2080a-pcie", "fsl,ls2085a-pcie", "snps,dw-pcie"
> "fsl,ls2088a-pcie"
> "fsl,ls1088a-pcie"
> "fsl,ls1046a-pcie"
> "fsl,ls1012a-pcie"
> + EP mode:
> + "fsl,ls-pcie-ep"
You need SoC specific compatibles for the same reasons as the RC.
Rob
next prev parent reply other threads:[~2018-10-25 21:52 UTC|newest]
Thread overview: 73+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-25 11:08 [PATCH 1/6] arm64: dts: Add the status property disable PCIe Xiaowei Bao
2018-10-25 11:08 ` Xiaowei Bao
2018-10-25 11:08 ` [PATCH 2/6] ARM: dts: ls1021a: " Xiaowei Bao
2018-10-25 11:08 ` Xiaowei Bao
2018-10-25 11:08 ` [PATCH 3/6] PCI: layerscape: Add the EP mode support Xiaowei Bao
2018-10-25 11:08 ` Xiaowei Bao
2018-10-25 21:52 ` Rob Herring [this message]
2018-10-25 21:52 ` Rob Herring
2018-10-25 21:52 ` Rob Herring
2018-10-26 3:45 ` Xiaowei Bao
2018-10-26 3:45 ` Xiaowei Bao
2018-10-26 3:45 ` Xiaowei Bao
2018-10-26 3:45 ` Xiaowei Bao
2018-10-26 7:01 ` Arnd Bergmann
2018-10-26 7:01 ` Arnd Bergmann
2018-10-26 7:01 ` Arnd Bergmann
2018-10-26 7:01 ` Arnd Bergmann
2018-10-26 7:42 ` Xiaowei Bao
2018-10-26 7:42 ` Xiaowei Bao
2018-10-26 7:42 ` Xiaowei Bao
2018-10-26 7:42 ` Xiaowei Bao
2018-10-26 20:28 ` Li Yang
2018-10-26 20:28 ` Li Yang
2018-10-26 20:28 ` Li Yang
2018-10-26 20:28 ` Li Yang
2018-10-29 2:35 ` Xiaowei Bao
2018-10-29 2:35 ` Xiaowei Bao
2018-10-29 2:35 ` Xiaowei Bao
2018-10-29 2:35 ` Xiaowei Bao
2018-10-25 11:08 ` [PATCH 4/6] arm64: dts: Add the PCIE EP node in dts Xiaowei Bao
2018-10-25 11:08 ` Xiaowei Bao
2018-10-25 11:09 ` [PATCH 5/6] pci: layerscape: Add the EP mode support Xiaowei Bao
2018-10-25 11:09 ` Xiaowei Bao
2018-10-26 5:29 ` Kishon Vijay Abraham I
2018-10-26 5:29 ` Kishon Vijay Abraham I
2018-10-26 5:29 ` Kishon Vijay Abraham I
2018-10-26 9:18 ` Xiaowei Bao
2018-10-26 9:18 ` Xiaowei Bao
2018-10-26 9:18 ` Xiaowei Bao
2018-10-26 9:18 ` Xiaowei Bao
2018-10-31 2:33 ` Xiaowei Bao
2018-10-31 2:33 ` Xiaowei Bao
2018-10-31 4:15 ` Kishon Vijay Abraham I
2018-10-31 4:15 ` Kishon Vijay Abraham I
2018-10-31 4:15 ` Kishon Vijay Abraham I
2018-10-31 10:38 ` Xiaowei Bao
2018-10-31 10:38 ` Xiaowei Bao
2018-10-31 10:38 ` Xiaowei Bao
2018-10-31 10:38 ` Xiaowei Bao
2018-11-05 8:57 ` Kishon Vijay Abraham I
2018-11-05 8:57 ` Kishon Vijay Abraham I
2018-11-05 8:57 ` Kishon Vijay Abraham I
2018-11-05 9:15 ` Xiaowei Bao
2018-11-05 9:15 ` Xiaowei Bao
2018-11-06 6:06 ` Kishon Vijay Abraham I
2018-11-06 6:06 ` Kishon Vijay Abraham I
2018-11-06 6:06 ` Kishon Vijay Abraham I
2018-11-06 6:48 ` Xiaowei Bao
2018-11-06 6:48 ` Xiaowei Bao
2018-11-06 6:48 ` Xiaowei Bao
2018-11-09 2:50 ` Xiaowei Bao
2018-11-09 2:50 ` Xiaowei Bao
2018-11-09 2:50 ` Xiaowei Bao
2018-11-05 9:15 ` Xiaowei Bao
2018-11-05 9:15 ` Xiaowei Bao
2018-11-05 9:15 ` Xiaowei Bao
2018-10-31 10:38 ` Xiaowei Bao
2018-10-31 2:33 ` Xiaowei Bao
2018-10-31 2:33 ` Xiaowei Bao
2018-10-31 2:33 ` Xiaowei Bao
2018-10-26 9:18 ` Xiaowei Bao
2018-10-25 11:09 ` [PATCH 6/6] misc: pci_endpoint_test: Add the layerscape EP device support Xiaowei Bao
2018-10-25 11:09 ` Xiaowei Bao
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