From: Aaron Lindsay <aaron@os.amperecomputing.com>
To: "qemu-arm@nongnu.org" <qemu-arm@nongnu.org>,
Peter Maydell <peter.maydell@linaro.org>,
Alistair Francis <alistair.francis@xilinx.com>,
Wei Huang <wei@redhat.com>,
Peter Crosthwaite <crosthwaite.peter@gmail.com>,
Richard Henderson <richard.henderson@linaro.org>
Cc: Aaron Lindsay <aaron@os.amperecomputing.com>,
Michael Spradling <mspradli@codeaurora.org>,
"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
Digant Desai <digantd@codeaurora.org>
Subject: [Qemu-arm] [PATCH v7 00/12] More fully implement ARM PMUv3
Date: Mon, 5 Nov 2018 18:51:25 +0000 [thread overview]
Message-ID: <20181105185046.2802-1-aaron@os.amperecomputing.com> (raw)
The ARM PMU implementation currently contains a basic cycle counter, but
it is often useful to gather counts of other events, filter them based
on execution mode, and/or be notified on counter overflow. These patches
flesh out the implementations of various PMU registers including
PM[X]EVCNTR and PM[X]EVTYPER, add a struct definition to represent
arbitrary counter types, implement mode filtering, send interrupts on
counter overflow, and add instruction, cycle, and software increment
events.
Since v6 [1] I have made the following changes:
* Use cpu_get_host_ticks() for the cycle counter value for user mode
* Re-staged "PMU: Set PMCR.N to 4" so that the value of the pmcrn local
variable matches the architectural value of PMCR.N
* Re-ordered "Reorganize PMCCNTR accesses" to come first to eliminate
the churn of *_op_start/finish function names and definitions
* Use extract64 and ARRAY_SIZE macros where applicable
* Add a return value to the post_save migration function
[1] - https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg02036.html
Aaron Lindsay (12):
migration: Add post_save function to VMStateDescription
target/arm: Reorganize PMCCNTR accesses
target/arm: Swap PMU values before/after migrations
target/arm: Filter cycle counter based on PMCCFILTR_EL0
target/arm: Allow AArch32 access for PMCCFILTR
target/arm: Implement PMOVSSET
target/arm: Add array for supported PMU events, generate PMCEID[01]
target/arm: Finish implementation of PM[X]EVCNTR and PM[X]EVTYPER
target/arm: PMU: Add instruction and cycle events
target/arm: PMU: Set PMCR.N to 4
target/arm: Implement PMSWINC
target/arm: Send interrupts on PMU counter overflow
docs/devel/migration.rst | 9 +-
include/migration/vmstate.h | 1 +
migration/vmstate.c | 13 +-
target/arm/cpu.c | 28 +-
target/arm/cpu.h | 68 +++-
target/arm/cpu64.c | 4 -
target/arm/helper.c | 774 ++++++++++++++++++++++++++++++++----
target/arm/machine.c | 20 +
8 files changed, 816 insertions(+), 101 deletions(-)
--
2.19.1
WARNING: multiple messages have this Message-ID (diff)
From: Aaron Lindsay <aaron@os.amperecomputing.com>
To: "qemu-arm@nongnu.org" <qemu-arm@nongnu.org>,
Peter Maydell <peter.maydell@linaro.org>,
Alistair Francis <alistair.francis@xilinx.com>,
Wei Huang <wei@redhat.com>,
Peter Crosthwaite <crosthwaite.peter@gmail.com>,
Richard Henderson <richard.henderson@linaro.org>
Cc: "qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
Michael Spradling <mspradli@codeaurora.org>,
Digant Desai <digantd@codeaurora.org>,
Aaron Lindsay <aaron@os.amperecomputing.com>
Subject: [Qemu-devel] [PATCH v7 00/12] More fully implement ARM PMUv3
Date: Mon, 5 Nov 2018 18:51:25 +0000 [thread overview]
Message-ID: <20181105185046.2802-1-aaron@os.amperecomputing.com> (raw)
The ARM PMU implementation currently contains a basic cycle counter, but
it is often useful to gather counts of other events, filter them based
on execution mode, and/or be notified on counter overflow. These patches
flesh out the implementations of various PMU registers including
PM[X]EVCNTR and PM[X]EVTYPER, add a struct definition to represent
arbitrary counter types, implement mode filtering, send interrupts on
counter overflow, and add instruction, cycle, and software increment
events.
Since v6 [1] I have made the following changes:
* Use cpu_get_host_ticks() for the cycle counter value for user mode
* Re-staged "PMU: Set PMCR.N to 4" so that the value of the pmcrn local
variable matches the architectural value of PMCR.N
* Re-ordered "Reorganize PMCCNTR accesses" to come first to eliminate
the churn of *_op_start/finish function names and definitions
* Use extract64 and ARRAY_SIZE macros where applicable
* Add a return value to the post_save migration function
[1] - https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg02036.html
Aaron Lindsay (12):
migration: Add post_save function to VMStateDescription
target/arm: Reorganize PMCCNTR accesses
target/arm: Swap PMU values before/after migrations
target/arm: Filter cycle counter based on PMCCFILTR_EL0
target/arm: Allow AArch32 access for PMCCFILTR
target/arm: Implement PMOVSSET
target/arm: Add array for supported PMU events, generate PMCEID[01]
target/arm: Finish implementation of PM[X]EVCNTR and PM[X]EVTYPER
target/arm: PMU: Add instruction and cycle events
target/arm: PMU: Set PMCR.N to 4
target/arm: Implement PMSWINC
target/arm: Send interrupts on PMU counter overflow
docs/devel/migration.rst | 9 +-
include/migration/vmstate.h | 1 +
migration/vmstate.c | 13 +-
target/arm/cpu.c | 28 +-
target/arm/cpu.h | 68 +++-
target/arm/cpu64.c | 4 -
target/arm/helper.c | 774 ++++++++++++++++++++++++++++++++----
target/arm/machine.c | 20 +
8 files changed, 816 insertions(+), 101 deletions(-)
--
2.19.1
next reply other threads:[~2018-11-05 18:51 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-05 18:51 Aaron Lindsay [this message]
2018-11-05 18:51 ` [Qemu-devel] [PATCH v7 00/12] More fully implement ARM PMUv3 Aaron Lindsay
2018-11-05 18:51 ` [Qemu-arm] [PATCH v7 01/12] migration: Add post_save function to VMStateDescription Aaron Lindsay
2018-11-05 18:51 ` [Qemu-devel] " Aaron Lindsay
2018-11-16 14:42 ` [Qemu-arm] " Peter Maydell
2018-11-16 14:42 ` [Qemu-devel] " Peter Maydell
2018-11-16 16:34 ` [Qemu-arm] " Dr. David Alan Gilbert
2018-11-16 16:34 ` [Qemu-devel] " Dr. David Alan Gilbert
2018-11-05 18:51 ` [Qemu-arm] [PATCH v7 02/12] target/arm: Reorganize PMCCNTR accesses Aaron Lindsay
2018-11-05 18:51 ` [Qemu-devel] " Aaron Lindsay
2018-11-16 14:50 ` [Qemu-arm] " Peter Maydell
2018-11-16 14:50 ` [Qemu-devel] " Peter Maydell
2018-11-16 15:41 ` [Qemu-arm] " Aaron Lindsay
2018-11-16 15:41 ` [Qemu-devel] " Aaron Lindsay
2018-11-05 18:51 ` [Qemu-arm] [PATCH v7 03/12] target/arm: Swap PMU values before/after migrations Aaron Lindsay
2018-11-05 18:51 ` [Qemu-devel] " Aaron Lindsay
2018-11-16 14:53 ` [Qemu-arm] " Peter Maydell
2018-11-16 14:53 ` [Qemu-devel] " Peter Maydell
2018-11-16 16:09 ` [Qemu-arm] " Aaron Lindsay
2018-11-16 16:09 ` [Qemu-devel] " Aaron Lindsay
2018-11-16 16:44 ` [Qemu-arm] " Peter Maydell
2018-11-16 16:44 ` [Qemu-devel] " Peter Maydell
2018-11-16 21:06 ` [Qemu-arm] " Aaron Lindsay
2018-11-16 21:06 ` [Qemu-devel] " Aaron Lindsay
2018-11-05 18:51 ` [Qemu-devel] [PATCH v7 04/12] target/arm: Filter cycle counter based on PMCCFILTR_EL0 Aaron Lindsay
2018-11-05 18:51 ` Aaron Lindsay
2018-11-05 18:51 ` [Qemu-arm] [PATCH v7 05/12] target/arm: Allow AArch32 access for PMCCFILTR Aaron Lindsay
2018-11-05 18:51 ` [Qemu-devel] " Aaron Lindsay
2018-11-05 18:51 ` [Qemu-arm] [PATCH v7 06/12] target/arm: Implement PMOVSSET Aaron Lindsay
2018-11-05 18:51 ` [Qemu-devel] " Aaron Lindsay
2018-11-05 18:51 ` [Qemu-arm] [PATCH v7 07/12] target/arm: Add array for supported PMU events, generate PMCEID[01] Aaron Lindsay
2018-11-05 18:51 ` [Qemu-devel] " Aaron Lindsay
2018-11-16 15:06 ` [Qemu-arm] " Peter Maydell
2018-11-16 15:06 ` [Qemu-devel] " Peter Maydell
2018-11-16 20:09 ` [Qemu-arm] " Aaron Lindsay
2018-11-16 20:09 ` [Qemu-devel] " Aaron Lindsay
2018-11-05 18:51 ` [Qemu-arm] [PATCH v7 08/12] target/arm: Finish implementation of PM[X]EVCNTR and PM[X]EVTYPER Aaron Lindsay
2018-11-05 18:51 ` [Qemu-devel] " Aaron Lindsay
2018-11-05 18:52 ` [Qemu-arm] [PATCH v7 09/12] target/arm: PMU: Add instruction and cycle events Aaron Lindsay
2018-11-05 18:52 ` [Qemu-devel] " Aaron Lindsay
2018-11-05 18:52 ` [Qemu-arm] [PATCH v7 10/12] target/arm: PMU: Set PMCR.N to 4 Aaron Lindsay
2018-11-05 18:52 ` [Qemu-devel] " Aaron Lindsay
2018-11-16 14:59 ` [Qemu-arm] " Peter Maydell
2018-11-16 14:59 ` [Qemu-devel] " Peter Maydell
2018-11-05 18:52 ` [Qemu-arm] [PATCH v7 11/12] target/arm: Implement PMSWINC Aaron Lindsay
2018-11-05 18:52 ` [Qemu-devel] " Aaron Lindsay
2018-11-05 18:52 ` [Qemu-arm] [PATCH v7 12/12] target/arm: Send interrupts on PMU counter overflow Aaron Lindsay
2018-11-05 18:52 ` [Qemu-devel] " Aaron Lindsay
2018-11-16 21:22 ` Aaron Lindsay
2018-11-16 21:22 ` Aaron Lindsay
2018-11-20 14:35 ` [Qemu-arm] " Peter Maydell
2018-11-20 14:35 ` [Qemu-devel] " Peter Maydell
2018-11-06 8:55 ` [Qemu-devel] [PATCH v7 00/12] More fully implement ARM PMUv3 no-reply
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