Re: [PATCH 2/2] drm/msm/dsi: Get PHY ref clock from the DT

From: Matthias Kaehlcke <mka-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
To: Sean Paul <sean-p7yTbzM4H96eqtR555YLDQ@public.gmane.org>
Cc: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Archit Taneja <architt-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
	Rajesh Yadav <ryadav-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
	David Airlie <airlied-cv59FeDIM0c@public.gmane.org>,
	linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Douglas Anderson
	<dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>,
	dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
	Stephen Boyd <swboyd-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>,
	Rob Clark <robdclark-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Sean Paul <seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>,
	freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH 2/2] drm/msm/dsi: Get PHY ref clock from the DT
Date: Wed, 14 Nov 2018 13:08:56 -0800	[thread overview]
Message-ID: <20181114210856.GK22824@google.com> (raw)
In-Reply-To: <20181105173304.GJ154160@art_vandelay>

On Mon, Nov 05, 2018 at 12:33:04PM -0500, Sean Paul wrote:
> On Fri, Nov 02, 2018 at 02:45:34PM -0700, Matthias Kaehlcke wrote:
> > Get the PHY ref clock from the device tree instead of hardcoding
> > its name and rate.
> > 
> > Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
> > ---
> >  drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c | 11 ++++++++++-
> >  1 file changed, 10 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c
> > index 4c03f0b7343ed..1016eb50df8f5 100644
> > --- a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c
> > +++ b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c
> > @@ -91,6 +91,8 @@ struct dsi_pll_10nm {
> >  	void __iomem *phy_cmn_mmio;
> >  	void __iomem *mmio;
> >  
> > +	struct clk *vco_ref_clk;
> > +
> >  	u64 vco_ref_clk_rate;
> >  	u64 vco_current_rate;
> >  
> > @@ -630,7 +632,8 @@ static int pll_10nm_register(struct dsi_pll_10nm *pll_10nm)
> >  	char clk_name[32], parent[32], vco_name[32];
> >  	char parent2[32], parent3[32], parent4[32];
> >  	struct clk_init_data vco_init = {
> > -		.parent_names = (const char *[]){ "xo" },
> > +		.parent_names = (const char *[]){
> > +			__clk_get_name(pll_10nm->vco_ref_clk) },
> >  		.num_parents = 1,
> 
> You should check the return of __clk_get_name() since you're setting num_parents
> to 1.

Is that actually needed? __clk_get_name() only returns NULL if the
passed clock is NULL, and this can't happen here since _init() fails
if the clock can't be obtained, or am I missing something here?

> Also, you should revert the patch that hardcodes 19.2MHz as part of this
> set.

Ooops, this somehow got dropped when moving the patch from my working
tree to the repo I use for upstreaming.

> >  		.name = vco_name,
> >  		.flags = CLK_IGNORE_UNUSED,
> > @@ -786,6 +789,12 @@ struct msm_dsi_pll *msm_dsi_pll_10nm_init(struct platform_device *pdev, int id)
> >  	pll_10nm->id = id;
> >  	pll_10nm_list[id] = pll_10nm;
> >  
> > +	pll_10nm->vco_ref_clk = devm_clk_get(&pdev->dev, "ref");
> > +	if (IS_ERR(pll_10nm->vco_ref_clk)) {
> > +		dev_err(&pdev->dev, "couldn't get 'ref' clock\n");
> 
> Please print the error message

Ok, except for -EPROBE_DEFER as per Stephen's comment.

> > +		return (void *)pll_10nm->vco_ref_clk;
> 
> Use ERR_CAST here

Will do

Cheers

Matthias
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