* [PATCH 1/3] drm/i915: Add HAS_DISPLAY() and use it
@ 2018-11-20 22:32 José Roberto de Souza
2018-11-20 22:32 ` [PATCH 2/3] drm/i915: Do not touch PCH handshake registers if PCH is not present José Roberto de Souza
` (6 more replies)
0 siblings, 7 replies; 9+ messages in thread
From: José Roberto de Souza @ 2018-11-20 22:32 UTC (permalink / raw)
To: intel-gfx; +Cc: Jani Nikula, Lucas De Marchi
Right now it is decided if GEN has display by checking the num_pipes,
so lets make it explicit and use a macro.
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 10 +++++-----
drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/intel_bios.c | 2 +-
drivers/gpu/drm/i915/intel_device_info.c | 4 ++--
drivers/gpu/drm/i915/intel_display.c | 4 ++--
drivers/gpu/drm/i915/intel_fbdev.c | 2 +-
drivers/gpu/drm/i915/intel_i2c.c | 2 +-
7 files changed, 14 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index b1d23c73c147..5e2d91f4dd2d 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -287,7 +287,7 @@ static void intel_detect_pch(struct drm_i915_private *dev_priv)
* Use PCH_NOP (PCH but no South Display) for PCH platforms without
* display.
*/
- if (pch && INTEL_INFO(dev_priv)->num_pipes == 0) {
+ if (pch && !HAS_DISPLAY(dev_priv)) {
DRM_DEBUG_KMS("Display disabled, reverting to NOP PCH\n");
dev_priv->pch_type = PCH_NOP;
dev_priv->pch_id = 0;
@@ -645,7 +645,7 @@ static int i915_load_modeset_init(struct drm_device *dev)
if (i915_inject_load_failure())
return -ENODEV;
- if (INTEL_INFO(dev_priv)->num_pipes) {
+ if (HAS_DISPLAY(dev_priv)) {
ret = drm_vblank_init(&dev_priv->drm,
INTEL_INFO(dev_priv)->num_pipes);
if (ret)
@@ -696,7 +696,7 @@ static int i915_load_modeset_init(struct drm_device *dev)
intel_overlay_setup(dev_priv);
- if (INTEL_INFO(dev_priv)->num_pipes == 0)
+ if (!HAS_DISPLAY(dev_priv))
return 0;
ret = intel_fbdev_init(dev);
@@ -1551,7 +1551,7 @@ static void i915_driver_register(struct drm_i915_private *dev_priv)
} else
DRM_ERROR("Failed to register driver for userspace access!\n");
- if (INTEL_INFO(dev_priv)->num_pipes) {
+ if (HAS_DISPLAY(dev_priv)) {
/* Must be done after probing outputs */
intel_opregion_register(dev_priv);
acpi_video_register();
@@ -1575,7 +1575,7 @@ static void i915_driver_register(struct drm_i915_private *dev_priv)
* We need to coordinate the hotplugs with the asynchronous fbdev
* configuration, for which we use the fbdev->async_cookie.
*/
- if (INTEL_INFO(dev_priv)->num_pipes)
+ if (HAS_DISPLAY(dev_priv))
drm_kms_helper_poll_init(dev);
intel_power_domains_enable(dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 21e4405e2168..3cdbb3d074db 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2568,6 +2568,8 @@ intel_info(const struct drm_i915_private *dev_priv)
#define GT_FREQUENCY_MULTIPLIER 50
#define GEN9_FREQ_SCALER 3
+#define HAS_DISPLAY(dev_priv) (INTEL_INFO(dev_priv)->num_pipes > 0)
+
#include "i915_trace.h"
static inline bool intel_vtd_active(void)
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index 0694aa8bb9bc..6d3e0260d49c 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -1752,7 +1752,7 @@ void intel_bios_init(struct drm_i915_private *dev_priv)
const struct bdb_header *bdb;
u8 __iomem *bios = NULL;
- if (INTEL_INFO(dev_priv)->num_pipes == 0) {
+ if (!HAS_DISPLAY(dev_priv)) {
DRM_DEBUG_KMS("Skipping VBT init due to disabled display.\n");
return;
}
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index ceecb5bd5226..677002a9e893 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -782,7 +782,7 @@ void intel_device_info_runtime_init(struct intel_device_info *info)
if (i915_modparams.disable_display) {
DRM_INFO("Display disabled (module parameter)\n");
info->num_pipes = 0;
- } else if (info->num_pipes > 0 &&
+ } else if (HAS_DISPLAY(dev_priv) &&
(IS_GEN7(dev_priv) || IS_GEN8(dev_priv)) &&
HAS_PCH_SPLIT(dev_priv)) {
u32 fuse_strap = I915_READ(FUSE_STRAP);
@@ -807,7 +807,7 @@ void intel_device_info_runtime_init(struct intel_device_info *info)
DRM_INFO("PipeC fused off\n");
info->num_pipes -= 1;
}
- } else if (info->num_pipes > 0 && IS_GEN9(dev_priv)) {
+ } else if (HAS_DISPLAY(dev_priv) && IS_GEN9(dev_priv)) {
u32 dfsm = I915_READ(SKL_DFSM);
u8 disabled_mask = 0;
bool invalid;
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 132e978227fb..d48f62ec0d7d 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -14155,7 +14155,7 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv)
intel_pps_init(dev_priv);
- if (INTEL_INFO(dev_priv)->num_pipes == 0)
+ if (!HAS_DISPLAY(dev_priv))
return;
/*
@@ -16027,7 +16027,7 @@ intel_display_capture_error_state(struct drm_i915_private *dev_priv)
};
int i;
- if (INTEL_INFO(dev_priv)->num_pipes == 0)
+ if (!HAS_DISPLAY(dev_priv))
return NULL;
error = kzalloc(sizeof(*error), GFP_ATOMIC);
diff --git a/drivers/gpu/drm/i915/intel_fbdev.c b/drivers/gpu/drm/i915/intel_fbdev.c
index 2480c7d6edee..fb5bb5b32a60 100644
--- a/drivers/gpu/drm/i915/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/intel_fbdev.c
@@ -672,7 +672,7 @@ int intel_fbdev_init(struct drm_device *dev)
struct intel_fbdev *ifbdev;
int ret;
- if (WARN_ON(INTEL_INFO(dev_priv)->num_pipes == 0))
+ if (WARN_ON(!HAS_DISPLAY(dev_priv)))
return -ENODEV;
ifbdev = kzalloc(sizeof(struct intel_fbdev), GFP_KERNEL);
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index 33d87ab93fdd..802d0394ccc4 100644
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -817,7 +817,7 @@ int intel_setup_gmbus(struct drm_i915_private *dev_priv)
unsigned int pin;
int ret;
- if (INTEL_INFO(dev_priv)->num_pipes == 0)
+ if (!HAS_DISPLAY(dev_priv))
return 0;
if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
--
2.19.1
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^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 2/3] drm/i915: Do not touch PCH handshake registers if PCH is not present 2018-11-20 22:32 [PATCH 1/3] drm/i915: Add HAS_DISPLAY() and use it José Roberto de Souza @ 2018-11-20 22:32 ` José Roberto de Souza 2018-11-21 11:18 ` Ville Syrjälä 2018-11-20 22:32 ` [PATCH 3/3] drm/i915: Move display device info capabilities to its own struct José Roberto de Souza ` (5 subsequent siblings) 6 siblings, 1 reply; 9+ messages in thread From: José Roberto de Souza @ 2018-11-20 22:32 UTC (permalink / raw) To: intel-gfx; +Cc: Lucas De Marchi If no PCH was detected in intel_detect_pch() don't touch the handshake registers. Cc: Lucas De Marchi <lucas.demarchi@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> --- drivers/gpu/drm/i915/intel_runtime_pm.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index 1c2de9b69a19..f33f335d6106 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -3325,6 +3325,9 @@ static void intel_pch_reset_handshake(struct drm_i915_private *dev_priv, i915_reg_t reg; u32 reset_bits, val; + if (!HAS_PCH_SPLIT(dev_priv)) + return; + if (IS_IVYBRIDGE(dev_priv)) { reg = GEN7_MSG_CTL; reset_bits = WAIT_FOR_PCH_FLR_ACK | WAIT_FOR_PCH_RESET_ACK; -- 2.19.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 2/3] drm/i915: Do not touch PCH handshake registers if PCH is not present 2018-11-20 22:32 ` [PATCH 2/3] drm/i915: Do not touch PCH handshake registers if PCH is not present José Roberto de Souza @ 2018-11-21 11:18 ` Ville Syrjälä 0 siblings, 0 replies; 9+ messages in thread From: Ville Syrjälä @ 2018-11-21 11:18 UTC (permalink / raw) To: José Roberto de Souza; +Cc: intel-gfx, Lucas De Marchi On Tue, Nov 20, 2018 at 02:32:41PM -0800, José Roberto de Souza wrote: > If no PCH was detected in intel_detect_pch() don't touch the > handshake registers. We are explicitly told to frob this on BXT/GLK. So this doesn't make sense. What is this supposed to fix? > > Cc: Lucas De Marchi <lucas.demarchi@intel.com> > Cc: Jani Nikula <jani.nikula@linux.intel.com> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com> > --- > drivers/gpu/drm/i915/intel_runtime_pm.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c > index 1c2de9b69a19..f33f335d6106 100644 > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > @@ -3325,6 +3325,9 @@ static void intel_pch_reset_handshake(struct drm_i915_private *dev_priv, > i915_reg_t reg; > u32 reset_bits, val; > > + if (!HAS_PCH_SPLIT(dev_priv)) > + return; > + > if (IS_IVYBRIDGE(dev_priv)) { > reg = GEN7_MSG_CTL; > reset_bits = WAIT_FOR_PCH_FLR_ACK | WAIT_FOR_PCH_RESET_ACK; > -- > 2.19.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 3/3] drm/i915: Move display device info capabilities to its own struct 2018-11-20 22:32 [PATCH 1/3] drm/i915: Add HAS_DISPLAY() and use it José Roberto de Souza 2018-11-20 22:32 ` [PATCH 2/3] drm/i915: Do not touch PCH handshake registers if PCH is not present José Roberto de Souza @ 2018-11-20 22:32 ` José Roberto de Souza 2018-11-20 23:03 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915: Add HAS_DISPLAY() and use it Patchwork ` (4 subsequent siblings) 6 siblings, 0 replies; 9+ messages in thread From: José Roberto de Souza @ 2018-11-20 22:32 UTC (permalink / raw) To: intel-gfx; +Cc: Lucas De Marchi This helps separate what capabilities are display capabilities. Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Suggested-by: Jani Nikula <jani.nikula@linux.intel.com> Suggested-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 22 ++--- drivers/gpu/drm/i915/i915_pci.c | 117 +++++++++++++---------- drivers/gpu/drm/i915/intel_device_info.c | 4 + drivers/gpu/drm/i915/intel_device_info.h | 31 +++--- drivers/gpu/drm/i915/intel_display.c | 4 +- drivers/gpu/drm/i915/intel_fbc.c | 2 +- 6 files changed, 102 insertions(+), 78 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 3cdbb3d074db..834ea2cc6662 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2448,9 +2448,9 @@ intel_info(const struct drm_i915_private *dev_priv) ((sizes) & ~(dev_priv)->info.page_sizes) == 0; \ }) -#define HAS_OVERLAY(dev_priv) ((dev_priv)->info.has_overlay) +#define HAS_OVERLAY(dev_priv) ((dev_priv)->info.display.has_overlay) #define OVERLAY_NEEDS_PHYSICAL(dev_priv) \ - ((dev_priv)->info.overlay_needs_physical) + ((dev_priv)->info.display.overlay_needs_physical) /* Early gen2 have a totally busted CS tlb and require pinned batches. */ #define HAS_BROKEN_CS_TLB(dev_priv) (IS_I830(dev_priv) || IS_I845G(dev_priv)) @@ -2471,31 +2471,31 @@ intel_info(const struct drm_i915_private *dev_priv) #define HAS_128_BYTE_Y_TILING(dev_priv) (!IS_GEN2(dev_priv) && \ !(IS_I915G(dev_priv) || \ IS_I915GM(dev_priv))) -#define SUPPORTS_TV(dev_priv) ((dev_priv)->info.supports_tv) -#define I915_HAS_HOTPLUG(dev_priv) ((dev_priv)->info.has_hotplug) +#define SUPPORTS_TV(dev_priv) ((dev_priv)->info.display.supports_tv) +#define I915_HAS_HOTPLUG(dev_priv) ((dev_priv)->info.display.has_hotplug) #define HAS_FW_BLC(dev_priv) (INTEL_GEN(dev_priv) > 2) -#define HAS_FBC(dev_priv) ((dev_priv)->info.has_fbc) +#define HAS_FBC(dev_priv) ((dev_priv)->info.display.has_fbc) #define HAS_CUR_FBC(dev_priv) (!HAS_GMCH_DISPLAY(dev_priv) && INTEL_GEN(dev_priv) >= 7) #define HAS_IPS(dev_priv) (IS_HSW_ULT(dev_priv) || IS_BROADWELL(dev_priv)) -#define HAS_DP_MST(dev_priv) ((dev_priv)->info.has_dp_mst) +#define HAS_DP_MST(dev_priv) ((dev_priv)->info.display.has_dp_mst) -#define HAS_DDI(dev_priv) ((dev_priv)->info.has_ddi) +#define HAS_DDI(dev_priv) ((dev_priv)->info.display.has_ddi) #define HAS_FPGA_DBG_UNCLAIMED(dev_priv) ((dev_priv)->info.has_fpga_dbg) -#define HAS_PSR(dev_priv) ((dev_priv)->info.has_psr) +#define HAS_PSR(dev_priv) ((dev_priv)->info.display.has_psr) #define HAS_RC6(dev_priv) ((dev_priv)->info.has_rc6) #define HAS_RC6p(dev_priv) ((dev_priv)->info.has_rc6p) #define HAS_RC6pp(dev_priv) (false) /* HW was never validated */ -#define HAS_CSR(dev_priv) ((dev_priv)->info.has_csr) +#define HAS_CSR(dev_priv) ((dev_priv)->info.display.has_csr) #define HAS_RUNTIME_PM(dev_priv) ((dev_priv)->info.has_runtime_pm) #define HAS_64BIT_RELOC(dev_priv) ((dev_priv)->info.has_64bit_reloc) -#define HAS_IPC(dev_priv) ((dev_priv)->info.has_ipc) +#define HAS_IPC(dev_priv) ((dev_priv)->info.display.has_ipc) /* * For now, anything with a GuC requires uCode loading, and then supports @@ -2556,7 +2556,7 @@ intel_info(const struct drm_i915_private *dev_priv) #define HAS_PCH_NOP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_NOP) #define HAS_PCH_SPLIT(dev_priv) (INTEL_PCH_TYPE(dev_priv) != PCH_NONE) -#define HAS_GMCH_DISPLAY(dev_priv) ((dev_priv)->info.has_gmch_display) +#define HAS_GMCH_DISPLAY(dev_priv) ((dev_priv)->info.display.has_gmch_display) #define HAS_LSPCON(dev_priv) (INTEL_GEN(dev_priv) >= 9) diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 983ae7fd8217..8e37a835314f 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -65,8 +65,9 @@ #define GEN2_FEATURES \ GEN(2), \ .num_pipes = 1, \ - .has_overlay = 1, .overlay_needs_physical = 1, \ - .has_gmch_display = 1, \ + .display.has_overlay = 1, \ + .display.overlay_needs_physical = 1, \ + .display.has_gmch_display = 1, \ .hws_needs_physical = 1, \ .unfenced_needs_alignment = 1, \ .ring_mask = RENDER_RING, \ @@ -79,7 +80,8 @@ static const struct intel_device_info intel_i830_info = { GEN2_FEATURES, PLATFORM(INTEL_I830), - .is_mobile = 1, .cursor_needs_physical = 1, + .is_mobile = 1, + .display.cursor_needs_physical = 1, .num_pipes = 2, /* legal, last one wins */ }; @@ -93,8 +95,8 @@ static const struct intel_device_info intel_i85x_info = { PLATFORM(INTEL_I85X), .is_mobile = 1, .num_pipes = 2, /* legal, last one wins */ - .cursor_needs_physical = 1, - .has_fbc = 1, + .display.cursor_needs_physical = 1, + .display.has_fbc = 1, }; static const struct intel_device_info intel_i865g_info = { @@ -105,7 +107,7 @@ static const struct intel_device_info intel_i865g_info = { #define GEN3_FEATURES \ GEN(3), \ .num_pipes = 2, \ - .has_gmch_display = 1, \ + .display.has_gmch_display = 1, \ .ring_mask = RENDER_RING, \ .has_snoop = true, \ .has_coherent_ggtt = true, \ @@ -117,8 +119,9 @@ static const struct intel_device_info intel_i915g_info = { GEN3_FEATURES, PLATFORM(INTEL_I915G), .has_coherent_ggtt = false, - .cursor_needs_physical = 1, - .has_overlay = 1, .overlay_needs_physical = 1, + .display.cursor_needs_physical = 1, + .display.has_overlay = 1, + .display.overlay_needs_physical = 1, .hws_needs_physical = 1, .unfenced_needs_alignment = 1, }; @@ -127,10 +130,11 @@ static const struct intel_device_info intel_i915gm_info = { GEN3_FEATURES, PLATFORM(INTEL_I915GM), .is_mobile = 1, - .cursor_needs_physical = 1, - .has_overlay = 1, .overlay_needs_physical = 1, - .supports_tv = 1, - .has_fbc = 1, + .display.cursor_needs_physical = 1, + .display.has_overlay = 1, + .display.overlay_needs_physical = 1, + .display.supports_tv = 1, + .display.has_fbc = 1, .hws_needs_physical = 1, .unfenced_needs_alignment = 1, }; @@ -138,8 +142,10 @@ static const struct intel_device_info intel_i915gm_info = { static const struct intel_device_info intel_i945g_info = { GEN3_FEATURES, PLATFORM(INTEL_I945G), - .has_hotplug = 1, .cursor_needs_physical = 1, - .has_overlay = 1, .overlay_needs_physical = 1, + .display.has_hotplug = 1, + .display.cursor_needs_physical = 1, + .display.has_overlay = 1, + .display.overlay_needs_physical = 1, .hws_needs_physical = 1, .unfenced_needs_alignment = 1, }; @@ -148,10 +154,12 @@ static const struct intel_device_info intel_i945gm_info = { GEN3_FEATURES, PLATFORM(INTEL_I945GM), .is_mobile = 1, - .has_hotplug = 1, .cursor_needs_physical = 1, - .has_overlay = 1, .overlay_needs_physical = 1, - .supports_tv = 1, - .has_fbc = 1, + .display.has_hotplug = 1, + .display.cursor_needs_physical = 1, + .display.has_overlay = 1, + .display.overlay_needs_physical = 1, + .display.supports_tv = 1, + .display.has_fbc = 1, .hws_needs_physical = 1, .unfenced_needs_alignment = 1, }; @@ -159,23 +167,23 @@ static const struct intel_device_info intel_i945gm_info = { static const struct intel_device_info intel_g33_info = { GEN3_FEATURES, PLATFORM(INTEL_G33), - .has_hotplug = 1, - .has_overlay = 1, + .display.has_hotplug = 1, + .display.has_overlay = 1, }; static const struct intel_device_info intel_pineview_info = { GEN3_FEATURES, PLATFORM(INTEL_PINEVIEW), .is_mobile = 1, - .has_hotplug = 1, - .has_overlay = 1, + .display.has_hotplug = 1, + .display.has_overlay = 1, }; #define GEN4_FEATURES \ GEN(4), \ .num_pipes = 2, \ - .has_hotplug = 1, \ - .has_gmch_display = 1, \ + .display.has_hotplug = 1, \ + .display.has_gmch_display = 1, \ .ring_mask = RENDER_RING, \ .has_snoop = true, \ .has_coherent_ggtt = true, \ @@ -186,7 +194,7 @@ static const struct intel_device_info intel_pineview_info = { static const struct intel_device_info intel_i965g_info = { GEN4_FEATURES, PLATFORM(INTEL_I965G), - .has_overlay = 1, + .display.has_overlay = 1, .hws_needs_physical = 1, .has_snoop = false, }; @@ -194,9 +202,10 @@ static const struct intel_device_info intel_i965g_info = { static const struct intel_device_info intel_i965gm_info = { GEN4_FEATURES, PLATFORM(INTEL_I965GM), - .is_mobile = 1, .has_fbc = 1, - .has_overlay = 1, - .supports_tv = 1, + .is_mobile = 1, + .display.has_fbc = 1, + .display.has_overlay = 1, + .display.supports_tv = 1, .hws_needs_physical = 1, .has_snoop = false, }; @@ -210,15 +219,16 @@ static const struct intel_device_info intel_g45_info = { static const struct intel_device_info intel_gm45_info = { GEN4_FEATURES, PLATFORM(INTEL_GM45), - .is_mobile = 1, .has_fbc = 1, - .supports_tv = 1, + .is_mobile = 1, + .display.has_fbc = 1, + .display.supports_tv = 1, .ring_mask = RENDER_RING | BSD_RING, }; #define GEN5_FEATURES \ GEN(5), \ .num_pipes = 2, \ - .has_hotplug = 1, \ + .display.has_hotplug = 1, \ .ring_mask = RENDER_RING | BSD_RING, \ .has_snoop = true, \ .has_coherent_ggtt = true, \ @@ -236,14 +246,15 @@ static const struct intel_device_info intel_ironlake_d_info = { static const struct intel_device_info intel_ironlake_m_info = { GEN5_FEATURES, PLATFORM(INTEL_IRONLAKE), - .is_mobile = 1, .has_fbc = 1, + .is_mobile = 1, + .display.has_fbc = 1, }; #define GEN6_FEATURES \ GEN(6), \ .num_pipes = 2, \ - .has_hotplug = 1, \ - .has_fbc = 1, \ + .display.has_hotplug = 1, \ + .display.has_fbc = 1, \ .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \ .has_coherent_ggtt = true, \ .has_llc = 1, \ @@ -287,8 +298,8 @@ static const struct intel_device_info intel_sandybridge_m_gt2_info = { #define GEN7_FEATURES \ GEN(7), \ .num_pipes = 3, \ - .has_hotplug = 1, \ - .has_fbc = 1, \ + .display.has_hotplug = 1, \ + .display.has_fbc = 1, \ .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \ .has_coherent_ggtt = true, \ .has_llc = 1, \ @@ -345,8 +356,8 @@ static const struct intel_device_info intel_valleyview_info = { .num_pipes = 2, .has_runtime_pm = 1, .has_rc6 = 1, - .has_gmch_display = 1, - .has_hotplug = 1, + .display.has_gmch_display = 1, + .display.has_hotplug = 1, .ppgtt = INTEL_PPGTT_FULL, .has_snoop = true, .has_coherent_ggtt = false, @@ -360,10 +371,10 @@ static const struct intel_device_info intel_valleyview_info = { #define G75_FEATURES \ GEN7_FEATURES, \ .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, \ - .has_ddi = 1, \ + .display.has_ddi = 1, \ .has_fpga_dbg = 1, \ - .has_psr = 1, \ - .has_dp_mst = 1, \ + .display.has_psr = 1, \ + .display.has_dp_mst = 1, \ .has_rc6p = 0 /* RC6p removed-by HSW */, \ .has_runtime_pm = 1 @@ -430,14 +441,14 @@ static const struct intel_device_info intel_cherryview_info = { PLATFORM(INTEL_CHERRYVIEW), GEN(8), .num_pipes = 3, - .has_hotplug = 1, + .display.has_hotplug = 1, .is_lp = 1, .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, .has_64bit_reloc = 1, .has_runtime_pm = 1, .has_rc6 = 1, .has_logical_ring_contexts = 1, - .has_gmch_display = 1, + .display.has_gmch_display = 1, .ppgtt = INTEL_PPGTT_FULL, .has_reset_engine = 1, .has_snoop = true, @@ -459,15 +470,15 @@ static const struct intel_device_info intel_cherryview_info = { GEN(9), \ GEN9_DEFAULT_PAGE_SIZES, \ .has_logical_ring_preemption = 1, \ - .has_csr = 1, \ + .display.has_csr = 1, \ .has_guc = 1, \ - .has_ipc = 1, \ + .display.has_ipc = 1, \ .ddb_size = 896 #define SKL_PLATFORM \ GEN9_FEATURES, \ /* Display WA #0477 WaDisableIPC: skl */ \ - .has_ipc = 0, \ + .display.has_ipc = 0, \ PLATFORM(INTEL_SKYLAKE) static const struct intel_device_info intel_skylake_gt1_info = { @@ -498,19 +509,19 @@ static const struct intel_device_info intel_skylake_gt4_info = { #define GEN9_LP_FEATURES \ GEN(9), \ .is_lp = 1, \ - .has_hotplug = 1, \ + .display.has_hotplug = 1, \ .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, \ .num_pipes = 3, \ .has_64bit_reloc = 1, \ - .has_ddi = 1, \ + .display.has_ddi = 1, \ .has_fpga_dbg = 1, \ - .has_fbc = 1, \ - .has_psr = 1, \ + .display.has_fbc = 1, \ + .display.has_psr = 1, \ .has_runtime_pm = 1, \ .has_pooled_eu = 0, \ - .has_csr = 1, \ + .display.has_csr = 1, \ .has_rc6 = 1, \ - .has_dp_mst = 1, \ + .display.has_dp_mst = 1, \ .has_logical_ring_contexts = 1, \ .has_logical_ring_preemption = 1, \ .has_guc = 1, \ @@ -518,7 +529,7 @@ static const struct intel_device_info intel_skylake_gt4_info = { .has_reset_engine = 1, \ .has_snoop = true, \ .has_coherent_ggtt = false, \ - .has_ipc = 1, \ + .display.has_ipc = 1, \ GEN9_DEFAULT_PAGE_SIZES, \ GEN_DEFAULT_PIPEOFFSETS, \ IVB_CURSOR_OFFSETS, \ diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c index 677002a9e893..1e56319334f3 100644 --- a/drivers/gpu/drm/i915/intel_device_info.c +++ b/drivers/gpu/drm/i915/intel_device_info.c @@ -77,6 +77,10 @@ void intel_device_info_dump_flags(const struct intel_device_info *info, #define PRINT_FLAG(name) drm_printf(p, "%s: %s\n", #name, yesno(info->name)); DEV_INFO_FOR_EACH_FLAG(PRINT_FLAG); #undef PRINT_FLAG + +#define PRINT_FLAG(name) drm_printf(p, "%s: %s\n", #name, yesno(info->display.name)); + DEV_INFO_DISPLAY_FOR_EACH_FLAG(PRINT_FLAG); +#undef PRINT_FLAG } static void sseu_dump(const struct sseu_dev_info *sseu, struct drm_printer *p) diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h index 88f97210dc49..858324947537 100644 --- a/drivers/gpu/drm/i915/intel_device_info.h +++ b/drivers/gpu/drm/i915/intel_device_info.h @@ -89,35 +89,38 @@ enum intel_ppgtt { func(is_alpha_support); \ /* Keep has_* in alphabetical order */ \ func(has_64bit_reloc); \ - func(has_csr); \ - func(has_ddi); \ - func(has_dp_mst); \ func(has_reset_engine); \ - func(has_fbc); \ func(has_fpga_dbg); \ - func(has_gmch_display); \ func(has_guc); \ func(has_guc_ct); \ - func(has_hotplug); \ func(has_l3_dpf); \ func(has_llc); \ func(has_logical_ring_contexts); \ func(has_logical_ring_elsq); \ func(has_logical_ring_preemption); \ - func(has_overlay); \ func(has_pooled_eu); \ - func(has_psr); \ func(has_rc6); \ func(has_rc6p); \ func(has_runtime_pm); \ func(has_snoop); \ func(has_coherent_ggtt); \ func(unfenced_needs_alignment); \ + func(hws_needs_physical); + +#define DEV_INFO_DISPLAY_FOR_EACH_FLAG(func) \ + /* Keep in alphabetical order */ \ func(cursor_needs_physical); \ - func(hws_needs_physical); \ + func(has_csr); \ + func(has_ddi); \ + func(has_dp_mst); \ + func(has_fbc); \ + func(has_gmch_display); \ + func(has_hotplug); \ + func(has_ipc); \ + func(has_overlay); \ + func(has_psr); \ func(overlay_needs_physical); \ - func(supports_tv); \ - func(has_ipc); + func(supports_tv); #define GEN_MAX_SLICES (6) /* CNL upper bound */ #define GEN_MAX_SUBSLICES (8) /* ICL upper bound */ @@ -192,6 +195,12 @@ struct intel_device_info { u16 degamma_lut_size; u16 gamma_lut_size; } color; + + struct { +#define DEFINE_FLAG(name) u8 name:1 + DEV_INFO_DISPLAY_FOR_EACH_FLAG(DEFINE_FLAG); +#undef DEFINE_FLAG + } display; }; struct intel_driver_caps { diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index d48f62ec0d7d..fa028dd3afe8 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -9636,7 +9636,7 @@ static u32 intel_cursor_base(const struct intel_plane_state *plane_state) const struct drm_i915_gem_object *obj = intel_fb_obj(fb); u32 base; - if (INTEL_INFO(dev_priv)->cursor_needs_physical) + if (INTEL_INFO(dev_priv)->display.cursor_needs_physical) base = obj->phys_handle->busaddr; else base = intel_plane_ggtt_offset(plane_state); @@ -13209,7 +13209,7 @@ static int intel_plane_pin_fb(struct intel_plane_state *plane_state) struct i915_vma *vma; if (plane->id == PLANE_CURSOR && - INTEL_INFO(dev_priv)->cursor_needs_physical) { + INTEL_INFO(dev_priv)->display.cursor_needs_physical) { struct drm_i915_gem_object *obj = intel_fb_obj(fb); const int align = intel_cursor_alignment(dev_priv); int err; diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c index 14cbaf4a0e93..f23570c44323 100644 --- a/drivers/gpu/drm/i915/intel_fbc.c +++ b/drivers/gpu/drm/i915/intel_fbc.c @@ -1309,7 +1309,7 @@ void intel_fbc_init(struct drm_i915_private *dev_priv) fbc->active = false; if (need_fbc_vtd_wa(dev_priv)) - mkwrite_device_info(dev_priv)->has_fbc = false; + mkwrite_device_info(dev_priv)->display.has_fbc = false; i915_modparams.enable_fbc = intel_sanitize_fbc_option(dev_priv); DRM_DEBUG_KMS("Sanitized enable_fbc value: %d\n", -- 2.19.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 9+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915: Add HAS_DISPLAY() and use it 2018-11-20 22:32 [PATCH 1/3] drm/i915: Add HAS_DISPLAY() and use it José Roberto de Souza 2018-11-20 22:32 ` [PATCH 2/3] drm/i915: Do not touch PCH handshake registers if PCH is not present José Roberto de Souza 2018-11-20 22:32 ` [PATCH 3/3] drm/i915: Move display device info capabilities to its own struct José Roberto de Souza @ 2018-11-20 23:03 ` Patchwork 2018-11-20 23:05 ` ✗ Fi.CI.SPARSE: " Patchwork ` (3 subsequent siblings) 6 siblings, 0 replies; 9+ messages in thread From: Patchwork @ 2018-11-20 23:03 UTC (permalink / raw) To: José Roberto de Souza; +Cc: intel-gfx == Series Details == Series: series starting with [1/3] drm/i915: Add HAS_DISPLAY() and use it URL : https://patchwork.freedesktop.org/series/52790/ State : warning == Summary == $ dim checkpatch origin/drm-tip 7a61c38bd7ad drm/i915: Add HAS_DISPLAY() and use it 3259afbd74f1 drm/i915: Do not touch PCH handshake registers if PCH is not present dbb983309d15 drm/i915: Move display device info capabilities to its own struct -:395: WARNING:TRAILING_SEMICOLON: macros should not use a trailing semicolon #395: FILE: drivers/gpu/drm/i915/intel_device_info.c:81: +#define PRINT_FLAG(name) drm_printf(p, "%s: %s\n", #name, yesno(info->display.name)); -:435: ERROR:MULTISTATEMENT_MACRO_USE_DO_WHILE: Macros with multiple statements should be enclosed in a do - while loop #435: FILE: drivers/gpu/drm/i915/intel_device_info.h:110: +#define DEV_INFO_DISPLAY_FOR_EACH_FLAG(func) \ + /* Keep in alphabetical order */ \ func(cursor_needs_physical); \ + func(has_csr); \ + func(has_ddi); \ + func(has_dp_mst); \ + func(has_fbc); \ + func(has_gmch_display); \ + func(has_hotplug); \ + func(has_ipc); \ + func(has_overlay); \ + func(has_psr); \ func(overlay_needs_physical); \ + func(supports_tv); -:435: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'func' - possible side-effects? #435: FILE: drivers/gpu/drm/i915/intel_device_info.h:110: +#define DEV_INFO_DISPLAY_FOR_EACH_FLAG(func) \ + /* Keep in alphabetical order */ \ func(cursor_needs_physical); \ + func(has_csr); \ + func(has_ddi); \ + func(has_dp_mst); \ + func(has_fbc); \ + func(has_gmch_display); \ + func(has_hotplug); \ + func(has_ipc); \ + func(has_overlay); \ + func(has_psr); \ func(overlay_needs_physical); \ + func(supports_tv); -:435: WARNING:TRAILING_SEMICOLON: macros should not use a trailing semicolon #435: FILE: drivers/gpu/drm/i915/intel_device_info.h:110: +#define DEV_INFO_DISPLAY_FOR_EACH_FLAG(func) \ + /* Keep in alphabetical order */ \ func(cursor_needs_physical); \ + func(has_csr); \ + func(has_ddi); \ + func(has_dp_mst); \ + func(has_fbc); \ + func(has_gmch_display); \ + func(has_hotplug); \ + func(has_ipc); \ + func(has_overlay); \ + func(has_psr); \ func(overlay_needs_physical); \ + func(supports_tv); total: 1 errors, 2 warnings, 1 checks, 432 lines checked _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* ✗ Fi.CI.SPARSE: warning for series starting with [1/3] drm/i915: Add HAS_DISPLAY() and use it 2018-11-20 22:32 [PATCH 1/3] drm/i915: Add HAS_DISPLAY() and use it José Roberto de Souza ` (2 preceding siblings ...) 2018-11-20 23:03 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915: Add HAS_DISPLAY() and use it Patchwork @ 2018-11-20 23:05 ` Patchwork 2018-11-20 23:20 ` ✓ Fi.CI.BAT: success " Patchwork ` (2 subsequent siblings) 6 siblings, 0 replies; 9+ messages in thread From: Patchwork @ 2018-11-20 23:05 UTC (permalink / raw) To: José Roberto de Souza; +Cc: intel-gfx == Series Details == Series: series starting with [1/3] drm/i915: Add HAS_DISPLAY() and use it URL : https://patchwork.freedesktop.org/series/52790/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: Add HAS_DISPLAY() and use it -drivers/gpu/drm/i915/selftests/../i915_drv.h:3567:16: warning: expression using sizeof(void) +drivers/gpu/drm/i915/selftests/../i915_drv.h:3569:16: warning: expression using sizeof(void) Commit: drm/i915: Do not touch PCH handshake registers if PCH is not present Okay! Commit: drm/i915: Move display device info capabilities to its own struct Okay! _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Add HAS_DISPLAY() and use it 2018-11-20 22:32 [PATCH 1/3] drm/i915: Add HAS_DISPLAY() and use it José Roberto de Souza ` (3 preceding siblings ...) 2018-11-20 23:05 ` ✗ Fi.CI.SPARSE: " Patchwork @ 2018-11-20 23:20 ` Patchwork 2018-11-21 11:13 ` ✗ Fi.CI.IGT: failure " Patchwork 2018-11-22 0:20 ` [PATCH 1/3] " Lucas De Marchi 6 siblings, 0 replies; 9+ messages in thread From: Patchwork @ 2018-11-20 23:20 UTC (permalink / raw) To: Souza, Jose; +Cc: intel-gfx == Series Details == Series: series starting with [1/3] drm/i915: Add HAS_DISPLAY() and use it URL : https://patchwork.freedesktop.org/series/52790/ State : success == Summary == = CI Bug Log - changes from CI_DRM_5175 -> Patchwork_10871 = == Summary - SUCCESS == No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/52790/revisions/1/mbox/ == Known issues == Here are the changes found in Patchwork_10871 that come from known issues: === IGT changes === ==== Issues hit ==== igt@gem_ctx_create@basic-files: fi-bsw-kefka: PASS -> FAIL (fdo#108656) igt@gem_ctx_switch@basic-default: fi-icl-u2: PASS -> DMESG-WARN (fdo#107724) igt@gem_exec_suspend@basic-s4-devices: fi-blb-e6850: PASS -> INCOMPLETE (fdo#107718) igt@kms_pipe_crc_basic@hang-read-crc-pipe-a: fi-byt-clapper: PASS -> FAIL (fdo#107362, fdo#103191) igt@prime_vgem@basic-fence-flip: fi-ilk-650: PASS -> FAIL (fdo#104008) ==== Possible fixes ==== igt@gem_exec_suspend@basic-s3: fi-icl-u2: DMESG-WARN (fdo#107724) -> PASS igt@kms_frontbuffer_tracking@basic: fi-byt-clapper: FAIL (fdo#103167) -> PASS igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence: fi-byt-clapper: FAIL (fdo#107362, fdo#103191) -> PASS fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008 fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362 fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718 fdo#107724 https://bugs.freedesktop.org/show_bug.cgi?id=107724 fdo#108656 https://bugs.freedesktop.org/show_bug.cgi?id=108656 == Participating hosts (52 -> 46) == Missing (6): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 == Build changes == * Linux: CI_DRM_5175 -> Patchwork_10871 CI_DRM_5175: eccbba7017aafd70e09bb105c8a6b85572a93eb8 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4723: 53bb24ad410b53cdd96f15ced8fd5921c8ab0eac @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10871: dbb983309d1585015e0ad441cadec6e902122e60 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == dbb983309d15 drm/i915: Move display device info capabilities to its own struct 3259afbd74f1 drm/i915: Do not touch PCH handshake registers if PCH is not present 7a61c38bd7ad drm/i915: Add HAS_DISPLAY() and use it == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10871/issues.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* ✗ Fi.CI.IGT: failure for series starting with [1/3] drm/i915: Add HAS_DISPLAY() and use it 2018-11-20 22:32 [PATCH 1/3] drm/i915: Add HAS_DISPLAY() and use it José Roberto de Souza ` (4 preceding siblings ...) 2018-11-20 23:20 ` ✓ Fi.CI.BAT: success " Patchwork @ 2018-11-21 11:13 ` Patchwork 2018-11-22 0:20 ` [PATCH 1/3] " Lucas De Marchi 6 siblings, 0 replies; 9+ messages in thread From: Patchwork @ 2018-11-21 11:13 UTC (permalink / raw) To: Souza, Jose; +Cc: intel-gfx == Series Details == Series: series starting with [1/3] drm/i915: Add HAS_DISPLAY() and use it URL : https://patchwork.freedesktop.org/series/52790/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_5175_full -> Patchwork_10871_full = == Summary - FAILURE == Serious unknown changes coming with Patchwork_10871_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_10871_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_10871_full: === IGT changes === ==== Possible regressions ==== igt@gem_exec_blt@normal: shard-skl: NOTRUN -> INCOMPLETE ==== Warnings ==== igt@tools_test@sysfs_l3_parity: shard-hsw: SKIP -> PASS igt@tools_test@tools_test: {shard-iclb}: SKIP -> PASS == Known issues == Here are the changes found in Patchwork_10871_full that come from known issues: === IGT changes === ==== Issues hit ==== igt@gem_set_tiling_vs_gtt: {shard-iclb}: PASS -> INCOMPLETE (fdo#108343) igt@gem_softpin@noreloc-s3: shard-skl: NOTRUN -> INCOMPLETE (fdo#107773, fdo#104108) igt@gem_userptr_blits@readonly-unsync: shard-skl: NOTRUN -> INCOMPLETE (fdo#108074) igt@kms_atomic_transition@1x-modeset-transitions: {shard-iclb}: PASS -> DMESG-WARN (fdo#108336, fdo#107724) +2 igt@kms_atomic_transition@1x-modeset-transitions-nonblocking-fencing: shard-skl: PASS -> FAIL (fdo#107815, fdo#108470) igt@kms_busy@extended-modeset-hang-newfb-with-reset-render-a: shard-skl: NOTRUN -> DMESG-WARN (fdo#107956) +3 igt@kms_cursor_crc@cursor-256x256-suspend: shard-skl: PASS -> FAIL (fdo#103191, fdo#103232) igt@kms_cursor_crc@cursor-64x21-random: shard-glk: PASS -> FAIL (fdo#103232) +1 igt@kms_cursor_crc@cursor-64x64-dpms: shard-skl: PASS -> FAIL (fdo#103232) +1 igt@kms_draw_crc@draw-method-rgb565-blt-ytiled: shard-glk: PASS -> FAIL (fdo#103184) igt@kms_draw_crc@draw-method-xrgb2101010-mmap-cpu-ytiled: shard-skl: PASS -> FAIL (fdo#103184) igt@kms_draw_crc@draw-method-xrgb2101010-render-untiled: {shard-iclb}: PASS -> WARN (fdo#108336) +2 igt@kms_flip@blocking-wf_vblank: {shard-iclb}: PASS -> DMESG-WARN (fdo#107724) +11 igt@kms_flip_tiling@flip-to-y-tiled: shard-skl: PASS -> FAIL (fdo#107931) igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw: shard-skl: PASS -> FAIL (fdo#105682) +3 igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-pwrite: {shard-iclb}: PASS -> DMESG-FAIL (fdo#107720, fdo#107724) shard-apl: PASS -> FAIL (fdo#103167) +1 igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt: shard-glk: PASS -> FAIL (fdo#103167) +2 igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-render: shard-glk: PASS -> DMESG-FAIL (fdo#106538, fdo#105763) igt@kms_frontbuffer_tracking@fbc-indfb-scaledprimary: {shard-iclb}: PASS -> DMESG-FAIL (fdo#107724) +5 igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-gtt: shard-glk: PASS -> DMESG-WARN (fdo#106538, fdo#105763) +4 igt@kms_frontbuffer_tracking@fbcpsr-stridechange: shard-skl: NOTRUN -> FAIL (fdo#105683) igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-gtt: shard-skl: PASS -> FAIL (fdo#103167) igt@kms_plane_alpha_blend@pipe-a-alpha-transparant-fb: shard-skl: NOTRUN -> FAIL (fdo#108145) +1 igt@kms_plane_alpha_blend@pipe-b-coverage-7efc: shard-skl: PASS -> FAIL (fdo#107815) igt@kms_plane_multiple@atomic-pipe-a-tiling-y: shard-apl: PASS -> FAIL (fdo#103166) +1 igt@kms_plane_scaling@pipe-a-scaler-with-pixel-format: {shard-iclb}: NOTRUN -> DMESG-WARN (fdo#107724) igt@kms_setmode@basic: shard-hsw: PASS -> FAIL (fdo#99912) shard-kbl: PASS -> FAIL (fdo#99912) igt@pm_rpm@basic-rte: shard-skl: PASS -> INCOMPLETE (fdo#107807) igt@pm_rpm@pm-tiling: shard-skl: NOTRUN -> INCOMPLETE (fdo#107807) igt@pm_rpm@universal-planes: {shard-iclb}: PASS -> DMESG-WARN (fdo#108654, fdo#108756) {igt@runner@aborted}: {shard-iclb}: NOTRUN -> FAIL (fdo#108756) ==== Possible fixes ==== igt@drm_import_export@import-close-race-flink: shard-skl: TIMEOUT (fdo#108667) -> PASS igt@gem_ppgtt@blt-vs-render-ctxn: shard-kbl: INCOMPLETE (fdo#103665, fdo#106887, fdo#106023) -> PASS igt@kms_ccs@pipe-b-crc-sprite-planes-basic: shard-glk: FAIL (fdo#108145) -> PASS igt@kms_chv_cursor_fail@pipe-b-256x256-right-edge: shard-skl: FAIL (fdo#104671) -> PASS igt@kms_color@pipe-c-ctm-0-75: shard-skl: FAIL (fdo#108682) -> PASS igt@kms_cursor_crc@cursor-256x85-onscreen: shard-glk: FAIL (fdo#103232) -> PASS +2 igt@kms_draw_crc@draw-method-xrgb8888-render-ytiled: {shard-iclb}: WARN (fdo#108336) -> PASS +1 igt@kms_flip@plain-flip-fb-recreate-interruptible: shard-skl: FAIL (fdo#100368) -> PASS igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-onoff: shard-apl: FAIL (fdo#103167) -> PASS +1 igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-cpu: shard-glk: FAIL (fdo#103167) -> PASS igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt: {shard-iclb}: DMESG-FAIL (fdo#107724) -> PASS +3 igt@kms_plane@plane-position-covered-pipe-a-planes: shard-apl: FAIL (fdo#103166) -> PASS igt@kms_plane_multiple@atomic-pipe-b-tiling-y: shard-glk: FAIL (fdo#103166) -> PASS +1 {shard-iclb}: FAIL (fdo#103166) -> PASS igt@kms_rotation_crc@primary-rotation-180: {shard-iclb}: DMESG-WARN (fdo#108336, fdo#107724) -> PASS +6 igt@kms_sequence@get-busy: {shard-iclb}: DMESG-WARN (fdo#107724) -> PASS +5 igt@pm_rpm@dpms-mode-unset-non-lpsp: shard-skl: INCOMPLETE (fdo#107807) -> SKIP igt@pm_rpm@system-suspend-devices: shard-skl: INCOMPLETE (fdo#107807) -> PASS ==== Warnings ==== igt@i915_suspend@shrink: shard-skl: INCOMPLETE (fdo#106886) -> DMESG-WARN (fdo#108784) igt@kms_ccs@pipe-b-crc-sprite-planes-basic: {shard-iclb}: FAIL (fdo#107725) -> DMESG-WARN (fdo#108336, fdo#107724) igt@kms_cursor_crc@cursor-64x64-onscreen: {shard-iclb}: FAIL (fdo#103232) -> DMESG-WARN (fdo#108336, fdo#107724) {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103184 https://bugs.freedesktop.org/show_bug.cgi?id=103184 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#103232 https://bugs.freedesktop.org/show_bug.cgi?id=103232 fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665 fdo#104108 https://bugs.freedesktop.org/show_bug.cgi?id=104108 fdo#104671 https://bugs.freedesktop.org/show_bug.cgi?id=104671 fdo#105682 https://bugs.freedesktop.org/show_bug.cgi?id=105682 fdo#105683 https://bugs.freedesktop.org/show_bug.cgi?id=105683 fdo#105763 https://bugs.freedesktop.org/show_bug.cgi?id=105763 fdo#106023 https://bugs.freedesktop.org/show_bug.cgi?id=106023 fdo#106538 https://bugs.freedesktop.org/show_bug.cgi?id=106538 fdo#106886 https://bugs.freedesktop.org/show_bug.cgi?id=106886 fdo#106887 https://bugs.freedesktop.org/show_bug.cgi?id=106887 fdo#107720 https://bugs.freedesktop.org/show_bug.cgi?id=107720 fdo#107724 https://bugs.freedesktop.org/show_bug.cgi?id=107724 fdo#107725 https://bugs.freedesktop.org/show_bug.cgi?id=107725 fdo#107773 https://bugs.freedesktop.org/show_bug.cgi?id=107773 fdo#107807 https://bugs.freedesktop.org/show_bug.cgi?id=107807 fdo#107815 https://bugs.freedesktop.org/show_bug.cgi?id=107815 fdo#107931 https://bugs.freedesktop.org/show_bug.cgi?id=107931 fdo#107956 https://bugs.freedesktop.org/show_bug.cgi?id=107956 fdo#108074 https://bugs.freedesktop.org/show_bug.cgi?id=108074 fdo#108145 https://bugs.freedesktop.org/show_bug.cgi?id=108145 fdo#108336 https://bugs.freedesktop.org/show_bug.cgi?id=108336 fdo#108343 https://bugs.freedesktop.org/show_bug.cgi?id=108343 fdo#108470 https://bugs.freedesktop.org/show_bug.cgi?id=108470 fdo#108654 https://bugs.freedesktop.org/show_bug.cgi?id=108654 fdo#108667 https://bugs.freedesktop.org/show_bug.cgi?id=108667 fdo#108682 https://bugs.freedesktop.org/show_bug.cgi?id=108682 fdo#108756 https://bugs.freedesktop.org/show_bug.cgi?id=108756 fdo#108784 https://bugs.freedesktop.org/show_bug.cgi?id=108784 fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912 == Participating hosts (7 -> 7) == No changes in participating hosts == Build changes == * Linux: CI_DRM_5175 -> Patchwork_10871 CI_DRM_5175: eccbba7017aafd70e09bb105c8a6b85572a93eb8 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4723: 53bb24ad410b53cdd96f15ced8fd5921c8ab0eac @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_10871: dbb983309d1585015e0ad441cadec6e902122e60 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10871/shards.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/3] drm/i915: Add HAS_DISPLAY() and use it 2018-11-20 22:32 [PATCH 1/3] drm/i915: Add HAS_DISPLAY() and use it José Roberto de Souza ` (5 preceding siblings ...) 2018-11-21 11:13 ` ✗ Fi.CI.IGT: failure " Patchwork @ 2018-11-22 0:20 ` Lucas De Marchi 6 siblings, 0 replies; 9+ messages in thread From: Lucas De Marchi @ 2018-11-22 0:20 UTC (permalink / raw) To: José Roberto de Souza; +Cc: Jani Nikula, intel-gfx On Tue, Nov 20, 2018 at 02:32:40PM -0800, José Roberto de Souza wrote: > Right now it is decided if GEN has display by checking the num_pipes, > so lets make it explicit and use a macro. > > Cc: Lucas De Marchi <lucas.demarchi@intel.com> > Cc: Jani Nikula <jani.nikula@intel.com> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Lucas De Marchi > --- > drivers/gpu/drm/i915/i915_drv.c | 10 +++++----- > drivers/gpu/drm/i915/i915_drv.h | 2 ++ > drivers/gpu/drm/i915/intel_bios.c | 2 +- > drivers/gpu/drm/i915/intel_device_info.c | 4 ++-- > drivers/gpu/drm/i915/intel_display.c | 4 ++-- > drivers/gpu/drm/i915/intel_fbdev.c | 2 +- > drivers/gpu/drm/i915/intel_i2c.c | 2 +- > 7 files changed, 14 insertions(+), 12 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c > index b1d23c73c147..5e2d91f4dd2d 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -287,7 +287,7 @@ static void intel_detect_pch(struct drm_i915_private *dev_priv) > * Use PCH_NOP (PCH but no South Display) for PCH platforms without > * display. > */ > - if (pch && INTEL_INFO(dev_priv)->num_pipes == 0) { > + if (pch && !HAS_DISPLAY(dev_priv)) { > DRM_DEBUG_KMS("Display disabled, reverting to NOP PCH\n"); > dev_priv->pch_type = PCH_NOP; > dev_priv->pch_id = 0; > @@ -645,7 +645,7 @@ static int i915_load_modeset_init(struct drm_device *dev) > if (i915_inject_load_failure()) > return -ENODEV; > > - if (INTEL_INFO(dev_priv)->num_pipes) { > + if (HAS_DISPLAY(dev_priv)) { > ret = drm_vblank_init(&dev_priv->drm, > INTEL_INFO(dev_priv)->num_pipes); > if (ret) > @@ -696,7 +696,7 @@ static int i915_load_modeset_init(struct drm_device *dev) > > intel_overlay_setup(dev_priv); > > - if (INTEL_INFO(dev_priv)->num_pipes == 0) > + if (!HAS_DISPLAY(dev_priv)) > return 0; > > ret = intel_fbdev_init(dev); > @@ -1551,7 +1551,7 @@ static void i915_driver_register(struct drm_i915_private *dev_priv) > } else > DRM_ERROR("Failed to register driver for userspace access!\n"); > > - if (INTEL_INFO(dev_priv)->num_pipes) { > + if (HAS_DISPLAY(dev_priv)) { > /* Must be done after probing outputs */ > intel_opregion_register(dev_priv); > acpi_video_register(); > @@ -1575,7 +1575,7 @@ static void i915_driver_register(struct drm_i915_private *dev_priv) > * We need to coordinate the hotplugs with the asynchronous fbdev > * configuration, for which we use the fbdev->async_cookie. > */ > - if (INTEL_INFO(dev_priv)->num_pipes) > + if (HAS_DISPLAY(dev_priv)) > drm_kms_helper_poll_init(dev); > > intel_power_domains_enable(dev_priv); > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 21e4405e2168..3cdbb3d074db 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -2568,6 +2568,8 @@ intel_info(const struct drm_i915_private *dev_priv) > #define GT_FREQUENCY_MULTIPLIER 50 > #define GEN9_FREQ_SCALER 3 > > +#define HAS_DISPLAY(dev_priv) (INTEL_INFO(dev_priv)->num_pipes > 0) > + > #include "i915_trace.h" > > static inline bool intel_vtd_active(void) > diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c > index 0694aa8bb9bc..6d3e0260d49c 100644 > --- a/drivers/gpu/drm/i915/intel_bios.c > +++ b/drivers/gpu/drm/i915/intel_bios.c > @@ -1752,7 +1752,7 @@ void intel_bios_init(struct drm_i915_private *dev_priv) > const struct bdb_header *bdb; > u8 __iomem *bios = NULL; > > - if (INTEL_INFO(dev_priv)->num_pipes == 0) { > + if (!HAS_DISPLAY(dev_priv)) { > DRM_DEBUG_KMS("Skipping VBT init due to disabled display.\n"); > return; > } > diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c > index ceecb5bd5226..677002a9e893 100644 > --- a/drivers/gpu/drm/i915/intel_device_info.c > +++ b/drivers/gpu/drm/i915/intel_device_info.c > @@ -782,7 +782,7 @@ void intel_device_info_runtime_init(struct intel_device_info *info) > if (i915_modparams.disable_display) { > DRM_INFO("Display disabled (module parameter)\n"); > info->num_pipes = 0; > - } else if (info->num_pipes > 0 && > + } else if (HAS_DISPLAY(dev_priv) && > (IS_GEN7(dev_priv) || IS_GEN8(dev_priv)) && > HAS_PCH_SPLIT(dev_priv)) { > u32 fuse_strap = I915_READ(FUSE_STRAP); > @@ -807,7 +807,7 @@ void intel_device_info_runtime_init(struct intel_device_info *info) > DRM_INFO("PipeC fused off\n"); > info->num_pipes -= 1; > } > - } else if (info->num_pipes > 0 && IS_GEN9(dev_priv)) { > + } else if (HAS_DISPLAY(dev_priv) && IS_GEN9(dev_priv)) { > u32 dfsm = I915_READ(SKL_DFSM); > u8 disabled_mask = 0; > bool invalid; > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 132e978227fb..d48f62ec0d7d 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -14155,7 +14155,7 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv) > > intel_pps_init(dev_priv); > > - if (INTEL_INFO(dev_priv)->num_pipes == 0) > + if (!HAS_DISPLAY(dev_priv)) > return; > > /* > @@ -16027,7 +16027,7 @@ intel_display_capture_error_state(struct drm_i915_private *dev_priv) > }; > int i; > > - if (INTEL_INFO(dev_priv)->num_pipes == 0) > + if (!HAS_DISPLAY(dev_priv)) > return NULL; > > error = kzalloc(sizeof(*error), GFP_ATOMIC); > diff --git a/drivers/gpu/drm/i915/intel_fbdev.c b/drivers/gpu/drm/i915/intel_fbdev.c > index 2480c7d6edee..fb5bb5b32a60 100644 > --- a/drivers/gpu/drm/i915/intel_fbdev.c > +++ b/drivers/gpu/drm/i915/intel_fbdev.c > @@ -672,7 +672,7 @@ int intel_fbdev_init(struct drm_device *dev) > struct intel_fbdev *ifbdev; > int ret; > > - if (WARN_ON(INTEL_INFO(dev_priv)->num_pipes == 0)) > + if (WARN_ON(!HAS_DISPLAY(dev_priv))) > return -ENODEV; > > ifbdev = kzalloc(sizeof(struct intel_fbdev), GFP_KERNEL); > diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c > index 33d87ab93fdd..802d0394ccc4 100644 > --- a/drivers/gpu/drm/i915/intel_i2c.c > +++ b/drivers/gpu/drm/i915/intel_i2c.c > @@ -817,7 +817,7 @@ int intel_setup_gmbus(struct drm_i915_private *dev_priv) > unsigned int pin; > int ret; > > - if (INTEL_INFO(dev_priv)->num_pipes == 0) > + if (!HAS_DISPLAY(dev_priv)) > return 0; > > if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) > -- > 2.19.1 > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2018-11-22 0:20 UTC | newest] Thread overview: 9+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2018-11-20 22:32 [PATCH 1/3] drm/i915: Add HAS_DISPLAY() and use it José Roberto de Souza 2018-11-20 22:32 ` [PATCH 2/3] drm/i915: Do not touch PCH handshake registers if PCH is not present José Roberto de Souza 2018-11-21 11:18 ` Ville Syrjälä 2018-11-20 22:32 ` [PATCH 3/3] drm/i915: Move display device info capabilities to its own struct José Roberto de Souza 2018-11-20 23:03 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915: Add HAS_DISPLAY() and use it Patchwork 2018-11-20 23:05 ` ✗ Fi.CI.SPARSE: " Patchwork 2018-11-20 23:20 ` ✓ Fi.CI.BAT: success " Patchwork 2018-11-21 11:13 ` ✗ Fi.CI.IGT: failure " Patchwork 2018-11-22 0:20 ` [PATCH 1/3] " Lucas De Marchi
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