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From: Dave Martin <Dave.Martin@arm.com>
To: Andrew Jones <drjones@redhat.com>
Cc: "qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
	"qemu-arm@nongnu.org" <qemu-arm@nongnu.org>,
	"peter.maydell@linaro.org" <peter.maydell@linaro.org>,
	"richard.henderson@linaro.org" <richard.henderson@linaro.org>,
	"alex.bennee@linaro.org" <alex.bennee@linaro.org>,
	"armbru@redhat.com" <armbru@redhat.com>,
	"eblake@redhat.com" <eblake@redhat.com>,
	"abologna@redhat.com" <abologna@redhat.com>
Subject: Re: [PATCH 11/13] target/arm/cpu64: max cpu: Introduce sve-vls-map
Date: Mon, 13 May 2019 12:26:36 +0100	[thread overview]
Message-ID: <20190513112635.GD28398@e103592.cambridge.arm.com> (raw)
In-Reply-To: <20190512083624.8916-12-drjones@redhat.com>

On Sun, May 12, 2019 at 09:36:22AM +0100, Andrew Jones wrote:
> Introduce another cpu property to control SVE vector lengths,
> sve-vls-map, which allows the user to explicitly select the
> set of vector lengths the guest can use. The map must conform
> to QEMU's limits and architectural constraints, checked when
> the property is set. Inconsistencies with sve-max-vq are also
> checked. The bit number of a set bit in the map represents the
> allowed vector length in number of quadwords.
> 
> Note, as the map is implemented with a single 64-bit word we
> currently only support up to 8192-bit vectors. As QEMU and
> KVM only support up to 2048-bit vectors then this sufficient
> now, and probably for some time. Extending the bitmap beyond
> a single word will likely require changing the property to
> a string and adding yet another parser to QEMU.
> 
> Signed-off-by: Andrew Jones <drjones@redhat.com>
> ---
>  target/arm/cpu.c     |  4 +++
>  target/arm/cpu.h     |  3 ++
>  target/arm/cpu64.c   | 70 +++++++++++++++++++++++++++++++++++++++++---
>  target/arm/helper.c  | 10 ++++++-
>  target/arm/monitor.c |  9 ++++--
>  5 files changed, 88 insertions(+), 8 deletions(-)
> 

[...]

> diff --git a/target/arm/cpu.h b/target/arm/cpu.h
> index 8292d547e8f9..f0d0ce759ba8 100644
> --- a/target/arm/cpu.h
> +++ b/target/arm/cpu.h
> @@ -920,6 +920,9 @@ struct ARMCPU {
>  
>      /* Used to set the maximum vector length the cpu will support.  */
>      uint32_t sve_max_vq;
> +
> +    /* Each bit represents a supported vector length of (bitnum * 16) bytes */
> +    uint64_t sve_vls_map;

Just to be clear, the representation here is different from the
representation in KVM_REG_ARM64_SVE_VLS?

In the latter, bit n represents vector length ((n + 1) * 16) bytes.

(QEMU is free to choose its own internal representation, naturally.)

[...]

> diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c

[...]

> +static void cpu_set_sve_vls_map(Object *obj, Visitor *v, const char *name,
> +                                void *opaque, Error **errp)
> +{
> +    ARMCPU *cpu = ARM_CPU(obj);
> +    Error *err = NULL;
> +    uint64_t mask = ~(BIT_MASK(ARM_MAX_VQ - 1) - 1);
> +    int i;
> +
> +    visit_type_uint64(v, name, &cpu->sve_vls_map, errp);
> +
> +    if (!err) {
> +        if (cpu->sve_vls_map == 0) {
> +            error_setg(&err, "SVE vector length map cannot be zero");

Maybe say "empty" here, since the map represents a set?

(But it this is just for debug rather than reporting errors to the user,
it probably doesn't matter much.)

[...]

> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index 1e6eb0d0f360..bedec1ea0b27 100644
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -5254,12 +5254,20 @@ uint32_t sve_zcr_len_for_el(CPUARMState *env, int el)
>  static void zcr_write(CPUARMState *env, const ARMCPRegInfo *ri,
>                        uint64_t value)
>  {
> +    ARMCPU *cpu = arm_env_get_cpu(env);
>      int cur_el = arm_current_el(env);
>      int old_len = sve_zcr_len_for_el(env, cur_el);
>      int new_len;
>  
>      /* Bits other than [3:0] are RAZ/WI.  */
> -    raw_write(env, ri, value & 0xf);
> +    value &= 0xf;

You might want to sanity-check that the max vq you configured for the
vcpu is <= 16 here.

> +
> +    if (value && !(BIT_MASK(value) & cpu->sve_vls_map)) {
> +        uint64_t map = cpu->sve_vls_map & (BIT_MASK(value) - 1);
> +        value = arm_cpu_fls64(map) - 1;
> +    }
> +
> +    raw_write(env, ri, value);

[...]

Cheers
---Dave

WARNING: multiple messages have this Message-ID (diff)
From: Dave Martin <Dave.Martin@arm.com>
To: Andrew Jones <drjones@redhat.com>
Cc: "peter.maydell@linaro.org" <peter.maydell@linaro.org>,
	"richard.henderson@linaro.org" <richard.henderson@linaro.org>,
	"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
	"armbru@redhat.com" <armbru@redhat.com>,
	"qemu-arm@nongnu.org" <qemu-arm@nongnu.org>,
	"abologna@redhat.com" <abologna@redhat.com>,
	"alex.bennee@linaro.org" <alex.bennee@linaro.org>
Subject: Re: [Qemu-devel] [PATCH 11/13] target/arm/cpu64: max cpu: Introduce sve-vls-map
Date: Mon, 13 May 2019 12:26:36 +0100	[thread overview]
Message-ID: <20190513112635.GD28398@e103592.cambridge.arm.com> (raw)
In-Reply-To: <20190512083624.8916-12-drjones@redhat.com>

On Sun, May 12, 2019 at 09:36:22AM +0100, Andrew Jones wrote:
> Introduce another cpu property to control SVE vector lengths,
> sve-vls-map, which allows the user to explicitly select the
> set of vector lengths the guest can use. The map must conform
> to QEMU's limits and architectural constraints, checked when
> the property is set. Inconsistencies with sve-max-vq are also
> checked. The bit number of a set bit in the map represents the
> allowed vector length in number of quadwords.
> 
> Note, as the map is implemented with a single 64-bit word we
> currently only support up to 8192-bit vectors. As QEMU and
> KVM only support up to 2048-bit vectors then this sufficient
> now, and probably for some time. Extending the bitmap beyond
> a single word will likely require changing the property to
> a string and adding yet another parser to QEMU.
> 
> Signed-off-by: Andrew Jones <drjones@redhat.com>
> ---
>  target/arm/cpu.c     |  4 +++
>  target/arm/cpu.h     |  3 ++
>  target/arm/cpu64.c   | 70 +++++++++++++++++++++++++++++++++++++++++---
>  target/arm/helper.c  | 10 ++++++-
>  target/arm/monitor.c |  9 ++++--
>  5 files changed, 88 insertions(+), 8 deletions(-)
> 

[...]

> diff --git a/target/arm/cpu.h b/target/arm/cpu.h
> index 8292d547e8f9..f0d0ce759ba8 100644
> --- a/target/arm/cpu.h
> +++ b/target/arm/cpu.h
> @@ -920,6 +920,9 @@ struct ARMCPU {
>  
>      /* Used to set the maximum vector length the cpu will support.  */
>      uint32_t sve_max_vq;
> +
> +    /* Each bit represents a supported vector length of (bitnum * 16) bytes */
> +    uint64_t sve_vls_map;

Just to be clear, the representation here is different from the
representation in KVM_REG_ARM64_SVE_VLS?

In the latter, bit n represents vector length ((n + 1) * 16) bytes.

(QEMU is free to choose its own internal representation, naturally.)

[...]

> diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c

[...]

> +static void cpu_set_sve_vls_map(Object *obj, Visitor *v, const char *name,
> +                                void *opaque, Error **errp)
> +{
> +    ARMCPU *cpu = ARM_CPU(obj);
> +    Error *err = NULL;
> +    uint64_t mask = ~(BIT_MASK(ARM_MAX_VQ - 1) - 1);
> +    int i;
> +
> +    visit_type_uint64(v, name, &cpu->sve_vls_map, errp);
> +
> +    if (!err) {
> +        if (cpu->sve_vls_map == 0) {
> +            error_setg(&err, "SVE vector length map cannot be zero");

Maybe say "empty" here, since the map represents a set?

(But it this is just for debug rather than reporting errors to the user,
it probably doesn't matter much.)

[...]

> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index 1e6eb0d0f360..bedec1ea0b27 100644
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -5254,12 +5254,20 @@ uint32_t sve_zcr_len_for_el(CPUARMState *env, int el)
>  static void zcr_write(CPUARMState *env, const ARMCPRegInfo *ri,
>                        uint64_t value)
>  {
> +    ARMCPU *cpu = arm_env_get_cpu(env);
>      int cur_el = arm_current_el(env);
>      int old_len = sve_zcr_len_for_el(env, cur_el);
>      int new_len;
>  
>      /* Bits other than [3:0] are RAZ/WI.  */
> -    raw_write(env, ri, value & 0xf);
> +    value &= 0xf;

You might want to sanity-check that the max vq you configured for the
vcpu is <= 16 here.

> +
> +    if (value && !(BIT_MASK(value) & cpu->sve_vls_map)) {
> +        uint64_t map = cpu->sve_vls_map & (BIT_MASK(value) - 1);
> +        value = arm_cpu_fls64(map) - 1;
> +    }
> +
> +    raw_write(env, ri, value);

[...]

Cheers
---Dave


  reply	other threads:[~2019-05-13 11:26 UTC|newest]

Thread overview: 131+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-12  8:36 [PATCH 00/13] target/arm/kvm: enable SVE in guests Andrew Jones
2019-05-12  8:36 ` [Qemu-devel] " Andrew Jones
2019-05-12  8:36 ` [PATCH 01/13] target/arm/kvm64: fix error returns Andrew Jones
2019-05-12  8:36   ` [Qemu-devel] " Andrew Jones
2019-06-05  7:20   ` Auger Eric
2019-05-12  8:36 ` [PATCH 02/13] update-linux-headers: Add sve_context.h to asm-arm64 Andrew Jones
2019-05-12  8:36   ` [Qemu-devel] " Andrew Jones
2019-06-05  7:21   ` Auger Eric
2019-06-05  7:30     ` Andrew Jones
2019-06-05  7:30       ` Andrew Jones
2019-05-12  8:36 ` [PATCH 03/13] HACK: linux header update Andrew Jones
2019-05-12  8:36   ` [Qemu-devel] " Andrew Jones
2019-05-12  8:36 ` [PATCH 04/13] target/arm/kvm: Move the get/put of fpsimd registers out Andrew Jones
2019-05-12  8:36   ` [Qemu-devel] " Andrew Jones
2019-06-05  7:15   ` Auger Eric
2019-06-05  7:27     ` Andrew Jones
2019-06-05  7:27       ` Andrew Jones
2019-05-12  8:36 ` [PATCH 05/13] target/arm/kvm: Add kvm_arch_get/put_sve Andrew Jones
2019-05-12  8:36   ` [Qemu-devel] " Andrew Jones
2019-05-13 12:31   ` Dave Martin
2019-05-13 12:31     ` [Qemu-devel] " Dave Martin
2019-05-13 13:55     ` Andrew Jones
2019-05-13 13:55       ` Andrew Jones
2019-05-13 15:31       ` Dave Martin
2019-05-13 15:31         ` Dave Martin
2019-05-13 15:40         ` Peter Maydell
2019-05-13 15:40           ` Peter Maydell
2019-05-13 16:05           ` Dave Martin
2019-05-13 16:05             ` Dave Martin
2019-05-13 16:40     ` Richard Henderson
2019-05-13 16:40       ` [Qemu-devel] " Richard Henderson
2019-05-13 18:14       ` Andrew Jones
2019-05-13 18:14         ` [Qemu-devel] " Andrew Jones
2019-05-13 18:31         ` Richard Henderson
2019-05-13 18:31           ` [Qemu-devel] " Richard Henderson
2019-05-13 12:43   ` Dave Martin
2019-05-13 12:43     ` [Qemu-devel] " Dave Martin
2019-05-13 14:07     ` Andrew Jones
2019-05-13 14:07       ` Andrew Jones
2019-05-13 14:39       ` Dave Martin
2019-05-13 14:39         ` Dave Martin
2019-05-13 16:58         ` Richard Henderson
2019-05-13 16:58           ` Richard Henderson
2019-05-14  9:10           ` Dave Martin
2019-05-14  9:10             ` Dave Martin
2019-05-12  8:36 ` [PATCH 06/13] target/arm/kvm: max cpu: Enable SVE when available Andrew Jones
2019-05-12  8:36   ` [Qemu-devel] " Andrew Jones
2019-06-05  9:09   ` Auger Eric
2019-06-05 11:04     ` Andrew Jones
2019-06-05 11:04       ` Andrew Jones
2019-05-12  8:36 ` [PATCH 07/13] target/arm/kvm: max cpu: Allow sve max vector length setting Andrew Jones
2019-05-12  8:36   ` [Qemu-devel] " Andrew Jones
2019-05-13 17:19   ` Richard Henderson
2019-05-13 17:19     ` [Qemu-devel] " Richard Henderson
2019-05-13 18:19     ` Andrew Jones
2019-05-13 18:19       ` Andrew Jones
2019-06-06  8:30   ` Auger Eric
2019-06-06  8:53     ` Andrew Jones
2019-06-06  8:53       ` Andrew Jones
2019-05-12  8:36 ` [PATCH 08/13] target/arm/monitor: Add query-sve-vector-lengths Andrew Jones
2019-05-12  8:36   ` [Qemu-devel] " Andrew Jones
2019-05-13 16:12   ` Markus Armbruster
2019-05-13 16:12     ` Markus Armbruster
2019-05-13 18:30     ` Andrew Jones
2019-05-13 18:30       ` Andrew Jones
2019-05-14  5:32       ` Markus Armbruster
2019-05-12  8:36 ` [PATCH 09/13] target/arm/kvm: Export kvm_arm_get_sve_vls Andrew Jones
2019-05-12  8:36   ` [Qemu-devel] " Andrew Jones
2019-05-12  8:36 ` [PATCH 10/13] target/arm/monitor: kvm: only return valid sve vector sets Andrew Jones
2019-05-12  8:36   ` [Qemu-devel] " Andrew Jones
2019-05-12  8:36 ` [PATCH 11/13] target/arm/cpu64: max cpu: Introduce sve-vls-map Andrew Jones
2019-05-12  8:36   ` [Qemu-devel] " Andrew Jones
2019-05-13 11:26   ` Dave Martin [this message]
2019-05-13 11:26     ` Dave Martin
2019-05-13 12:30     ` Andrew Jones
2019-05-13 12:30       ` Andrew Jones
2019-05-13 12:41       ` Dave Martin
2019-05-13 12:41         ` Dave Martin
2019-05-13 12:57         ` Andrew Jones
2019-05-13 12:57           ` Andrew Jones
2019-05-13 13:12           ` Dave Martin
2019-05-13 13:12             ` Dave Martin
2019-05-13 13:45             ` Andrew Jones
2019-05-13 13:45               ` Andrew Jones
2019-05-13 14:35               ` Dave Martin
2019-05-13 14:35                 ` Dave Martin
2019-05-13 15:25   ` Markus Armbruster
2019-05-13 15:25     ` Markus Armbruster
2019-05-13 18:31     ` Andrew Jones
2019-05-13 18:31       ` Andrew Jones
2019-05-12  8:36 ` [PATCH 12/13] target/arm/kvm: max cpu: Add support for sve-vls-map Andrew Jones
2019-05-12  8:36   ` [Qemu-devel] " Andrew Jones
2019-05-12  8:36 ` [PATCH 13/13] target/arm/kvm: host " Andrew Jones
2019-05-12  8:36   ` [Qemu-devel] " Andrew Jones
2019-05-13 15:37   ` Markus Armbruster
2019-05-13 15:37     ` Markus Armbruster
2019-05-13 18:33     ` Andrew Jones
2019-05-13 18:33       ` Andrew Jones
2019-05-13  9:32 ` [PATCH 00/13] target/arm/kvm: enable SVE in guests Andrea Bolognani
2019-05-13  9:32   ` [Qemu-devel] " Andrea Bolognani
2019-05-13 11:15   ` Dave Martin
2019-05-13 11:15     ` [Qemu-devel] " Dave Martin
2019-05-13 12:38     ` Andrew Jones
2019-05-13 12:38       ` [Qemu-devel] " Andrew Jones
2019-05-13 12:50       ` Dave Martin
2019-05-13 12:50         ` [Qemu-devel] " Dave Martin
2019-05-13 12:36   ` Andrew Jones
2019-05-13 12:36     ` Andrew Jones
2019-05-14 12:29     ` Andrea Bolognani
2019-05-14 12:29       ` Andrea Bolognani
2019-05-14 12:53       ` Andrew Jones
2019-05-14 16:03         ` Andrea Bolognani
2019-05-14 20:14           ` Richard Henderson
2019-05-15  8:03             ` Andrea Bolognani
2019-05-15 11:14               ` Dave Martin
2019-05-15 11:14                 ` Dave Martin
2019-05-15 11:28                 ` Andrea Bolognani
2019-05-15 11:28                   ` Andrea Bolognani
2019-05-15 12:47                   ` Dave Martin
2019-05-15 12:47                     ` Dave Martin
2019-05-15  9:15           ` Andrew Jones
2019-05-13  9:52 ` Peter Maydell
2019-05-13  9:52   ` [Qemu-devel] " Peter Maydell
2019-05-13 12:43   ` Andrew Jones
2019-05-13 12:43     ` Andrew Jones
2019-05-13 18:46 ` Richard Henderson
2019-05-13 18:46   ` [Qemu-devel] " Richard Henderson
2019-05-13 19:16   ` Andrew Jones
2019-05-13 19:16     ` [Qemu-devel] " Andrew Jones
2019-05-14  9:05   ` Peter Maydell
2019-05-14  9:05     ` [Qemu-devel] " Peter Maydell

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